Abstract: Disclosed is a method of fabricating an integrated circuit. A substrate comprising a semiconductor material and having a first surface is provided. A first layer of metalization interconnects is formed on the first surface. A first thin film layer comprising a dielectric barrier material is deposited over the first layer of metalization interconnects. A second thin film layer comprising a dielectric passivating material is deposited over the first thin film layer of dielectric barrier material. A via having a width greater than the width of a metalization interconnect is then plasma etched in the dielectric passivating material using a first etch gas. The dielectric barrier material is then plasma etched using a second etch gas to remove the dielectric barrier material in the area of the via. A second layer of metalization interconnects is then formed, a metalization interconnect in each of the first and second layers of metalization interconnects being connected in the via.

Abstract: Disclosed is a pressure transducer package comprising a housing and a substantially cylindrical chamber formed into the housing, a first end of the chamber comprising a substantially flat surface. The package further comprises a substantially cylindrical interface plate having first and second substantially flat end surfaces, one end surface of the interface plate facing the first end surface of the chamber. The package further comprises a pressure transducer comprising a pressure sensitive silicon die mounted to a substantially cylindrical support member. The support member comprises first and second substantially flat end surfaces. The other end surface of the interface plate faces one end surface of the support member. The housing comprises plug apparatus for hermetically sealing the chamber, the plug apparatus having a substantially flat surface forming a second end of the chamber.

Abstract: Thin films of chromium/silicon/nitrogen are etched in a solution of HF, H.sub.2 O.sub.2, HCl, and H.sub.2 O.

Abstract: A thin film having high electrical resistivity is produced on a substrate by radio frequency sputtering from a chrome/silicon source in a nitrogen/argon atmosphere.

Abstract: The present invention provides a method of protecting semiconductor integrated circuit from mobile ion contamination. In one embodiment a gettering agent is implanted into a dielectric layer. In an alternative embodiment a gettering agent is implanted into a photoresist layer which is ashed in an oxygen based plasma, leaving the gettering agent on the surface underlying the photoresist.

Abstract: A voltage-to-current converter is provided based on a pair of current sources providing current to two other pairs of current sources, one pair in the input stage and one pair in the output stage. Careful matching of current source pairs provides a large common mode rejection ratio and a large power supply variation rejection ratio.

Abstract: A fiber optic inspection system for use in the inspection of sandwiched solder bonds in integrated circuit packages. The apparatus contains a miniature fiber optic probe which picks up an image of the solder bonds and transmits it to a video camera. The video output signal of the camera is image processed to enhance the picture quality and displayed on a video monitor.

Abstract: Disclosed is a pressure transducer comprising a pressure sensitive silicon die having a front side exposing piezoresistive means and a back side for receiving pressure from a pressure medium. The transducer further comprises a pressure vessel having an aperture and apparatus including a hermetic seal for mounting the die with the front side of the die facing the aperture. In this manner, the die is compressed toward the pressure vessel when positive pressure is applied to the back side of the die by the pressure medium.

Abstract: An improved high efficiency metal lift-off process for removing a layer of metal at least partially covering a layer of photoresist. The method comprises forming microcracks located above the layer of photoresist in the layer of metal to be removed and providing solvent to the layer of photoresist through the microcracks.

Abstract: An integrated Schottky logic (ISL) read only memory (ROM) uses ISL drivers and decoders connected to wordlines and data bitlines. The pattern of data stored in the ISL is determined by Schottky diodes which are connected between selected data bitlines and wordlines. Improved performance is achieved by using a leakage current compensation source (such as a wordline pullup resistor) connected to each wordline, and by using a programmable dummy load (such as one or more dummy bitlines). The pullup resistors compensate for bitline loading sensitivity caused by leakage currents of the workline drivers. The dummy bitlines are selectively connected to those wordlines which are lightly loaded to compensate for wordline loading sensitivity and thus equalize access time and improve wordline decoder noise margins.

Abstract: A sensor having a silicon die having a central region and a flexible annular sensing portion surrounding the central region. The sensor has apparatus carried by the central region of the die for limiting the movement of the central region in each of two opposite directions.

Abstract: Disclosed is an interface for testing an integrated circuit device through a plurality of contacts on an exposed surface of the device. The interface comprises a flexible sheeting having first and second opposing surfaces. A plurality of contacts are disposed on the first surface of the sheet in a pattern designed to mate with a plurality of contacts on an integrated circuit device. A plurality of thin film conductors are patterned on the sheet, the conductors each being connected to a contact on the sheet and being adapted for connection to a circuit for testing the device. The interface comprises apparatus for preforming into a generally domed shape a portion of the sheet which includes a plurality of the contacts and apparatus for flexing the flexible sheet so that the contacts on both the sheet and the device may be brought into intimate contact.

Abstract: A method is disclosed for the planarization of a semiconductor device structure by a two stage planarization process which comprises: applying a dielectric layer over a first conductive layer, spin coating an organic layer onto the first dielectric layer, etching the device in a plasma etching process to substantially remove the organic planarization layer, then etching the device in a plasma etching process which etches the exposed dielectric layer to substantially remove all of it, removing the remaining organic planarization layer, followed by the application of a second dielectric layer under bias sputter deposition conditions. The bias sputter deposition fills trenches and eliminates peaks in the remaining first dielectric layer as it builds up the second dielectric layer. The process planarizes the dielectric layer without thickness variations dependent upon conductor layer pattern density.

Abstract: A circuit for monitoring digital electrical signals which counts events, compares the event count to a threshold value, generates an equal value signal when the threshold is attained and indicates the time elapsed between an initial value and the generation of the equal value signal. The event counter is automatically cleared or reset upon a user enabled automatic clear logic enabling signal. The circuit is preferably configured as a chip employing GaAs Schottky diode field effect transistor logic (SDFL) gates.

Abstract: A method of mapping at least a portion of a magnetic field with an interferometer is presented. The interferometer includes an optical fiber clad with a magnetostrictive material. The approximate direction of the magnetic field lines are determined and the optical fiber is placed substantially transverse to the magnetic field lines. The output of the interferometer is recorded for various positions of the optical fiber. The fiber can be maintained substantially transverse to the magnetic field lines during mapping, or the fiber can be positioned substantially transverse to the field lines to precisely determine the direction of field lines and substantially parallel to the field lines to determine field magnitude. In one embodiment the interferometer is adapted to produce a null output for a predetermined value of the integral of the magnetic field along the length of the optical fiber, and the optical fiber is of uniform construction.

Abstract: A voltage controlled oscillator circuit is provided wherein the frequency of the output is increased or decreased by a .+-.DC control voltage centered at 0 VDC. The output of the oscillator has a constant on/off ratio and the ratio holds constant over the frequency control range.

Abstract: Two MESFETS with the drain of one connected to the source of the other are driven in complementary fashion by a single inverter using a third MESFET and a voltage level shifter, in response to digital signals input to the inverter. Means for selectively disconnecting the power supply from the inverter to place the circuit in a low power, standby mode is provided. Depletion and enhancement mode MESFET configurations of the circuit are disclosed.

Abstract: An optical fiber is processed by ablating cladding material with an intense electromagnetic energy source. The intensity of another beam directed along the propagation axis of the fiber is monitored to detect near exposure of the fiber core. The ablating electromagnetic energy source is preferably circularly polarized. Apparatus for performing this process is disclosed. Fibers produced by this process are used to form optical couplers or, when a metallic layer is provided over the nearly exposed core region, an optical polarizer.

Abstract: A data processing system having an architecture for protecting selected system files. The data processing unit includes a secure processing unit operating in a manner independent of the operation of the remainder of the data processing unit for storing and comparing system file attributes and user entity attributes. The comparison of attributes is performed in accordance with a table in the secure processing unit containing the security context. The secure processing unit alone is able to manipulate special data groups called distinguished data objects. The secure processing unti also manipulates a data object identifier that isolates the indentification of the system files from the actual memory storage locations. Apparatus and method are also disclosed for providing secure creation of protected system files that in part eliminates interruption of the data processing system in the process. The architecture also facilitates secure transfer of files between data processing systems.

Abstract: An electronic device is provided which includes first and second memory arrays, each capable of storing data at locations therein, and an address decoder positioned between the first and second memory arrays for decoding address signals input thereto and corresponding to the locations. The address decoder is advantageously configured as a set of ISL gates or MESFET logic gates. It is further advantageous to form the memory arrays of Schottky diodes which, when employed with the ISL configuration for an address decoder, utilizes the same Schottky diode in the memory arrays as are utilized in the ISL gates. A further refinement provides a precharged circuit for each bit line.