Patents Assigned to A & A Corporation
  • Publication number: 20040062137
    Abstract: Disclosed herein are a method and structure, in an integrated circuit having at least one delay locked loop circuit (DLL), for determining a Lock Latency value of a DLL output clock signal. The disclosed method includes temporarily disabling a first clock signal in response to the DLL doing at least one of approaching and acquiring lock; and then thereafter determining a Lock Latency value in response to examining a DLL output clock signal generated in response to the first clock signal.
    Type: Application
    Filed: September 27, 2002
    Publication date: April 1, 2004
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John T. Phan, Michael Armand Roberge
  • Publication number: 20040062750
    Abstract: The present invention provides a method of treating a condition or disease characterized by an excess of one or more androgens, the method comprising administering an effective amount of MIS protein or nucleic acid encoding MIS to a patient. The present invention also provides a method of decreasing the level of one or more androgens to a level below the normal level, the method comprising administering an effective amount of MIS protein or nucleic acid encoding MIS to a patient. The methods of the present invention are particularly well-suited for the treatment of prostatic cancer, polycystic ovarian disease, benign prostatic hypertrophy, and precocious puberty.
    Type: Application
    Filed: October 10, 2003
    Publication date: April 1, 2004
    Applicant: The General Hospital Corporation
    Inventors: Patricia K. Donahoe, Jose Teixeira, Eric Fynn-Thompson
  • Publication number: 20040064439
    Abstract: A mechanism controls concurrency among database transactions through the use of serial ordering relations. The ordering relations are computed dynamically in response to patterns of use. An embodiment of the present invention serializes a transaction that accesses a resource before a transaction that modifies the resource, even if the accessor starts after the modifier starts or commits after the modifier commits. A method of concurrency control for a database transaction in a distributed database system stores an intended use of a database system resource by the database transaction in a serialization graph. A serialization ordering is asserted between the database transaction and other database transactions based on the intended use of the database system resource by the database transaction. The serialization ordering is then communicated to a node in the distributed database system that needs to know the serialization ordering to perform concurrency control.
    Type: Application
    Filed: September 2, 2003
    Publication date: April 1, 2004
    Applicant: Netezza Corporation
    Inventors: Foster D. Hinshaw, Craig S. Harris, Sunil K. Sarin
  • Publication number: 20040063800
    Abstract: This invention relates to latent foamable compositions for use in or as adhesives, sealants and/or coatings. The compositions include a curable component or a thermoplastic component, together with a latent foaming agent. In curable versions of the inventive compositions, a cure initiator or catalyst may also be included.
    Type: Application
    Filed: September 16, 2002
    Publication date: April 1, 2004
    Applicant: HENKEL LOCTITE CORPORATION
    Inventors: Karen R. Brantl, Philp T. Klemarczyk
  • Publication number: 20040061284
    Abstract: A gaming machine includes a door housing, a belly door, which constitutes a part of the door housing, having a front panel, a first hinge, connecting the door housing with the belly door so as to pivot the belly door, a back-lighting member, which illuminates a member provided on the front panel and a second hinge, connecting the belly door with the back-lighting member so as to pivot the back-lighting member.
    Type: Application
    Filed: September 26, 2002
    Publication date: April 1, 2004
    Applicant: KONAMI CORPORATION
    Inventor: Masatoshi Satoh
  • Publication number: 20040061647
    Abstract: An antenna array having one or more multi-layer substrates each including top and bottom ground planes and an inner conductive layer, a plurality of proximity coupled cavity backed patch antenna elements formed by each multi-layer substrate, and distribution traces extending along the inner conductive layer of the substrates and coupling with the proximity coupled cavity backed patch antenna elements.
    Type: Application
    Filed: September 26, 2002
    Publication date: April 1, 2004
    Applicant: Andrew Corporation
    Inventor: Joel C. Roper
  • Publication number: 20040062446
    Abstract: An image processing apparatus supporting both discrete wavelet transform and discrete cosine transform with reduced hardware resources. The image processing apparatus is composed of an input unit receiving a plurality of pixel data, a controlling unit selecting a desired transform from among discrete wavelet transform and discrete cosine transform, and providing a plurality of coefficients depending on the desired transform, and a processing unit which processes the pixel data using the plurality of coefficients to achieve the desired transform.
    Type: Application
    Filed: September 25, 2003
    Publication date: April 1, 2004
    Applicant: NEC Electronics Corporation
    Inventor: Yoichi Katayama
  • Publication number: 20040062717
    Abstract: Formulations are disclosed as are aerosols created therefrom. The formulations are comprised of (a) a pharmaceutically active drug which does not ionize in solution; (b) an electrolyte; and (c) a solvent which is preferably water and/or ethanol. The electrolyte reduces electrostatic charging on particles of aerosol formed thereby enhancing characteristics of the aerosol particles which are important for efficient, repeatable intrapulmonary drug delivery.
    Type: Application
    Filed: October 2, 2003
    Publication date: April 1, 2004
    Applicant: Aradigm Corporation
    Inventors: Joan Rosell, Igor Gonda, Jeffrey Schuster, Kui Liu
  • Publication number: 20040064725
    Abstract: A computer in a network runs a verification procedure in which it sends data packets to another computer in the network. Some or all of the data packets contain, either individually or collectively, a secret piece of information, such as a secret code. The computer then makes a determination regarding the network links between it and the other computer. If, for example, the other computer is able to respond by providing the secret piece of information back, then the computer sending the data packets concludes that the devices along the network links en route to the other computer are properly forwarding data packets.
    Type: Application
    Filed: September 18, 2002
    Publication date: April 1, 2004
    Applicant: Microsoft Corporation
    Inventors: Venkata N. Padmanabhan, Daniel R. Simon
  • Publication number: 20040064819
    Abstract: An application independent, in-kernel cache is implemented. In-kernel caches provide applications with commonly used data quickly and efficiently. Methods and instruments for storing content, cache objects, are implemented leveraging operating system supplied mechanisms. Every operating system has one or more specific means of in-kernel storage usable by kernel extensions. A system that acquires storage for the cache objects is implemented. Techniques for allowing multiple varying sources of data are defined. Multiple data sources may provide application specific and/or application independent data using various protocols. The aforementioned cache object storage mechanisms are independent of the source of the data and vise versa. Techniques for fast lookup and management of cache objects are defined. Mechanisms for moving the data from the data source into the cache object storage mechanism are implemented.
    Type: Application
    Filed: September 30, 2002
    Publication date: April 1, 2004
    Applicant: IBM Corporation
    Inventors: Jason D. LaVoie, John M. Tracey
  • Publication number: 20040061955
    Abstract: An imaging lens system includes, in the named order from the side of an object toward an image surface, a light amount diaphragm, a first lens having a positive power with a main power on the side closer to the image surface, a meniscus-shaped second lens having a negative power with a strong concave surface turned toward the image surface. Thus, it is possible to provide the imaging lens system in which a sufficiently high resolution can be obtained, while meeting the demand for a reduction in entire length of an optical system to provide the compactness.
    Type: Application
    Filed: July 15, 2003
    Publication date: April 1, 2004
    Applicant: Enplas Corporation
    Inventor: Isamu Kaneko
  • Patent number: 6707468
    Abstract: The present invention relates to a browser apparatus for browsing a variety of homepages supplied from servers over e.g. the Internet. In the browser apparatus, the address of a homepage is classified and registered through a user carrying out with a mouse a drag-and-drop action of its pointer to shift an item displayed in a region of the screen where the homepage is displayed to one of classifications determined by the user and displayed on the screen. This allows the registration of e.g. a homepage address to be much simplified.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: March 16, 2004
    Assignee: Sony Corporation
    Inventor: Akira Tange
  • Patent number: 6708274
    Abstract: A method and system for maintaining integrity and confidentiality of pages paged to an external storage unit from a physically secure environment. An outgoing page is selected to be exported from a physically secure environment to an insecure environment. An integrity check value is generated and stored for the outgoing page. In one embodiment, this takes the form of taking a one-way hash of the page using a well-known one-way hash function. The outgoing page is then encrypted using a cryptographically strong encryption algorithm. Among the algorithms that might be used in one embodiment of the invention are IDEA and DES. The encrypted outgoing page is then exported to the external storage. By virtue of the encryption and integrity check, the security of the data on the outgoing page is maintained in the insecure environment.
    Type: Grant
    Filed: April 30, 1998
    Date of Patent: March 16, 2004
    Assignee: Intel Corporation
    Inventors: Howard C. Herbert, Derek L. Davis
  • Patent number: 6708272
    Abstract: An encryption system permits end-to-end encryption of information over an untrusted interconnection network. The information encryption system includes at least one client for processing information. The system also includes at least one storage device for holding the information. At least one key server provides a data key for encrypting and decrypting the information. An encryption module is associated with each client. Each encryption module has a first processor accessing a first memory and a second processor accessing a second memory different from the first memory. The first processor communicates with the associated client. The second processor communicates with the storage device. The first processor communicates with the second processor through a dedicated channel. The second processor obtains the data key from the key server. Information is received from the first processor over the dedicated channel and encrypted using the data key. The encrypted information is then stored on the storage device.
    Type: Grant
    Filed: May 20, 1999
    Date of Patent: March 16, 2004
    Assignee: Storage Technology Corporation
    Inventors: Steven H. McCown, Thai Nguyen, Michael L. Leonhardt
  • Patent number: 6707818
    Abstract: A network switch for network communications includes a first data port interface, wherein the first data port interface supports a plurality of data ports for transmitting and receiving data at a first data rate. The network switch also includes a second data port interface, wherein the second data port interface supports a plurality of data ports for transmitting and receiving data at a second data rate, along with a third data port interface for transmitting and receiving data at a third data rate. A CPU interface is provided and configured to communicate with a CPU. The switch includes a first internal memory communicating with the first data port interface, the second data port interface, and the third data port interface. A first memory management unit having an external memory interface for communicating data from at least one of the first data port interfaces and the second data port interface to and from an external memory is also provided.
    Type: Grant
    Filed: March 17, 2000
    Date of Patent: March 16, 2004
    Assignee: Broadcom Corporation
    Inventors: Shiri Kadambi, Shekhar Ambe
  • Patent number: 6707631
    Abstract: A flying slider is disclosed for a rigid disk drive application. The slider includes a wear pad disposed at least substantially at its trailing edge on a lower surface thereof. An appropriate transducer(s) is typically embedded within this wear pad. One or more air bearing surfaces are disposed on the lower surface of the slider as well for allowing the slider to fly relative to the disk. At least one of these air bearing surfaces is disposed close to this wear pad, but is separated therefrom by a recess which is of a depth so as to not have the wear pad function as an air bearing surface. On the initial operation of the disk drive with the described slider therein, the uplifting forces applied to the slider by the noted air bearing surfaces are insufficient to dispose the wear pad above the glide avalanche of the disk or to fly the slider such that the wear pad is disposed above the glide height.
    Type: Grant
    Filed: March 20, 2000
    Date of Patent: March 16, 2004
    Assignee: Maxtor Corporation
    Inventor: Quinn J. Haddock
  • Patent number: 6708326
    Abstract: A computer method, system and program product for debugging and/or monitoring an instruction set and having an improved breakpoint handling mechanism involving a hardware debug register set (or like breakpoint register means). Instead of patching a break instruction into a debuggee instruction sequence, re-inserting the original instruction and then single stepping through that instruction before replacing it with the patch, the original instruction is left in place and continuous execution is resumed. Before resuming however, the breakpoint register is set so that the break instruction can be re-applied while a flag (eg the Intel RF flag) is set so as to prevent a hardware break before that is desired.
    Type: Grant
    Filed: November 10, 2000
    Date of Patent: March 16, 2004
    Assignee: International Business Machines Corporation
    Inventor: Suparna Bhattacarya
  • Patent number: 6706894
    Abstract: A thiol compound useful as a starting material for optical materials that have a high refractive index and a high Abbe's number is provided. A method for producing the same is also provided. The thiol compound may be represented by the general formula (1): wherein n is 1 or 2. A method for producing the thiol compound represented by the general formula (1), via an intermediate, i.e., 1,3,5-trithiane having a methylene or vinyl group at the 2,4,6-positions thereof, wherein the groups at the 2-, 4-, and 6-positions may be identical or different, is also provided.
    Type: Grant
    Filed: November 22, 2002
    Date of Patent: March 16, 2004
    Assignee: Hoya Corporation
    Inventors: Tsuyoshi Okubo, Ken Takamatsu
  • Patent number: 6707742
    Abstract: A nonvolatile semiconductor memory device which reduces the characteristic difference depending on the cell position, occurring between a cell current from a regular memory cell and a reference cell current, has a regular cell array and a reference cell array. The regular cell array has M numbers of large blocks formed by dividing the regular cell array in a column direction. Each of the M numbers of large blocks has m numbers of small blocks formed by finely dividing each of the large blocks in the column direction. The number and arrangement of the reference memory cells within the reference cell array is coincident with the number and arrangement of the memory cells arranged in the small block as a minimum unit for cell-array manufacture process.
    Type: Grant
    Filed: March 4, 2003
    Date of Patent: March 16, 2004
    Assignee: Seiko Epson Corporation
    Inventors: Teruhiko Kamei, Masahiro Kanai
  • Patent number: 6705292
    Abstract: A mounting arrangement includes a fuel injector, a fuel injector cup, and a fastener. The fuel injector includes a body that defines an interior fuel passage that extends between an inlet and an outlet. The body of the fuel injector also includes first and second exterior grooves. The first exterior groove receives a compliant seal, and the second exterior groove is located between the first groove and the outlet. The fuel injector cup includes an end that defines an aperture through which passes along an axis the inlet of the fuel injector. The fuel injector cup also includes inner and outer surfaces. The inner surface contiguously engages the compliant seal, and the outer surface includes a shoulder that faces generally opposite the end of the fuel injector cup. The fastener includes first and second portions.
    Type: Grant
    Filed: April 2, 2002
    Date of Patent: March 16, 2004
    Assignee: Siemens VDO Automotive Corporation
    Inventor: Stephen C. Bugos