Abstract: A wafer polishing head for planarizing a wafer. The wafer polishing head comprises a carrier, a retaining ring, a first pressure chamber, a second pressure chamber and an automatic control system. The retaining ring is surrounding the carrier. The first pressure chamber having a first inner pressure is disposed above the retaining ring. The second pressure chamber having a second inner pressure is disposed on the carrier. The automatic control system is respectively coupled to the first pressure chamber and the second pressure chamber.

Abstract: A system and method for storing Responsible Organization data corresponding to toll free telephone calls provides Payphone Service Providers (PSPs) with the data for billing or auditing Per Call Compensation (PCC) charges and payment. The method includes the steps of generating a query for Resp Org data corresponding to the toll-free telephone number for a call received at a Service Switching Point (SSP), sending the generated query from the SSP to a Service Control Point (SCP), extracting Resp Org identification data from the response to the generated Resp Org query, and incorporating the Resp Org identification data into a call detail record (CDR). Preferably, the Resp Org query is included in the query for call routing data but it may be a separate query. Additionally, the Resp Org identification data is preferably included in the CDR for the received call but it may be incorporated in a separate record.

Abstract: The method includes patterning a first polysilicon layer on a substrate. A first dielectric having a first via hole is defined over the substrate. A second polysilicon layer is formed along the surface of the first dielectric layer and refilled into the first via hole. Then, an etching is used to etch the layer. A residual portion of the layer is located at the lower portion of the first via hole. An undoped polysilicon is then patterned on the first dielectric layer and along the surface of the first via hole. An isolation structure is then refilled into the first via hole. An oxide layer is formed on the first polysilicon, the first dielectric layer and the upper surface of isolation structure to act as the gate oxide of the TFT. Then, the oxide and the first dielectric layer are etched to define a second via hole. A further polysilicon layer is pattern on the first dielectric layer and refilled into the second via hole for defining the gate.

Abstract: A system and method in a computer system having coupled thereto a repository for storing data, which method is implemented by the computer system. The method encodes display, entry fields and static text of a screen application (screen data) into Host Reply Definition (HRD), Request (REQ) and recognition files, which are then stored in the repository. A graphical user interface program is used for building and transforming the HRD, REQ and files stored in the repository into components. Next, the HRD, REQ and recognition files are extracted from the repository and associated with the screen application. The attributes of these files are written into a type library, thereby forming the software components. After this, the recognition file is stored in a directory structure independent of the repository. Finally, the components are registered in a registry for recognition by other applications and components.

Abstract: A method of fabricating a silicide layer on a gate electrode is described. A gate oxide layer is formed on a substrate. A gate electrode is formed on a portion of the gate oxide layer. A spacer is formed on a sidewall of the gate electrode to cover the other portion of the gate oxide layer. The spacer is removed to expose a portion of the gate oxide layer. A metallic layer is formed over the substrate to cover the gate electrode and the gate oxide layer. An annealing step is performed to transform the metallic layer in contact with the gate electrode and the source/drain region into a silicide layer. The remaining metallic layer is removed.

Abstract: A satisfactory conductive fill of a vertical trench of aspect ratio of at least 20 to 1 in a silicon substrate is obtained by heating the substrate to a temperature of about 375° C. or less in a chamber for chemical vapor deposition along with a mixture of WF6, H2, and SiH4 for filling the trench with tungsten. Also, W(CO)6 may be substituted for the WF6.

Abstract: A method of fabricating a bottom electrode is provided. A dielectric layer comprising a first opening is formed on the substrate. A conductive layer is formed on the dielectric layer to fill the first opening. A first patterned mask layer comprising a second opening is formed on the conductive layer. An isotropic etching step is performed on the conductive layer with the first patterned mask layer serving as a mask. A recess with a non-vertical sidewall is formed on the conductive layer under the second opening. The first patterned mask layer is removed. The conductive layer is patterned to form a bottom electrode with the recess. A hemispherical grained silicon layer is formed on the bottom electrode.

Abstract: Methods and apparatus for performing translation between different language are provided. The present invention includes a translation system that performs translation having increased accuracy by providing a three-dimensional topical dual-language database. The topical database includes a set of source-to-target language translations for each topic that the database is being used for. In one embodiment, a user first selects the topic of conversation, then words spoken into a telephone are translated and produced as synthesized voice signals from another telephone so that a near real-time conversation may be had between two people speaking different languages. An additional feature of the present invention is the addition of a computer terminal that displays the input and output phrases so that either user may edit the input phrases, or indicate that the translation was ambiguous and request a rephrasing of the material.

Abstract: A method of producing a contact structure for achieving an electrical connection with a contact target. The contact structure includes a contactor formed on a planar surface of a substrate by a microfabrication technology. In one aspect, the production method involves a plastic molding technology. In another aspect, the production method involves a photolithography technology using a gray-tone photomask. The contactor has at least a horizontal portion formed on the substrate and a contact portion formed on one end of the horizontal portion. A spring force of the horizontal portion of the contactor provides a contact force when the contactor is pressed against the contact target. In a further aspect, the contact structure includes a recess for providing a free space for the contactor when the contactor is pressed against the contact target.

Abstract: An apparatus including a low voltage differential signaling (LVDS) driver circuit with on-resistance cancellation, includes a current steering circuit having an on-resistance. In order to cancel the on-resistance of the current steering circuit, the LVDS driver circuit also includes a current proportional to absolute temperature current source, a transistor having an on-resistance proportional to the on-resistance of the current steering circuit, and a voltage-to-current conversion circuit coupled to the transistor, wherein the voltage-to-current conversion circuit converts the drain-to-source voltage of the transistor into a current proportional to an output current of the LVDS driver circuit. A first resistive circuit receives the current proportional to absolute temperature and the current proportional to an output current of the LVDS driver circuit and in accordance therewith provides a first reference signal.

Abstract: An apparatus and method allow a called party, who is utilizing the telephone transmission line to connect to a data network, and as such is unable to directly receive an incoming phone call from a calling party, to be able to provide a specific response message to the calling party while not requiring the called party to directly communicate with the calling party.

Abstract: A method and apparatus improve the user-friendliness of messaging systems. A message sender is requested to create a message ID which is used to identify a message being sent by the message sender. At some later time the message sender can query the message center using the sender generated message ID to ask the center to verify whether the message has either been sent to or received by the intended recipient.

Abstract: Power control for a laser used for bust mode communication as well as end-of-life detection for the laser are performed in a combined manner, resulting in a savings in both cost and power consumption. This is achieved by employing a peak comparator which is supplied with an indication of the magnitude of a the laser signal, and supplying to the peak comparator in a time multiplexed manner with different thresholds, such as a first threshold which is used for performing power control and a second threshold which is used for performing end of life detection, on an alternative packet-by-packet basis. Thus, the first threshold is supplied for the duration of a first packet and the second threshold is used for the duration of a second packet. Additional thresholds and packets may be employed for other functions as desired by an implementor.

Abstract: The present invention provides a method for fabricating a capacitor, comprising the steps of forming a trench in a substrate, forming a layer of a first material selected from the group consisting of titanium and titanium nitride in the trench, filling the trench with a conductive material to form a conductive plug, planarizing the substrate, patterning the substrate to partially expose the first material and to create a top portion and a bottom portion to the plug, wherein the bottom portion is in the substrate, and removing the first material from the top portion of the plug.

Abstract: A power amplifier includes a first amplifier, a second amplifier, a transfer switch and a controller. The first amplifier amplifies a first frequency bandwidth, and the second amplifies a second frequency bandwidth. The second frequency bandwidth is less than the first frequency bandwidth. The transfer switch includes a first input port, a second input port, a first output port and a second output port. The first input port is connected to a primary power source, while the second input port is connected to a battery. The first output port is connected to the first amplifier and the second output port is connected to the second amplifier. The controller controls the transfer switch to connect the first primary power source to the first amplifier in a primary mode of operation. The controller also controls the transfer switch to connect the battery to the second amplifier in a second mode of operation.

Abstract: An exhaust gas treatment apparatus for treating exhaust gases generated in semiconductor manufacturing processes. It includes a main pipe, a U pipe, a discharge pipe and a tank. The main pipe has an inlet to receive exhaust gases, a heater surrounding the main pipe to heat the exhaust gases to form exhaust gas powder, a sprinkler to spray cooling water to cool the heated exhaust gases to form vapor and waste water and an outlet to discharge vapor and waste water into the U pipe. The U pipe has a first connector connecting with the main pipe and a second connector connecting with the discharging pipe. The tank is located below the U pipe under the first connector for receiving lump type exhaust gas powder scrapping from the inside wall of the main pipe. The U pipe will not be blocked by the lump type exhaust gas powder so that exhaust gas treatment efficiency won't be harmfully affected.

Abstract: This invention provides a method of forming a landing pad on the drain and source of a MOS transistor. The MOS transistor is formed on a silicon substrate of a semiconductor wafer and comprises a gate on the silicon substrate with a spacer around its periphery portion, a drain and a source on the surface of the silicon substrate and on opposite sides of the gate. The method comprises forming a conductive layer of uniform thickness above the drain or source of the MOS transistor. The conductive layer is used as the landing pads for the drain or source. The height of the conductive layer is lower than that of the spacer surrounding the gate so that the spacer electrically isolates the gate and the conductive layer.

Abstract: A method for manufacturing an integrated circuit capacitor is provided in the present invention. First, a semiconductor substrate is etched to form a contact hole. A polysilicon contact is then formed to fill into the contact hole. A metal layer is formed on the substrate and the polysilicon contact. Next, a silicon catching layer is formed on the metal layer. An annealing step is performed to substitute the silicon contact with a portion of said metal layer for forming a metal contact, wherein the silicon atom are driven to react with the silicon catching layer for forming a compound layer underneath the silicon catching layer. After the metal layer, the silicon catching layer and the compound layer are removed, the first conduction layer is formed on the substrate and the metal contact to serve as a bottom electrode. Then, a dielectric layer is formed along the surface of the first conduction layer. The second conduction layer is next formed on the dielectric layer to serve as a top electrode.

Abstract: The invention provides a manufacturing method of forming a bottom plate for a capacitor on a substrate, wherein the substrate comprises a MOS transistor having a gate and a pair of source/drain regions. A crown-liked conductive plate is formed over an insulation oxide layer and a contact plug. The crown-liked conductive plate penetrates the insulation layer and the stop layer, wherein the bottom of the crown-like conductive plate is electrically connected to the contact plug. The crown-like conductive plate, served as the bottom plate for a DRAM capacitor, is composed of tungsten silicide or a combination of a tungsten nitride layer and a tungsten layer.

Abstract: A communication bus interface circuit includes a local frame signal generator responsive to a device clock signal and having a local bus frame signal output. A synchronization loss detector is responsive to the local frame signal output and to a bus frame signal input. A clock adjuster is responsive to the synchronization loss detector and to the device clock signal to adjust the local frame signal generator until synchronization between the bus frame signal and the local frame signal is established.