Abstract: A control method of a memory storage device for writing an updated data from a host to the memory storage device is provided. The memory storage device provides storage space which is divided into a plurality of physical blocks to access the updated data. The control method includes the following steps: first, determining whether the updated data is a hot data or not; finally, storing the less updated data which is not the hot data into the physical block which has the higher erase counts according to the result of above determination.

Abstract: A flash memory controller with automatic interface mode switching is applied to a flash memory apparatus with a plurality of flash memories and the controller contains: a memory interface, a microprocessor, and an interface mode controller. The microprocessor recognizes the supported interface mode of every flash memory connected with the memory interface in an initial setting process, and individually sets the corresponding interface mode setting value into the interface mode controller. Thus, when the flash memory apparatus is operating in a normal operation state, the interface mode controller can output the corresponding interface mode setting value according to the present enabled flash memory, and the memory interface can adjust and switch the interface mode according to the interface mode setting value outputted by the interface mode controller. Thereby, the present invention can achieve the purpose whereby the flash memory apparatus can speed up accessing and increase efficiency.

Abstract: Method for writing data into flash memory is disclosed. The method includes storing the frequently updated data and the not-aligned data collectively into some of the physical memory blocks of the flash memory. In other words, the method collectively writes those data into the same physical memory blocks of the flash memory as far as possible. By doing this, the invalid physical memory pages in the physical memory blocks can be generated collectively. As a result, the storage releasing efficiency of garbage collection can be greatly improved.

Abstract: The present invention discloses a control method of a multi-channel hybrid density memory storage device for access a user data. The storage device includes a plurality of low density memories (LDM) and high density memories (HDM). The steps of the method comprises: first, determining where the user data transmitted; then, using one of two error correction circuits which have different error correction capability to encode or decode the user data.

Abstract: A storage system with a data recovery function and its method reduce errors in a storage medium to a recoverable range of a general ECC function by repeating a testing and recovery procedure for one or more times to assure the accuracy of reading data and enhance the data reliability effectively. The data recovery procedure includes the steps of providing test data by a test data generator of the storage system, writing the test data into a memory block where error data is found, finding an error bit by reading the test data, reducing the error to a recoverable range of the ECC technique by the recovery procedure. If the error bit cannot be found or reduced to a recoverable range of the ECC technique within an upper limit of the number of tests, the memory block is marked as bad.

Abstract: A method for memory space management is disclosed. It uses a resident program loaded into an operation system or the controller of a storage device to monitor the storage space and the resource allocation of the file system of the storage device. The status of the logical address with an erased and invalid data mapped with a physical block is checked via a L2P mapping table. By using a data erase instruction, the controller modifies the L2P mapping table to cancel the link relation between the physical block and the logical address and erase the physical block to release the memory space. Finally, the check location is stored for a next check. The method for memory space management improves the access speed and the usage life of the storage device.

Abstract: The present invention discloses a hybrid density memory storage device configured to store data responsive to a host and a file system thereof. The hybrid density memory storage device includes a non-volatile memory, a hot data buffer and a control unit. The non-volatile memory includes a high density storage space and a low density storage space. The control unit is coupled between the host, the non-volatile memory, and the hot data buffer. The control unit has a hot list used for recording a plurality of logical locations of hot data, and the control unit is capable of accessing data in/out the hot data buffer in accordance with the hot list.

Abstract: The present invention discloses a memory system having a hybrid density memory. The memory system includes a plurality of storage spaces whereby the storage spaces have respective levels of endurance and each storage space has a plurality of blocks and pre-determined weighting factors corresponding to the levels of endurance of the storage spaces. After executing a command of erasing a specific block, the system records the erase in accordance with the weighting factor of the storage space to which the specific block belongs. Whereby, the erase counts of all the blocks of different storage spaces are able to reach respective levels of endurance as simultaneously as possible.

Abstract: The present invention discloses a control method of a memory storage device which includes a high density memory. The high density memory is composed of a plurality of MSB pages and LSB pages. The major feature of the method is such that it determines the property of data by its data length, and then decides where the data is to be written according to its property.

Abstract: A control method for the memory system is suitable for a memory system to process the user data from a host. The control unit divides the address of the storage space of the host into a plurality of logical segments for accessing data. The memory system provides a storage space with a plurality of physical segments to access data. The control method comprises the following steps. Firstly, a master table is provided in the physical memory for recording the mapping relation between the addresses of the logical units and the addresses of the physical units. When the data is written, the mapping relation between the addresses of the logical units and the addresses of the physical units is adjusted according to the wear of the physical units. Finally, the data is written into the physical segment according to the master table.

Abstract: The present invention discloses a control method of an adaptive hybrid density memory storage device suitable for locating a data to the storage device. The storage device includes a high density memory unit and a low density memory unit. The method is characterized in that the property of the data is determined by its length, and the data is written to the high density memory unit or the low density memory unit according to the property of the data and the relative wearing rate and the amount of data processed by the storage device.

Abstract: A flash memory device with a wear-leveling mechanism includes at least one flash memory, a hot list, a bitmap, a source pointer, and a controller. The controller obtains a physical memory block with high erase count through the hot list, an erase count of the physical memory block, and an overall average erase count of the flash memory device. The controller further finds out a physical memory block which stores static data through managing the bitmap and the source pointer. The controller moves the static data to the physical memory block with high erase count, and releases the physical memory block which stores the static data to avoid the physical memory block with high erase count being worn down increasingly more seriously.

Abstract: The present invention discloses a memory system having a hybrid density memory. The memory system includes a plurality of storage spaces whereby the storage spaces have respective levels of endurance and each storage space has a plurality of blocks and pre-determined weighting factors corresponding to the levels of endurance of the storage spaces. After executing a command of erasing a specific block, the system records the erase in accordance with the weighting factor of the storage space to which the specific block belongs. Whereby, the erase counts of all the blocks of different storage spaces are able to reach respective levels of endurance as simultaneously as possible.

Abstract: A flash controller performs a data correction function while executing a copy back procedure for a flash memory, and the flash memory includes at least one memory unit and a page buffer. The flash controller contains: a transmission buffer, an error correction unit, a correction information register, and a microprocessor. The microprocessor reads out a data from, the page buffer and stores the data into the transmission buffer after producing a read instruction of page copy to the flash memory. The microprocessor controls the error correction unit to check and correct the data in the transmission buffer and calculate a check result. The microprocessor produces a different program command to record the corrected data into the memory unit according to the data error quantity of the check result. Thereby, the present invention can achieve the purpose of improving the flash controller in reliability and access efficiency.

Abstract: A portable storage device comprises a protecting housing, a casing, a keystroke, a circuit board, and an electrical plug. There is an orientating hole which comprises the first fixing portion formed on the protecting housing. The casing slides in the interior of the protecting housing, and comprises a flexible arm which corresponds in position to the orientating hole. The keystroke is positioned between the flexible arm and the orientating hole, and fixed with the orientating hole when the second fixing portion formed on the keystroke is latched with the first fixing portion. Such that the electrical plug connected with the circuit board mounted in the casing can be moved selectively in or out of the protecting housing through the keystroke. Thereby, it is convenient for a user to protect the electrical plug of the portable storage device, and the reliability of the device can be improved automatically.

Abstract: A storage device capable of meeting the reliability has a storage capacity and the reliability of the storage device is defined. The storage device includes at least one first storage unit, at least one second storage unit, and a control unit. The first storage unit forms the storage capacity of the storage device. The second storage unit is allocated to form a spare capacity according to the storage capacity and the reliability. The second storage unit replaces the bad blocks in the first storage unit. The control unit controls the first storage unit and the second storage unit to transmit and convert the data with an application system. Thereby, by allocating the spare capacity of the second storage unit, the different reliability requirement is met, and the storage capacity of the first storage unit is unaffected.

Abstract: An electronic data storage device structure comprises a casing, at least one electronic data storage device, and a cap. The casing has a receiving space and at least one opening, the electronic data storage device is plugged into the opening, the cap is coupled with the casing, and the cap covers up the receiving space. Thereby, the electronic data storage device can store electronic data, and the receiving space can accommodate some beautiful or functional things.

Abstract: A solid state semiconductor storage device with temperature control function comprises a non-volatile memory unit, a temperature sensing element, and a control unit. The temperature sensing element is used for sensing the operation temperature of the solid state semiconductor storage device so as to provide a temperature sensing signal to the control unit. According to the temperature sensing signal, the control unit controls the operation mode of the solid state semiconductor storage device for achieving the function of temperature control.

Abstract: Storage apparatus can support various memory units with different standards based on the method which drives the power control-and-switch circuit in the power management unit according to a control signal caused by the ID code of a memory unit to control the second booster for further increasing the level of the external voltage or control the second regulator for further regulating or decreasing the level of the external voltage.