Abstract: Disclosed are a smart card and a manufacturing method therefor, the method includes: sequentially placing a first substrate, a middle frame and a circuit board, attaching a spacer to a periphery of the circuit board, pouring glue into the middle frame and laminating the middle frame, machining a through hole in the first substrate and an extension plate to expose a contact area; and fixing a contact module on the contact area, and punching for forming.

Abstract: A system and method for recommending a business experience package. The method includes recommending the business experience package stored in the cloud think tank, related to an industry in which a user is engaged and not downloaded to the user to the user after the user logs into the system, and recommending, according to detected content edited by the user in the man-machine interaction interface, the business experience package with the business type matching the edited content to the user; and, recommend according to the user's historical information of interest and historical search information, the business experience package with the business type related to the historical information of interest and the historical search information to the user.

Abstract: An NFC card emulation device including a button press confirmation circuit, a time-out determination unit, and a control circuit. The time-out determination unit is formed by adopting discrete components, such as, the second diode, the second resistor, the first resistor and the first capacitor, etc. When the NFC card emulation device approaches the card reader, the card reader supplies energy to the NFC card emulation device and charges the first capacitor by the control circuit, and when the NFC card emulation device is removed from the card reader, the control circuit realizes the timing function by the first capacitor; if, within the timing period, it is determined that the button press confirmation has been performed, it is determined that the button press confirmation is valid. Such a time-out determination unit has a simple structure and a low cost.

Abstract: Disclosed is a fast encoding method suitable for Reed-Solomon codes with a small number of redundancies including a step of setting parity-check matrices including presetting parity-check matrices H2 and H3 in which the number of redundant symbols s in the Reed-Solomon codes is 2 or 3. The method also includes a step of constructing the shortened Reed-Solomon codes including constructing (k, s) Reed-Solomon codes over a finite field GF(2m) that conform to the preset parity-check matrix; using k points {oi}i=1k in the R-points input {oi}i=0R?1 as message symbols, and setting the remaining points to zero; a step of encoding including recursively processing the R-points input to obatin s redundant symbols, achieving the encoding of Reed-Solomon codes with a small number of redundancies. Embodiments of the present invention further include an electronic device and a computer-readable storage medium.

Abstract: A system for controlling a smart LED display board capable of compensating for luminance of an LED includes a luminance measurement unit which creates first luminance measurement data obtained by digitizing measured luminance of each LED, an image data input unit which receives first input data about each LED, a comparison unit which selects at least one first LED having a luminance value greater than a preset reference value, and creates a compensation power value compensating for the luminance value of the selected first LED; an image data compensation unit which receives the first input data and the compensation power value and creates second input data in which a power value that is contained in the first input data transmitted to the first LED is changed into the compensation power value; and a drive unit which transmits the second input data to the first LED.

Abstract: The invention relates to an LED electronic sign board capable of power-saving per pixel line, comprising: an LED display panel; a panel driver; a switching mode power supply that receives AC power, generates driving power required to operate the LED display panel and the panel driver and supplies power to the LED display panel and the panel driver; a black line extractor that analyzes an image signal which will be displayed on the LED display panel and extracts pixel lines which becomes black per LED module; and a main controller that controls the panel driver to display an image on the LED display panel according to the image signal, and that controls a switching signal for the operation of the switching mode power supply to shut off driving power that is supplied to the pixel lines extracted by the black line extractor from the switching mode power supply.

Abstract: A control method of a memory storage device for writing an updated data from a host to the memory storage device is provided. The memory storage device provides storage space which is divided into a plurality of physical blocks to access the updated data. The control method includes the following steps: first, determining whether the updated data is a hot data or not; finally, storing the less updated data which is not the hot data into the physical block which has the higher erase counts according to the result of above determination.

Abstract: A system for controlling a smart LED display board capable of compensating for luminance of an LED includes a luminance measurement unit which creates first luminance measurement data obtained by digitizing measured luminance of each LED, an image data input unit which receives first input data about each LED, a comparison unit which selects at least one first LED having a luminance value greater than a preset reference value, and creates a compensation power value compensating for the luminance value of the selected first LED; an image data compensation unit which receives the first input data and the compensation power value and creates second input data in which a power value that is contained in the first input data transmitted to the first LED is changed into the compensation power value; and a drive unit which transmits the second input data to the first LED.

Abstract: A flash memory controller with automatic interface mode switching is applied to a flash memory apparatus with a plurality of flash memories and the controller contains: a memory interface, a microprocessor, and an interface mode controller. The microprocessor recognizes the supported interface mode of every flash memory connected with the memory interface in an initial setting process, and individually sets the corresponding interface mode setting value into the interface mode controller. Thus, when the flash memory apparatus is operating in a normal operation state, the interface mode controller can output the corresponding interface mode setting value according to the present enabled flash memory, and the memory interface can adjust and switch the interface mode according to the interface mode setting value outputted by the interface mode controller. Thereby, the present invention can achieve the purpose whereby the flash memory apparatus can speed up accessing and increase efficiency.

Abstract: Method for writing data into flash memory is disclosed. The method includes storing the frequently updated data and the not-aligned data collectively into some of the physical memory blocks of the flash memory. In other words, the method collectively writes those data into the same physical memory blocks of the flash memory as far as possible. By doing this, the invalid physical memory pages in the physical memory blocks can be generated collectively. As a result, the storage releasing efficiency of garbage collection can be greatly improved.

Abstract: The present invention discloses a control method of a multi-channel hybrid density memory storage device for access a user data. The storage device includes a plurality of low density memories (LDM) and high density memories (HDM). The steps of the method comprises: first, determining where the user data transmitted; then, using one of two error correction circuits which have different error correction capability to encode or decode the user data.

Abstract: A storage system with a data recovery function and its method reduce errors in a storage medium to a recoverable range of a general ECC function by repeating a testing and recovery procedure for one or more times to assure the accuracy of reading data and enhance the data reliability effectively. The data recovery procedure includes the steps of providing test data by a test data generator of the storage system, writing the test data into a memory block where error data is found, finding an error bit by reading the test data, reducing the error to a recoverable range of the ECC technique by the recovery procedure. If the error bit cannot be found or reduced to a recoverable range of the ECC technique within an upper limit of the number of tests, the memory block is marked as bad.

Abstract: A method for memory space management is disclosed. It uses a resident program loaded into an operation system or the controller of a storage device to monitor the storage space and the resource allocation of the file system of the storage device. The status of the logical address with an erased and invalid data mapped with a physical block is checked via a L2P mapping table. By using a data erase instruction, the controller modifies the L2P mapping table to cancel the link relation between the physical block and the logical address and erase the physical block to release the memory space. Finally, the check location is stored for a next check. The method for memory space management improves the access speed and the usage life of the storage device.

Abstract: The present invention discloses a hybrid density memory storage device configured to store data responsive to a host and a file system thereof. The hybrid density memory storage device includes a non-volatile memory, a hot data buffer and a control unit. The non-volatile memory includes a high density storage space and a low density storage space. The control unit is coupled between the host, the non-volatile memory, and the hot data buffer. The control unit has a hot list used for recording a plurality of logical locations of hot data, and the control unit is capable of accessing data in/out the hot data buffer in accordance with the hot list.

Abstract: The present invention discloses a memory system having a hybrid density memory. The memory system includes a plurality of storage spaces whereby the storage spaces have respective levels of endurance and each storage space has a plurality of blocks and pre-determined weighting factors corresponding to the levels of endurance of the storage spaces. After executing a command of erasing a specific block, the system records the erase in accordance with the weighting factor of the storage space to which the specific block belongs. Whereby, the erase counts of all the blocks of different storage spaces are able to reach respective levels of endurance as simultaneously as possible.

Abstract: The present invention discloses a control method of a memory storage device which includes a high density memory. The high density memory is composed of a plurality of MSB pages and LSB pages. The major feature of the method is such that it determines the property of data by its data length, and then decides where the data is to be written according to its property.

Abstract: A control method for the memory system is suitable for a memory system to process the user data from a host. The control unit divides the address of the storage space of the host into a plurality of logical segments for accessing data. The memory system provides a storage space with a plurality of physical segments to access data. The control method comprises the following steps. Firstly, a master table is provided in the physical memory for recording the mapping relation between the addresses of the logical units and the addresses of the physical units. When the data is written, the mapping relation between the addresses of the logical units and the addresses of the physical units is adjusted according to the wear of the physical units. Finally, the data is written into the physical segment according to the master table.

Abstract: The present invention discloses a control method of an adaptive hybrid density memory storage device suitable for locating a data to the storage device. The storage device includes a high density memory unit and a low density memory unit. The method is characterized in that the property of the data is determined by its length, and the data is written to the high density memory unit or the low density memory unit according to the property of the data and the relative wearing rate and the amount of data processed by the storage device.

Abstract: A flash memory device with a wear-leveling mechanism includes at least one flash memory, a hot list, a bitmap, a source pointer, and a controller. The controller obtains a physical memory block with high erase count through the hot list, an erase count of the physical memory block, and an overall average erase count of the flash memory device. The controller further finds out a physical memory block which stores static data through managing the bitmap and the source pointer. The controller moves the static data to the physical memory block with high erase count, and releases the physical memory block which stores the static data to avoid the physical memory block with high erase count being worn down increasingly more seriously.

Abstract: The present invention discloses a memory system having a hybrid density memory. The memory system includes a plurality of storage spaces whereby the storage spaces have respective levels of endurance and each storage space has a plurality of blocks and pre-determined weighting factors corresponding to the levels of endurance of the storage spaces. After executing a command of erasing a specific block, the system records the erase in accordance with the weighting factor of the storage space to which the specific block belongs. Whereby, the erase counts of all the blocks of different storage spaces are able to reach respective levels of endurance as simultaneously as possible.