Abstract: A RAID system includes a pair of RAID controllers adapted to operate in active-active mode, each controller including a cache memory and at least one SAS/SATA I/O chip connected to a plurality of hard disk drives. Each SAS/SATA I/O chip includes more SAS/SATA ports than required to carry data to the hard drives. The caches in the respective controllers are synchronized via the extra SAS/SATA ports in each controller.

Abstract: An expander device and method for isolating bus segments from one another in an I/O subsystem. The expander device is arranged to couple the bus segments for communication in the I/O subsystem. The expander device includes a first I/O interface circuit, a second I/O interface circuit, and an expander controller. The first I/O interface circuit is configured to be coupled to a first bus segment and is adapted to interface input and output communication signals with the first bus segment. The second I/O interface circuit is configured to be coupled to a second bus segment and is adapted to interface the input and output communication signals with the second bus segment. The expander controller is coupled to communicate the input and output communication signals between the first and second I/O interface circuits. The expander controller is further arranged to control communication between the bus segments and includes a segment controller adapted to generate a first signal.

Abstract: A two-dimensional command block queue includes a plurality of command blocks in a first linked list. One of the command blocks in a string is included in the first linked list. The string is delimited by only a tail pointer stored in a tail pointer list. Following dequeuing the string for processing, a pointer to the one command block of the string that was in the common queue is included in a string head pointer list. The tail pointer to the string is not changed in the tail pointer list following dequeuing of the string. This allows any new SCBs to be appended to the end of the string, while the string is being processed. This allows streaming of new SCBs to an I/O device that had previously been selected and is still connected to the host adapter.

Abstract: A single hardware I/O control block is used to efficiently abort a target I/O command for a target I/O device, e.g., one target I/O device in a plurality of target I/O devices. The abort command is included in the same hardware I/O control block that specified the target I/O command to be aborted. Execution of both the target I/O command and the abort command returns only one hardware I/O control block pointer and generates only one interrupt to a host system when both the target I/O command and the abort command are completed. All time relationships between the execution of the abort command and execution of the original target I/O command are supported. There are no holes where the abort command is lost or where the host system is advised of target I/O command completion prematurely, or is not advised of completion at all.

Abstract: A single host adapter hardware I/O control block contains information used to specify a transfer of data from a host system to a first target device and in addition information that specifies whether the data is to be mirrored, and if so, optionally identifies a second target device on which the data is to be mirrored. After transferring the single hardware I/O control block to the host adapter integrated circuit, the host adapter integrated circuit determines whether the hardware I/O control block specifies a mirrored transaction. If a mirrored transaction is specified, the host adapter integrated circuit generates a second hardware I/O control block for the second target device using the information in the first hardware I/O control block. When the execution of both hardware I/O control blocks is complete, the host adapter integrated circuit provides a single completion notification to the host system.

Abstract: A method for finding application components installed on a computer system for use in a backup system associated with the computer system includes creating a linked list of application components installed on the computer system. The nested directories are then traced back to find a target directory for each application component in the linked list. Thereafter, a request to find a selected application is received from a calling module. The method may further include the operations of searching the linked list for a target directory for each component of the selected application, and making the target directory for each component of the selected application available to the calling module, preferably by returning the target directories to the calling module. A computer readable media for finding application components installed on a computer system for use in a backup system associated with the computer system also is described.

Abstract: Methods and a system for combining commands for data transfers between a drive and memory. One exemplary method includes receiving multiple read or write commands in a queue. Then, a first command of the multiple read or write commands is processed. Next, the multiple read or write commands are combined. The combination includes identifying like commands each being associated with a file stored on a drive and ascertaining which of the files associated with the like commands are contiguous. Then, a combined command is created, where the combined command consolidates the identified like commands being associated with contiguous files. Next, the combined command is issued to the drive.

Abstract: A method to access an object in a computer system storage includes receiving a reference to the object, obtaining a referential map based on the reference (the referential map indicating a plurality of logical storage locations), each logical storage location associated with a portion of the object, and obtaining a physical map that is independent of the referential map from one of the logical storage locations indicated in the referential map, the physical map indicating a physical storage location of at least a part of that portion of the object being accessed. Computer storage systems providing distributed storage in accordance with this method and methods storage media having instructions to perform the method are also described.

Abstract: An invention is provided for a deskewer that corrects skew on a data channel. The deskewer includes a delay calculator that calculates deskew data indicating the amount of delay needed to correct skew on a data channel. Coupled to the delay calculator is a deskew circuit that receives the deskew data from the delay calculator and uses the deskew data to delay a bit stream on the data channel.

Abstract: A method for facilitating transfer of data between a master block and a slave block through a bus. The method includes ascertaining a transfer size of the data. The method also includes designating a first possible transfer size in a set of possible transfer sizes a chosen transfer size, the set of possible transfer sizes including possible transfer sizes ranging from 20 to 2n, where 2n at least equals to the largest transfer size desired between the master block and the slave block, the first possible transfer size presenting the largest possible transfer size in the set of possible transfer sizes that is less than or equal to the transfer size. The method additionally includes transferring a first data portion of the data from the master block to the slave block, the first data portion having a size that is equal to the chosen transfer size.

Abstract: A method and apparatus for implementing RAID through control of the IO channels on the motherboard is provided. One exemplary method locates IO channels on a motherboard. Next, the IO channels on the motherboard are controlled where the IO channels are configured to communicate with a storage media. Then the storage media associated with the IO channels is managed as a RAID. Some notable advantages of the discussed methods and apparatuses include the simplicity of implementing the host based RAID through existing infrastructure contained within a computing system. Additionally, the added benefits of improving reliability and system performance associated with a RAID subsystem are made available in a cost effective manner because most of already existing infrastructure.

Abstract: In a method for protecting data of a computer system having a hard drive with an operating system stored on a first partition thereof, the operating system is copied from the first partition of the hard drive to a second partition of the hard drive and selected data is copied from the hard drive to a backup location. Thereafter, if a crash that prevents the computer system from booting from the operating system stored on the first partition of the hard drive occurs, then the computer system is booted from the copy of the operating system stored on the second partition of the hard drive. Next, if the selected data needs to be restored back to the hard drive, then the backup location to which the selected data was copied is accessed and the selected data is restored back to the hard drive. In one embodiment, the backup location is a storage resource connected to the Internet.

Abstract: A network interface card is provided. The network interface card includes a plurality of pipelined processors. Each of the pipelined processors includes an input socket having at least three single ported memory regions configured to store variable-size data packets. The at least three single ported memory regions enable a downstream processor reading the variable-size data packets from the single ported memory regions to maintain a data throughput to support an incoming line rate of a data stream. The line rate data throughput is maintained after a maximum size data packet has been read by the downstream processor. Methods of method for optimizing throughput between a producing processor and a consuming processor and a processor are also provided.

Abstract: A method for modeling and verifying a set of transactions between a set of master devices and a set of slave devices that are coupled via a bus. The method includes determining a set of dependencies for the set of transactions, executing the set of transactions on the bus, and observing the set of transactions for the dependencies. If the set of transactions does not comprise the dependencies, the method additionally includes logging a status for the set of transactions.

Abstract: A networking application processor is provided. The processor includes an input socket configured to receive data packets. The processor includes a memory for holding instructions and circuitry configured to access data structures associated with the processing stages. The circuitry configured to access data structures enables a single cycle access to an operand from a memory location. An arithmetic logic unit (ALU) is provided. Circuitry for aligning operands to be processed by the ALU is included. The circuitry for aligning the operands causes the operand to be aligned by a lowest significant bit, wherein the circuitry for aligning the operand supplies an extension to the operand to allow the ALU to process different size operands.

Abstract: A system and method for generating a test case for testing a device to be connected to a computer is disclosed. A base test object is provided. The base test object defines test properties for a device. The base test object includes a transaction generator that generates transactions. An extending test object is created, the extending test object defines test properties for a distinct configuration of the device. The extending test object also inherits at least one test property of the base test object. The transaction generator is executed to generate several transactions for the test case, each of the transactions defining a stimulus being specifically designed to stimulate at least one test property of the distinct configuration of the device.

Abstract: Methods and an apparatus for RAID load balancing are provided. One exemplary method includes establishing first and second counters where the first counter is associated with a first drive and the second counter is associated with a second drive. Next, a command is received form an operating system. Then, it is determined if the received command is a read command. If the received command is a read command, then the counters are examined to determine which of the counters is a lower value counter or if the counters are of equal value. Next, a drive associated with the lower value counter is selected or if the counters are of equal value a first drive is selected. The lower value counter is then incremented. Then, the read command is directed to the drive associated with the lower value counter or the first drive if the counters are of equal value.

Abstract: A SCSI initiator system includes a Packetized SCSI Protocol hardware packet engine that automatically transmits Packetized SCSI protocol command blocks to a SCSI target with substantially zero latency between the transmission of adjacent command blocks. The packet engine operates independently of any other hardware circuits in the SCSI initiator that are capable of command management. The SCSI initiator system includes a target execution queue containing at least one hardware I/O control block for a SCSI target. The target execution queue is stored in a memory. The system also includes a Packetized SCSI Protocol hardware packet engine coupled to the target execution queue. The Packetized SCSI Protocol hardware packet engine generates Packetized SCSI Protocol packets using information in the at least one hardware I/O control block directly.

Abstract: A method for configuring channels of a dual channel SCSI chip is provided which includes setting at least one bit in a first configuration space within a first channel control in the dual channel SCSI chip where the first configuration space returns a device identification information when accessed by an operating system. The method also includes setting at least one bit in a second configuration space within a second channel control in the dual channel SCSI chip where the second configuration space returns data indicating that the second configuration space does not contain any device identification information when accessed by the operating system. The first channel control is detected and managed by the operating system, and the second channel control is not detected by the operating system and is managed by a device processor.

Abstract: Broadly speaking, a method and corresponding apparatus is provided for controlling a data output rate of an electronic device. More specifically, the method and corresponding apparatus enables an equivalent data output rate to be obtained from each of an ASIC and an FPGA prototype of the ASIC while maintaining equivalent logic between the ASIC and the FPGA prototype. A validity bit is attached to each output data signal in accordance with each cycle of a clock signal. The validity bit provides an indication as to whether the associated data signal should be processed (i.e., transmitted as output) normally. Only valid output data signals as identified by their validity bit value are transmitted. Thus, the validity bit values associated with successive data signals can be defined to generate a particular data output rate.