Patents Assigned to Adaptec, Inc.
-
Patent number: 6871238Abstract: A single host adapter hardware I/O control block contains information used to specify a transfer of data from a host system to a first target device and in addition information that specifies whether the data is to be mirrored, and if so, optionally identifies a second target device on which the data is to be mirrored. After transferring the single hardware I/O control block to the host adapter integrated circuit, the host adapter integrated circuit determines whether the hardware I/O control block specifies a mirrored transaction. If a mirrored transaction is specified, the host adapter integrated circuit generates a second hardware I/O control block for the second target device using the information in the first hardware I/O control block. When the execution of both hardware I/O control blocks is complete, the host adapter integrated circuit provides a single completion notification to the host system.Type: GrantFiled: February 12, 2004Date of Patent: March 22, 2005Assignee: Adaptec, Inc.Inventor: B. Arlen Young
-
Patent number: 6871295Abstract: A system and method for dynamic data recovery is described. The system and method for dynamic data recovery operates on a computer storage system that includes a plurality of disk drives for storing parity groups. Each parity group includes storage blocks. Each of the storage blocks is stored on a separate disk drive such that no two storage blocks from a given parity set reside on the same disk drive. The computer storage system further includes a recovery module to dynamically recover data that is lost when at least a portion of one disk drive in the plurality of disk drives becomes unavailable. The recovery module is configured to produce a reconstructed block by using information in the remaining storage blocks of a parity set that corresponds to an unavailable storage block.Type: GrantFiled: January 29, 2002Date of Patent: March 22, 2005Assignee: Adaptec, Inc.Inventors: Thomas R. Ulrich, James R. Schweitzer, Gregory D. Bolstad, Jay G. Randall, John R. Staub, George W. Priester
-
Publication number: 20050060613Abstract: An invention is disclosed for a segregated user interface for parameter configuration in a multi-path failover system. The segregated user interface includes a user interface module capable of receiving configuration parameters for the multi-path failover system from a user. Further included is an object module that is capable of receiving the configuration parameters from the user interface module. The object module provides functionality and can detect the current controller status of controllers and the current device status of devices. In addition, the object module is capable of configuring a failover driver using the configuration parameters received from the user interface module.Type: ApplicationFiled: October 27, 2004Publication date: March 17, 2005Applicant: Adaptec, Inc.Inventors: Eric Cheng, Yafu Ding, Chang-Tying Wu
-
Patent number: 6865669Abstract: Methods for optimizing of memory resources during an initialization routine of a computer system which prepares the computer system for loading of an operating system is disclosed. One exemplary method includes receiving a request from a system BIOS to locate an amount of conventional memory where the amount of conventional memory accommodates at least a decompressed version of data located in an option ROM BIOS. Then the amount of conventional memory requested by the system BIOS is determined. If the amount of conventional memory requested by the system BIOS is not available, the method continues and system BIOS data located within the conventional memory is read where the system BIOS data occupies at least the amount of conventional memory requested by the system BIOS. After the system BIOS data is read, the system BIOS data is written from the conventional memory to an extended memory, and the system BIOS data located in the conventional memory that has been written into the extended memory is deleted.Type: GrantFiled: July 20, 2001Date of Patent: March 8, 2005Assignee: Adaptec, Inc.Inventor: Fadi A. Mahmoud
-
Patent number: 6862631Abstract: A single host adapter hardware I/O control block contains information used to specify a transfer of data from a host system to a first target device and in addition information that specifies whether the data is to be mirrored, and if so, optionally identifies a second target device on which the data is to be mirrored. After transferring the single hardware I/O control block to the host adapter integrated circuit, the host adapter integrated circuit determines whether the hardware I/O control block specifies a mirrored transaction. If a mirrored transaction is specified, the host adapter integrated circuit generates a second hardware I/O control block for the second target device using the information in the first hardware I/O control block. When the execution of both hardware I/O control blocks is complete, the host adapter integrated circuit provides a single completion notification to the host system.Type: GrantFiled: February 12, 2004Date of Patent: March 1, 2005Assignee: Adaptec, Inc.Inventor: B. Arlen Young
-
Patent number: 6862642Abstract: Expander device and method for resetting bus segments in I/O subsystem to clear bus hang in an I/O subsystem having a plurality of bus segments. Each bus segment in the I/O subsystem includes a set of devices and a bus that is coupled to the set of devices. In addition, the I/O subsystem includes at least one expander, each expander being arranged to couple a pair of buses for propagating communication signals. A reset signal is asserted on a first bus segment. In response to the reset signal, each expander coupled to the first bus segment and each device in the first bus segment reset themselves. Additionally, each expander coupled to the first bus segment isolates the reset signal such that the reset signal is not propagated to the other bus segments. For each expander coupled to the first bus segment, all communication signals are isolated such that each expander prevents propagation of the communication signals between the first bus and other bus.Type: GrantFiled: May 15, 2001Date of Patent: March 1, 2005Assignee: Adaptec, Inc.Inventors: John S. Packer, Lawrence J. Lamers
-
Patent number: 6862692Abstract: A system and method for dynamic redistribution of parity groups is described. The system and method for dynamic redistribution of parity groups operates on a computer storage system that includes a plurality of disk drives for storing parity groups. Each parity group includes storage blocks. The storage blocks include one or more data blocks and a parity block that is associated with the data blocks. Each of the storage blocks is stored on a separate disk drive such that no two storage blocks from a given parity set reside on the same disk drive. The computer system further includes a redistribution module to dynamically redistribute parity groups by combining some parity groups to improve storage efficiency.Type: GrantFiled: January 29, 2002Date of Patent: March 1, 2005Assignee: Adaptec, Inc.Inventors: Thomas R. Ulrich, James R. Schweitzer, Gregory D. Bolstad, Jay G. Randall, John R. Staub, George W. Priester
-
Patent number: 6848022Abstract: A two-dimensional parity method and system that provides two-disk fault tolerance in an array of disks, such as a RAID system, is presented. The method includes arranging strips containing data in the disk array into horizontal and diagonal parity sets, each parity set including at least one data strip as a member and no single data strip is repeated in any one parity set. Horizontal XOR parities are calculated for each horizontal parity set and stored in a designated disk. Diagonal XOR parities are calculated for each diagonal parity set and at least some of the diagonal XOR parities are stored in a designated disk. The remaining diagonal parities are stored in a corresponding strip in a diagonal parity stripe so that no members of a contributing diagonal parity set have the same disk index as the disk index of the corresponding strip of the diagonal parity stripe.Type: GrantFiled: October 2, 2002Date of Patent: January 25, 2005Assignee: Adaptec, Inc.Inventor: Sanjeeb Nanda
-
Patent number: 6845439Abstract: A method for accessing hardware I/O control blocks, which are stored in an hardware I/O control block array, by a parallel SCSI host adapter addresses one page in a plurality of pages of the hardware I/O control block array for the parallel SCSI host adapter using a first portion of a hardware I/O control block array pointer in the parallel SCSI host adapter. The one page includes a plurality of storage sites for hardware I/O control blocks. A hardware I/O control block stored in the one page is addressed using a second portion of the hardware I/O control block array pointer in the parallel SCSI host adapter. Addressing the hardware I/O control block stored in the one page includes using a tag supplied by a reconnecting SCSI target as the second portion.Type: GrantFiled: May 31, 2001Date of Patent: January 18, 2005Assignee: Adaptec, Inc.Inventor: B. Arlen Young
-
Patent number: 6842798Abstract: A flow control method performed by a SCSI target includes receiving a data packet information unit in a Packetized SCSI Protocol Data Out phase. The SCSI target also generates a signal during said Packetized SCSI Protocol Data Out phase to indicate whether another data packet information unit is to be transmitted in said Packetized SCSI Protocol Data Out phase.Type: GrantFiled: December 20, 2000Date of Patent: January 11, 2005Assignee: Adaptec, Inc.Inventor: B. Arlen Young
-
Patent number: 6832271Abstract: A computer-implemented USB (Universal Serial Bus) monitoring and data displaying utility for monitoring and displaying information pertaining to a plurality of USB devices connected to a computer, the displaying being performed on a computer display screen communicably coupled to the computer, the information pertaining to the plurality of USB devices including status information pertaining to the plurality of USB devices. The USB utility includes a monitoring view implemented in a window of the computer display screen, the monitoring view including a set of condensed individual device information sections, each of the condensed individual device information sections displaying condensed information pertaining to one of the USB devices.Type: GrantFiled: May 23, 2002Date of Patent: December 14, 2004Assignee: Adaptec, Inc.Inventors: Jason Ivan, James Zhou, Pamela Schure, Wai-Loong Lim, Claudia Truesdell
-
Patent number: 6829663Abstract: The present invention is directed to the synchronous control of a parallel interface. In particular, the present invention provides an interface between a serial communication link and parallel communication channels within an adapter that operate synchronously, and without requiring a data buffer. A data buffer may be provided between the parallel data channels of the adapter that operate synchronously with the serial data channel, and the adapter's host interface. The present application reduces the amount of memory that must be provided by the adapter, and eliminates delays caused by the provision of additional data buffers.Type: GrantFiled: August 21, 2002Date of Patent: December 7, 2004Assignee: Adaptec, Inc.Inventors: Bahareh Ghaffari, Jeffrey F. Stone
-
Patent number: 6826646Abstract: A method for supporting data streaming by a SCSI initiator includes receiving a data packet information unit in a Packetized SCSI Protocol Data In phase. The SCSI initiator also receives a signal in said Packetized SCSI Protocol Data In phase to indicate whether a header packet information unit or another data packet information unit is to be received next in said Packetized SCSI Protocol Data In phase.Type: GrantFiled: December 20, 2000Date of Patent: November 30, 2004Assignee: Adaptec, Inc.Inventor: B. Arlen Young
-
Patent number: 6823477Abstract: An invention is disclosed for a segregated user interface for parameter configuration in a multi-path failover system. The segregated user interface includes a user interface module capable of receiving configuration parameters for the multi-path failover system from a user. Further included is an object module that is capable of receiving the configuration parameters from the user interface module. The object module provides functionality and can detect the current controller status of controllers and the current device status of devices. In addition, the object module is capable of configuring a failover driver using the configuration parameters received from the user interface module.Type: GrantFiled: January 23, 2001Date of Patent: November 23, 2004Assignee: Adaptec, Inc.Inventors: Eric Cheng, Yafu Ding, Chang-Tying Wu
-
Patent number: 6814588Abstract: A cable terminator and method for making the same is provided. The cable terminator includes a printed circuit board with termination circuitry. The cable terminator further includes a ribbon cable with a first end and a second end. The first end is electrically connected to the printed circuit board to enable termination at the first end. An encapsulating mold is provided which encloses the printed circuit board and the first end of the ribbon cable. A method for making the cable terminating circuit board includes connecting the first end of the ribbon cable to the printed circuit board and inserting the printed circuit board and connected first end of the ribbon cable into a mold. The method further includes injecting an encapsulating material into the mold.Type: GrantFiled: December 5, 2001Date of Patent: November 9, 2004Assignee: Adaptec, Inc.Inventor: Gary Wayne Dunlavy
-
Patent number: 6816915Abstract: The present invention provides methods for automatically discovering topology map of an I/O subsystem. The I/O subsystem is coupled to one or more host computers and includes one or more peripheral buses, a set of peripheral devices, and a set of expanders with each expander having a valid expander address and being arranged to couple a pair of the peripheral buses. The peripheral devices and the one or more host computers are coupled to the peripheral buses. A host computer selects a peripheral device as a target device and writes a set of entries to the selected target device. Each entry written an expander address field initialized to an invalid expander address for storing an expander address. The host computer then selects the target device and reads the set of entries from the target device.Type: GrantFiled: March 2, 2001Date of Patent: November 9, 2004Assignee: Adaptec, Inc.Inventor: John S. Packer
-
Patent number: 6813648Abstract: A method for performing domain validation testing of SCSI devices connected to a SCSI bus is provided. The method includes booting up a computer system having a SCSI device connected to the SCSI bus. The method also includes launching a domain validation utility after booting up of the computer system is complete and selecting a set of domain validation parameters using the domain validation utility. Further included in the method is issuing a domain validation command implementing the set of domain validation parameters. Performing the domain validation of the SCSI device is designed to enable validation of an optimum data transfer speed of the SCSI device over the SCSI bus.Type: GrantFiled: July 2, 2001Date of Patent: November 2, 2004Assignee: Adaptec, Inc.Inventors: Leigh A. Perona, Francis L. Nguyen
-
Publication number: 20040210794Abstract: Efficient buffer cache utilization frees a data buffer as soon as data buffer processing is completed, and without losing association of the freed data buffer and a descriptor buffer. Separate free buffer link lists identify the freed data buffer and any freed descriptor buffer. The data buffer is rapidly processed then freed generally before completion of processing of the descriptor buffer, freeing the processed associated data buffer before the associated descriptor buffer is freed. The association of the processed free data buffer and the descriptor buffer may be ended to enable the more frequent use of the large capacity data buffer for other update requests.Type: ApplicationFiled: April 16, 2004Publication date: October 21, 2004Applicant: Adaptec, Inc.Inventors: Alexander H. Frey, Keith E. Conner
-
Publication number: 20040210610Abstract: A method for transparently presenting different size operands to be processed is provided. The method initiates with providing a first operand having a first bit-width. Then, a bit width of a second operand associated with a processor is determined. The second operand has a greater bit width than the first operand. Next, the first operand is transformed by aligning a least significant bit of the first operand to a lowest bit position of a transformed operand having a bit size equal to the second operand. Then, the bits of the transformed operand are sign extended and padded in a manner to allow carry propagation. Next, the transformed operand is transmitted to the processor. A method for shifting operands and a processor are also provided.Type: ApplicationFiled: December 2, 2003Publication date: October 21, 2004Applicant: ADAPTEC, INC.Inventors: Shridhar Mukund, Mahesh Gopalan, Neeraj Kashalkar
-
Patent number: 6804739Abstract: A SCSI selective options message delay expander includes a capability for monitoring messages transferred between a first port and a second port of the expander, for delaying a pre-selected message, for modifying the delayed pre-selected message, and for storing information obtained from the delayed pre-selected message. The ability to change messages allows the expander to be used with SCSI initiators and/or SCSI target devices that have SCSI characteristics different from the SCSI characteristics of the expander.Type: GrantFiled: February 5, 2002Date of Patent: October 12, 2004Assignee: Adaptec, Inc.Inventors: B. Arlen Young, John S. Packer, Wei Chuan Goh