Abstract: A method and apparatus are disclosed for distributing power in a media converter system. The method involves converting an input voltage to an intermediate voltage and transmitting the intermediate voltage to a downstream converter. The downstream converter converts the intermediate voltage to a usable output voltage that is supplied to the media converter ports. The apparatus includes a main power supply for creating the intermediate voltage and downstream converters located remotely from the main power supply for converting the intermediate voltage to the usable output voltage. Transmission cables are also included for providing the intermediate voltage to the downstream converters. The apparatus may also include a bus with connections for the power supply and a power distribution module. The power supply and power distribution module utilize identical connections thereby providing flexibility in positioning the power supply and distribution module in a chassis.

Abstract: A system and method provide for accessing a plurality of communication lines. Each of a number of line access devices is coupled to at least one of the communication lines. A patch circuit, associated with each line access device, provides for manually establishing a cross-connection between a first and second communication line. A bus couples the first communication line with the patch circuit. A locking circuit is coupled to the bus and the patch circuit. The locking circuit selectively enables and disables patch circuit access to the first communication line in response to a control signal. The line access devices may each comprise a single line card or a front and rear line card pair. A redundant power supply arrangement provides for keep-alive backup power for the front line card in response to a failure of primary supply power delivery to the front line card.

Abstract: A communication system is proposed for transmitting at least one of the data, the program, and a combination of them from a host facility to a communicator such as a communication terminal device. In this communication system, the data or the program becomes unable to be used when a predetermined time has elapsed after it is transmitted from the host facility to the communicator. This communication system is provided with the function of giving a warning before the use of the transmission becomes unable and the function of resuming the use in accordance with the user's instruction even after the use becomes unable.

Abstract: A fiber termination block including a frame structure adapted to be connected to a fiber distribution rack. The frame structure includes a front end and a rear end. A front fiber optic adapter array is positioned adjacent the front end of the frame structure. A plurality of rear modules are mounted at the rear end of the frame structure. Each of the rear modules defines a front opening. At least one coupler is mounted within each of the rear modules. A plurality of fiber optic cables are provided for transmitting fiber optic signals between the front fiber optic adapter array and the couplers. The fiber optic cables extend through the front openings of the rear modules to access the couplers.

Abstract: A method for controlling a plurality of service units in a telecommunications system with a multi-carrier transmission scheme is provided. Specifically, in one embodiment, the method includes broadcasting control signals for the service units over a plurality of control channels distributed in a number of subbands of a frequency bandwidth. The method further includes identifying the service unit to use the control signal with an identifier.

Abstract: An optical communication system is provided. The optical communication system includes an optical fiber, an optical transmitter, and an optical receiver. The optical transmitter is coupled to the optical fiber. The optical transmitter is adapted to encode a pulse amplitude modulated optical signal based on at least two, independent input signals. The optical receiver is coupled to the optical fiber. The optical receiver is adapted to decode the pulse amplitude modulated optical signal to reproduce the at least two, independent input signals as output signals.

Abstract: A digital to analog converter is provided. The converter includes a multi-bit counter, a first and a second plurality of logic gates coupled to the multi-bit counter, a digital input selectively coupled to the first and second plurality of logic gates. . The converter further includes a first AND gate coupled to an output of the first plurality of logic gates and a second AND gate coupled to an output of the second plurality of logic gates. In addition, the converter includes a clock coupled to an input of the first and second AND gates and an input of the multi-bit counter and a filter coupled to an output of the first and second AND gates, wherein the filter includes an output for an analog signal based on the digital input.

Abstract: A modular jack assembly for connecting and switching computer network cables. The jack assembly includes at least one jack module with two sets of connectors for linking wires from cables to the module and at least one jack. The modules within jack assembly slide between a first position and a second position. In the first position, the two sets of connectors linked to cables are electrically connected to each other, allowing normal through signals transmission. In the second position, the electrical connection between the connector sets is broken and the plug contacts within each jack are linked to one of the sets of connectors, allowing pass-through connections, such as a cross-connection, to be made.

Abstract: A tool for installing and extracting a fuse is provided. The tool has a first bar that has a jaw at one end of the first bar. The tool has second bar that is slidably attached to the first bar and that has a jaw at one end of the second bar. The respective jaws are adapted to align by sliding the respective bars relative to each other to retain the fuse between the respective jaws.

Abstract: A fiber optic cabinet has internal aligned guides on opposite sides of an axis opening. A splice tray has a planar tray base with a tray axis orthogonal to the base. The base has a peripheral edge sized for opposite portions of the peripheral edge to be slidably engaged with opposing ones of the aligned cabinet guides. The tray base is slidably received within the aligned guides regardless of a rotational position of the tray base about the tray axis. A fiber pathway guide is carried on the tray base for receiving a wound amount of optical fiber on the guide as the tray base is rotated about the tray axis.

Abstract: An integrated circuit for amplifying a signal and having an input that receives the signal and an output that outputs an amplified signal is provided. The integrated circuit has a first switch having at least two outputs. The first switch is coupled to the input of the integrated circuit and receives the signal from the input of the integrated circuit. In addition, the integrated circuit has a second switch having at least two inputs. The second switch is coupled to the output of the integrated circuit and transmits the amplified signal to the output of the integrated circuit. The integrated circuit has a first transistor that has a noise figure, an input coupled to one of the outputs of the first switch, and an output coupled to one of the inputs of the second switch. Moreover, the integrated circuit has a second transistor in parallel with the first transistor.

Abstract: Methods for bit-level control of dynamic bandwidth allocation are adapted for use in multi-node channelized transport systems. A single status bit is used to indicate the desired allocation status of each transport channel for which dynamic allocation is permitted or desired. The status bit has a first logic level indicative of a desire to have a first allocation status, such as allocated for data traffic, and a second logic level indicative of a desire to have a second allocation status, such as allocated for voice traffic. The status bit may be repeated multiple times within a frame to mitigate the effects of transmission errors. The values of the status bit or bits can be maintained across node boundaries without regard to the framing mechanisms or multiplexing techniques used by the transport system, thus permitting dynamic bandwidth allocation beyond the local loop.

Abstract: A digital to analog converter is provided. The converter includes a multi-bit counter, a first and a second plurality of logic gates coupled to the multi-bit counter, a digital input selectively coupled to the first and second plurality of logic gates. The converter further includes a first AND gate coupled to an output of the first plurality of logic gates and a second AND gate coupled to an output of the second plurality of logic gates. In addition, the converter includes a clock coupled to an input of the first and second AND gates and an input of the multi-bit counter and a filter coupled to an output of the first and second AND gates, wherein the filter includes an output for an analog signal based on the digital input.

Abstract: A scanning method for establishing communication between a head end and a plurality of remote units in a multi-point to point communication system is described. The method includes transmitting information from the head end to the plurality of remote units in a plurality of regions of a first frequency bandwidth, each of the regions having at least one control channel associated therewith, identification information corresponding to each of the remote units of the plurality of remote units being periodically transmitted from the head end on the at least one control channel of one of the plurality of regions of the first frequency bandwidth.

Abstract: A wireless communication system. The wireless communication system includes a first wireless communication network communicating at a first range of frequency. The wireless communication system also includes a second wireless communication network that is communicatively coupled to the first wireless communication network. Additionally, the second wireless communication network communicates at a second, different range of frequency. Further the first communication network geographically overlaps with a select portion of the second communication network.

Abstract: A method of ring protection is provided. The method includes feeding traffic on two transmission rings at a head end node and summing all traffic received on the transmission rings at the head end node. When a facility failure is detected, by a remote node, on one of the two transmission rings, transmitting forward alarm signals on the one transmission ring and return alarm signals on the other transmission ring and globally selecting the one transmission ring to transmit traffic and the other transmission ring to receive traffic from the head end node. When a remote node receives a forward alarm signal, the remote node passes the forward alarm signal on the transmission ring on which the forward alarm signal was received and globally selects the transmission ring on which the forward alarm signal was received to transmit traffic and the other transmission ring to receive traffic from the head end node.

Abstract: There are disclosed methods and apparatus for testing memory components for faults, defects or the like, by generating a testing sequence that produces various bit combinations as well as current changes, that when coupled, stresses or fatigues the memory component, and allows for the evaluation of single bits. The testing sequence is provided in cycles, formed of complement word pairs of N bit words. The first, or initial, cycle typically includes a first word of all binary zeros. Successive or subsequent cycles include a shifted bit in each subsequent first word. The testing pattern is written into the memory component(s) under test and corresponding words are read from the memory component(s). The written and read words are then compared, with this comparison analyzed for detection of faults, defects or the like in the memory component(s).

Abstract: An electronic system is provided. The electronic system includes a logic device and at least one input/output interface coupled to the logic device. The electronic system further includes an input/output (I/O) device with memory coupled to the at least one input/output interface, wherein the memory of the I/O device is mapped as an address space region that is directly readable and writable by a processor.