Abstract: A data transmission scheduler subsystem for a multi-channel bank communication system architecture contains a plurality of ‘per port’ schedulers. Each per port scheduler is resident in the system's primary channel bank, and is operative to controllably cause customer-destined data, that has been buffered from a communication network into switch fabric storage circuitry of the primary channel bank, to be controllably read out for downlink transmission to associated destination data ports of the channel banks at the destination data ports' data rates.
Type:
Grant
Filed:
August 31, 2004
Date of Patent:
April 7, 2009
Assignee:
Adtran, Inc.
Inventors:
Richard A. Burch, Neil M. Jensen, Dennis B. McMahan, Timothy David Rochell
Abstract: An alarm indication translation mechanism in a digital access and cross-connect system monitors all incoming tributary DS1 streams for the presence of an alarm indication. Whenever an alarm indication is detected in a fractional tributary DS1 data stream, all DS0 bytes within the T1 stream containing that tributary DS1 data stream include the detected alarm indication. For a Yellow alarm, this means that for the case of D4 superframe format (SF), the second most significant bit of each of the twenty-four bytes of a T1 frame containing at least one fractional DS1 carrying alarm information is set to a ‘0’, irrespective of whether the bytes are valid DS0s or idle bytes. For extended superframe format (ESF), Yellow alarm is transmitted by sending a repetitive sixteen bit pattern consisting of eight marks or ‘1’s, followed by eight spaces or ‘0’s in the data link.
Abstract: A method and apparatus detects a ground fault on a span-powered telecommunication wireline within a plurality of span-powered wireline segments, to respective ones of which DSL-Cs are coupled, so that a ground fault may be detected when power is delivered by the DSL-C over a respective wireline segment to a respective downstream functional RT. A respective DSL-C measures a first voltage across a first sense resistor representative of current flowing in a first portion of its wireline segment to the RT, and also measures a second voltage across a second sense resistor representative of current flowing in a second portion of the wireline segment from the RT. In response to a difference in the first and second voltages an output representative of a ground fault in that wireline segment is generated.
Abstract: A system and method provide transparent LAN services in a metro-WAN environment to extend enterprise LANs over metro and wide area networks. The transparent LAN services generally provide customers with a layer two Ethernet connectivity with MAC learning capabilities.
Type:
Application
Filed:
November 20, 2008
Publication date:
March 19, 2009
Applicant:
ADTRAN, INC.
Inventors:
VINAY BANNAI, THEODORA KARALI, PETER GEOFFREY JONES, JACQUELINE M. ZOUCHA, ARUN SASTRY
Abstract: A system for adaptively updating precoder taps comprises a first signal path, a second signal path, a delay mechanism, and logic. The first signal path is configured to receive encoded signals. The first signal path has a decoder that is configured to decode the encoded signals thereby recovering data originally transmitted from a remote transmitter. The delay mechanism is configured to receive and delay the encoded signals. The second signal path is connected in parallel with the first signal path and is configured to receive the encoded signals delayed by the delay mechanism. The second signal path has an adaptive filter configured to filter the encoded signals received by the second signal path based on a set of coefficients of the adaptive filter. The adaptive filter is configured to adaptively update the coefficients based on the data recovered by the first signal path.
Type:
Grant
Filed:
August 31, 2004
Date of Patent:
January 27, 2009
Assignee:
Adtran, Inc.
Inventors:
Ayman Ghobrial, Fred Chu, Michael D. Turner, Kevin W. Schneider
Abstract: A policing engine for use in a telecommunication equipment shelf is operative to control the rate at which customer-sourced ATM packets are passed to buffers associated with different classes of service to which customers may subscribe. The policing engine examines the rate at which ATM cells are supplied to it from the line card ports, whether the cells are AAL5 cells, and how full are the buffers into which the cells are to be written. If cells are supplied to the policing engine at a rate faster than prescribed peak or sustained cell rates, or if the cell buffer begins to fill up, the policing engine controllably discards incoming cells, thereby effectively ‘throttling’ the cell flow rate through it.
Type:
Grant
Filed:
August 31, 2004
Date of Patent:
January 13, 2009
Assignee:
Adtran, Inc.
Inventors:
Richard A. Burch, Neil M. Jensen, Dennis B. McMahan, Timothy David Rochell
Abstract: A clip is attachable to a flange of a connector terminating an electrical cable, and is configured to mechanically couple one side of the flange to an edge of a connector-installation aperture of a chassis, such that a distal end of the connector may engage a receptacle within the chassis. When the connector, with the clip attached, is placed in the chassis' connector-installation aperture, a notch region of the clip engages the chassis at an edge of its connector-installation aperture, causing a bore on a second side of the flange to be coaxial with a bore in the chassis, so that a hardware fitting therethrough may secure the connector to the chassis.
Abstract: A cable simulator that comprises an input device configured to receive a communication signal. The cable simulator further comprises a circuit configured to simulate attenuation in both the differential mode and common mode components of a communication signal.
Abstract: A system for controlling transceivers based on a location of the transceivers, as indicated by a location indicator, helps to reduce crosstalk interference in signals transmitted from central offices. The system utilizes a location indicator and logic. The location indicator is communicatively coupled to each of a plurality of transceivers and is indicative of whether the plurality of transceivers are located at an intermediate terminal or a central office. The logic is configured to control a physical layer of each of the transceivers based on the location indicator.
Abstract: An anomaly detection system comprises an echo canceler and anomaly detection logic. The echo canceler has a plurality of taps respectively associated with a plurality of tap coefficients. The anomaly detection logic is configured to determine a difference between a new tap coefficient associated with one of the taps and a previous tap coefficient associated with the one tap. The anomaly detection logic is configured to perform a comparison between the difference and a threshold and to detect an anomaly along a telecommunication line based on the comparison.
Type:
Grant
Filed:
December 4, 2003
Date of Patent:
December 2, 2008
Assignee:
ADTRAN, Inc.
Inventors:
Gary Hunt, Fred Chu, Lee T. Gusler, Jr.
Abstract: A data communication system for communicating between a central office and a remote premises comprises a first transceiver, a second transceiver, and control logic. The first transceiver is coupled to a first communication connection extending from the central office to the remote premises and is configured to communicate with a central office transceiver. The second transceiver is coupled to a second communication connection extending from the central office to the remote premises. The control logic resides at the remote premises and is configured to detect an error condition associated with communication between the first transceiver and the transceiver located at the central office.
Type:
Grant
Filed:
March 1, 2004
Date of Patent:
November 25, 2008
Assignee:
Adtran, Inc.
Inventors:
John B. Bartell, Dean D. Bekken, II, Mark J. Ogden
Abstract: A single switch fabric-based, multi-channel bank digital subscriber line access multiplexer includes a master channel bank containing a master switch module in which the switch fabric and a downstream-directed traffic scheduler reside, and one or more expansion channel banks that are linked with the master channel bank by way of upstream and downstream communication links. Distributed among the channel banks are respective policing mechanisms and cell rate control mechanisms that control upstream-directed communications from line card ports of each expansion channel bank to the switch fabric. Downstream data transmissions are locked to network timing, and are scheduled by a centralized scheduling mechanism resident in the master channel bank.
Type:
Grant
Filed:
August 31, 2004
Date of Patent:
October 7, 2008
Assignee:
Adtran, Inc.
Inventors:
Richard A. Burch, Neil M. Jensen, Dennis B. McMahan, Timothy David Rochell, Robert James Toth
Abstract: A transformer interface prevents a false ground fault interrupt in a power supply arrangement. The power supply arrangement has a line wire and a neutral wire connected by way of a ground fault interrupt circuit to an electrically powered device, to which a ground wire is also coupled. The interface has current imbalance sensor transformer windings coupled to the line and neutral wires. A ground wire current sensor transformer winding is coupled to the ground wire. A detector transformer winding produces a signal that triggers operation of the ground fault interrupt circuit, in response to the difference between currents produced by the current imbalance sensor transformer windings exceeding detected ground wire current by a prescribed value.
Abstract: A dual PHY-based integrated access device (IAD) platform employs a highly integrated time division multiplexed (TDM), a synchronous transfer mode (ATM) cell based architecture, to provide enhanced interfacing flexibility for multiple and diverse signaling protocols, effectively reducing the cost and constraints as to choice of host processor used in conventional digital signal processor (DSP)-based IADs. With the signaling transport speed of the dual PHY based path being an order of magnitude greater than that of any of the plurality of communication paths with which the IAD is interfaced, the IAD of the invention provides effectively real time support for different communication requirements, including TDM, ATM, HDLC, and the like.
Type:
Grant
Filed:
October 1, 2002
Date of Patent:
April 29, 2008
Assignee:
Adtran, Inc.
Inventors:
Paul Graves McElroy, Phillip Stone Herron, Bruce Edward Mitchell, Darrin Leroy Gieger
Abstract: For diagnostic and trouble-shooting purposes, an audio/voice signal capture mechanism is adapted to be interfaced with a time division multiplexed (TDM) transport path-cascaded echo canceler and compression arrangement for an integrated access device (IAD). The audio/voice signal capture mechanism captures a ‘snapshot’ of the audio/voice signals by storing a prescribed number of seconds of audio/voice path signals transmitted in both directions through the IAD, and time stamping the captured audio/voice signals and associated signaling events of interest. In this way, the invention operates as a ‘virtual’ oscilloscope, as it is able to capture pertinent data for any voice call problem along with an associated time stamp event log.
Abstract: A router in one embodiment of the present disclosure has first router logic and boot logic. The first router logic is configured to operate the router, and the boot logic is configured to receive updated router logic from a network and to perform a first reboot. The boot logic is further configured to initialize deactivation of the first router logic and initialize activation of the updated router logic during the first reboot such that a plurality of functions for the router are enabled during execution of the updated router logic. The boot logic is also configured to perform, in response to an error during execution of the updated router logic, a second reboot such that at least one of the functions is disabled.
Abstract: An inter-channel bank addressing and identification protocol, for use with a multi channel bank, digital subscriber line access multiplexer (DSLAM), enables the control processor of a master channel bank to selectively communicate with control processors of subtended slave channel banks, and allows a subtended slave shelf to retain provisioning information, irrespective of a change in shelf location or removal of a subtended slave shelf between the master shelf and another subtended slave shelf. The inter-channel bank addressing and identification protocol uses a shelf address code that is controllably incremented or decremented during the transport of a packet between the master and a slave shelf. In addition, a shelf address code is assigned each slave shelf during initialization. These two codes enable the master to track which channel bank is in which shelf bay.
Type:
Grant
Filed:
August 31, 2004
Date of Patent:
March 25, 2008
Assignee:
Adtran, Inc.
Inventors:
Robert James Toth, Neil M. Jensen, Dennis B. McMahan, Timothy David Rochell
Abstract: A communication system for transmitting (T1) digital communication signals between a transmit site and a receiver site includes an M:1 multiplexer, coupled to a rate 1/N convolutional encoder, which is operative to output an encoded output signal modulated in quaternary phase shift keyed (QPSK) space having a prescribed symbol rate. The receive site has a rate 1/N Viterbi decoder which is operative to decode the encoded output signal output by the rate 1/N convolutional encoder, and a 1:M demultiplexer having an input coupled to the Viterbi decoder and M plurality of outputs, and being operative to demultiplex the decoded signal from the Viterbi decoder into a plurality of M time division multiplexed digital communication signals. For any selected values for of M and N, the product of M and N is constant.
Abstract: Whether or not protection circuitry for a span-powered remote digital subscriber loop unit is properly connected to earth ground is determined by the deliberate assertion and detection of a ground fault from a central office line card location. The span-powered remote unit is augmented to place a controllable conduction path in circuit with the span-powered loop and an earth ground pin. If the earth ground pin has been properly connected to earth ground, applying the conductive path will place a ground fault on the span, which is detected by a ground fault detector within the central office line card. If the ground fault detector does not detect a ground fault in response to the application of the conductive path, the line card forwards a negative ground fault event message to a test center, so that a service technician may be dispatched to the remote unit to correct the problem.
Type:
Grant
Filed:
December 8, 2005
Date of Patent:
November 27, 2007
Assignee:
Adtran, Inc.
Inventors:
Bradley Dwayne Tidwell, Steven M. Robinson, James Michael Hawkins