Abstract: The a trench semiconductor device such as a power MOSFET the high electric field at the corner of the trench is diminished by increasing the thickness of the gate oxide layer at the bottom of the trench. Several processes for manufacturing such devices are described. In one group of processes a directional deposition of silicon oxide is performed after the trench has been etched, yielding a thick oxide layer at the bottom of the trench. Any oxide which deposits on the walls of the trench is removed before a thin gate oxide layer is grown on the walls. The trench is then filled with polysilicon in or more stages. In a variation of the process a small amount of photoresist is deposited on the oxide at the bottom of the trench before the walls of the trench are etched. Alternatively, polysilicon can be deposited in the trench and etched back until only a portion remains at the bottom of the trench. The polysilicon is then oxidized and the trench is refilled with polysilicon.
Type:
Grant
Filed:
May 25, 1999
Date of Patent:
September 18, 2001
Assignee:
Advanced Analogic Technologies, Inc.
Inventors:
Richard K. Williams, Wayne B. Grabowski
Abstract: A current-limited switch contains a pilot circuit in parallel with a power MOSFET and a reference circuit containing a series of parallel circuits, each of which contains a current mirror MOSFET in parallel with a resistor. A current mirror compensation circuit contains circuitry which shorts out the parallel circuits in sequence as the current through the power MOSFET increases, thereby limiting the size of the current through the power MOSFET. In a preferred embodiment a second MOSFET is used in each parallel circuit in place of the resistor.