Abstract: A memory device and a method of operating the same are provided. The memory device may include a memory block including a plurality of memory cells, peripheral circuits configured to perform an erase operation including a gate induced drain leakage (GIDL) current generation operation and a data erase operation using an GIDL current on the memory block, and control logic configured to control the peripheral circuits to perform the erase operation, wherein the control logic is configured to control the peripheral circuits to apply a negative voltage to word lines of the memory block during the GIDL current generation operation.

Abstract: A memory device includes a memory cell array including a plurality of memory cells, respectively connected to a plurality of bitlines, a first multiplexer including a plurality of transistors connected to the plurality of bitlines, a reference circuit that generates reference current, a decoding circuit that transmits the reference current to the first multiplexer, and a control logic circuit connected to the reference circuit and the decoding circuit. The control logic circuit controls control the decoding circuit to apply the reference current to transistors, connected to each of at least two bitlines, such that predetermined first current flows through the at least two bitlines.

Abstract: This disclosure is directed to medical systems and techniques for dynamic configuration of medical devices. In one example, a method is configured to access a data structure comprising an algorithm for health event detection in patient data generated by at least one of a medical device of the patient or a personal device of the patient based on a usage scenario. An association of the algorithm and the usage scenario in the data structure indicates that use of the algorithm for the usage scenario complies with one or more jurisdictional requirements.

Abstract: The present disclosure relates to a movable protector for fixing a high-voltage wire used for a vehicle, which improves an operation of fastening a high-voltage connector using a movable clip absorbing a wiring slack length of, and maintaining a path for, the high-voltage wire.

Abstract: A wireless power transmission coil comprising a first helical coil portion, a first spiral coil portion, a second helical coil portion, a second spiral coil portion, and a third helical coil portion which comprise windings with a common central axis. The inner end of the first spiral coil portion is connected to the upper end of the first helical coil portion. The upper end of the second helical coil portion is connected to the outer end of the first spiral coil portion. The inner end of the second spiral coil portion is connected to the lower end of the first helical coil portion. The lower end of the third helical coil portion is connected to the outer end of the second spiral coil portion. In this way, imbalance in winding currents of the coil is eliminated to reduce alternating-current resistance of the coil.

Abstract: A rotary variable differential transformer for measuring angular displacement and method of manufacturing the same are provided herein. The rotary variable differential transformer includes a stator configured to house a primary coil configured to receive an alternating current, a first secondary coil electromagnetically coupled to the primary coil, and a second secondary coil electromagnetically coupled to the primary coil. The rotary variable differential transformer also includes a rotor positioned concentrically within the stator. The rotor is configured to receive a shaft and rotate with the shaft while the stator remains stationary. The primary coil is positioned at a first radial position within the stator spaced between about 90 to 150 degrees from each of the first secondary coil and the second secondary coil.

Abstract: The present disclosure discloses a magnetic element and a method of forming the same. The magnetic element includes a magnetic core including a magnetic column; a first electric conductor disposed on the magnetic column and including n conductive sheets, where n is an integer greater than or equal to 2, wherein the adjacent conductive sheets are fixed and formed in advance through an insulating material, each of the conductive sheets includes a main body part and a pin part extending outwardly from the main body part, and pin outlet directions of the pin parts of the adjacent conductive sheets form 360/n degrees; and a second electric conductor disposed on the magnetic column and interleaved with the first electric conductor along an axial direction of the magnetic column.

Abstract: The present inventive concept provides a method of forming a dielectric film comprising a step of supplying a first source gas; a step of supplying a first purge gas; a step of supplying a first reaction gas; and a step of supplying a second purge gas, wherein the step of supplying the first source gas comprises supplying a compound containing at least one metal selected from the group consisting of lanthanum (La), cerium (Ce), strontium (Sr), gadolinium (Gd), hafnium (Hf), and zirconium (Zr) into a vacuum deposition apparatus, and wherein the step of supplying the first reaction gas comprises supplying a compound selected from the group consisting of O3 and H2O into the vacuum deposition apparatus.

Abstract: A structure of an asymmetric supercapacitor and a preparation method thereof is disclosed. In some implementations, the preparation comprises the steps of forming a polyaniline (PANI) nanowire on carbon cloth (CC) substrate (PANI/CC) by polymerization of an aniline, depositing a cobalt-nickel layer double hydroxides (CoNi-LDHs) on the PANI/CC by a hydrothermal process, and calcining of the cobalt-nickel layer double hydroxides (CoNi-LDHs) in the PANI/CC at a high temperature to form a metal carbide (CoC@NiC) on the carbon cloth. The structure of the asymmetric supercapacitor includes a metal carbide (CoC@NiC) as a positive electrode, a tungsten trioxide (WO3@C) as a negative electrode, and a poly (vinyl alcohol)/Potassium hydroxide (PVA/KOH) as an electrolyte gel.

Abstract: A metallized film manufacturing device that includes: a feeding unit that feeds a dielectric film in a longitudinal direction; a printing roll that has a rotation axis along a width direction of the dielectric film, and prints an insulation pattern on a surface of the dielectric film, the printing roll has a protrusion extending on an outer circumferential surface of the printing roll in an axial direction of the printing roll and that corresponds to the insulation pattern, and a reinforcing portion is at a first end of the protrusion, the first end being an end in the axial direction of the printing roll; and a vapor deposition unit that forms a metal vapor deposition electrode in a place on a surface of the dielectric film where the insulation pattern is not printed.

Abstract: A switching apparatus includes a switching contact member, a common contact member, a movable contact member, and a holding member. The movable contact member includes a main body, a pair of contact pieces juxtaposed so as to clamp the switching contact member, and a common contact portion that comes into contact with the common contact member. The holding member includes a housing portion configured to house a housed portion of the main body, and when the housed portion is snap-fitted into the housing portion, the holding member restricts, for the main body, at least one of displacement in a direction along the moving direction of the movable contact member and displacement in a direction perpendicular to the moving direction while allowing a predetermined displacement in a direction perpendicular to both of the directions.

Abstract: An air circuit breaker is disclosed. The air circuit breaker, according to an aspect of the present disclosure, may comprise: an operation unit in which an arc is generated by operating a mover with respect to a stator; an arc extinguishing unit installed on an upper portion of the operation unit and primarily extinguishing the arc; and an insulation member installed on one side of the arc extinguishing unit and blocking a moving space of high temperature gas between the arc extinguishing unit and a terminal to prevent the high temperature gas generated in the arc extinguishing unit from moving toward the terminal. According to this configuration, the insulation member may insulate an arc moving from the arc extinguishing unit to the terminal.

Abstract: The present disclosure discloses an arc path formation unit and a direct current relay including the same, which can effectively guide a generated arc to the outside, including a magnet holder unit disposed between the outside of an arc chamber and the inside of a frame and including a first holder and a second holder different from each other, and a magnet unit attached to one surface of the magnet holder unit facing the arc chamber and forming a magnetic field in the arc chamber, wherein the first holder and the second holder are each bent at a predetermined angle and extended, the magnet unit is attached to both ends thereof, and a magnetic field formed in the magnet unit forms an electromagnetic force together with the electric current energizing through the direct current relay to guide the arc in a direction away from a fixed contact.

Abstract: A plasma processing apparatus may include a support configured to receive a substrate, a gas distribution plate (GDP) including a plurality of nozzles facing the support, a main splitter configured to supply a process gas, and an additional splitter configured to supply an acceleration gas or a deceleration gas. The plurality of nozzles may include a plurality of central nozzles, a plurality of outer nozzles, a plurality of middle nozzles configured to spray the process gas and the acceleration gas, a plurality of first nozzles, and a plurality of second nozzles.

Abstract: An anti-plasma coating formed on a surface of a component in a plasma chamber includes an insulation layer on the surface and a plasma-resistant layer on the insulation layer. The plasma-resistant layer includes one or more stacks, where each stack includes a crystalline layer and an amorphous layer. The anti-plasma coating improves a lifetime of the component in the plasma chamber with high-energy plasma sources.

Abstract: A doped or undoped silicon carbide film can be deposited using a remote plasma chemical vapor deposition (CVD) technique. One or more silicon-containing precursors are provided to a reaction chamber. Radical species, such as hydrogen radical species, are provided in a substantially low energy state or ground state and interact with the one or more silicon-containing precursors to deposit the silicon carbide film. A co-reactant may be flowed with the one or more silicon-containing precursors, where the co-reactant is a carbon-containing precursor and each silicon-containing precursor is a silane-based precursor with at least a silicon atom having two or more hydrogen atoms bonded to the silicon atom.

Abstract: A method for patterning a stack having a mask with a plurality of mask features is provided. A targeted deposition is provided, wherein the targeted deposition comprises a plurality of cycles, wherein each cycle comprises flowing a precursor to deposit a layer of precursor and targeted curing the layer of precursor, comprising flowing a curing gas, flowing a modification gas, forming a plasma from the curing gas and modification gas, and exposing the layer of precursor to the plasma providing a targeted curing, wherein plasma from the curing gas cures first portions of the layer of precursor and plasma from the modification gas modifies second portions of the layer of precursor, wherein the modification of the second portion reduces curing of the layer of precursor of the second portions of the layer of precursor. The stack is etched through the targeted deposition.

Abstract: A method for manufacturing a semiconductor device includes: preparing a substrate made of a compound semiconductor containing a first element and a second element that is bonded to the first element and has an electronegativity smaller than that of the first element by 1.5 or more; causing an electric current to flow in the substrate; and dividing the substrate at a position including a current region where the electric current is caused to flow and along a cleavage plane of the substrate. A method for manufacturing a semiconductor device includes: stacking a first substrate and a second substrate each made of the compound semiconductor; and bonding the first substrate and the second substrate by causing an electric current to flow between the first substrate and the second substrate.

Abstract: A method includes providing a structure having a substrate, a fin-shape base protruding from the substrate, an isolation structure on sidewalls of the fin-shape base, and an epitaxial feature over the fin-shape base. The substrate is at the backside of the structure and the epitaxial feature is at the frontside of the structure. The method also includes recessing the substrate from the backside of the structure to expose a bottom surface of the isolation structure, forming a backside dielectric layer covering the isolation structure, depositing an etch stop layer on a bottom surface of the backside dielectric layer, forming an opening in the etch stop layer, wherein the opening exposes the fin-shape base from the backside of the structure, etching the fin-shape base from the opening to expose the epitaxial feature, and forming a backside conductive feature in the opening and in physical contact with the epitaxial feature.

Abstract: A semiconductor structure includes an upper semiconductor build having an upper crackstop structure along its periphery, an upper semiconductor build insulator layer, and a plurality of upper semiconductor build electrical contact bonding pads within the insulator layer. The upper semiconductor build crackstop structure includes first and second upper semiconductor build crackstop portions ending in first and second upper semiconductor build non electrical contact bonding pads within the insulator layer. A lower semiconductor build is generally similar to the upper semiconductor build, and the two builds are connected by a hybrid bond joining interface including metal-to-metal bonding of the bonding pads, and dielectric bonding of the insulator layers.