Patents Assigned to Advanced Power Technology
  • Patent number: 4748103
    Abstract: A mask-defect-immune process for making MOS semiconductor devices. The process features the creation of a surrogate mask in semiconductor wafer material per se, thus to eliminate the requirement that plural masks be used, and that plural mask alignments be performed. In all ways of practicing the invention, a surrogate mask is created in a dopant protective region.
    Type: Grant
    Filed: March 21, 1986
    Date of Patent: May 31, 1988
    Assignee: Advanced Power Technology
    Inventor: Theodore G. Hollinger