Patents Assigned to ADVANCED
  • Patent number: 11996464
    Abstract: A method of manufacturing a diode structure includes forming a first stack on a silicon layer on a substrate. A first sidewall spacer extending along and covering a sidewall of the first stack is formed. The silicon layer is selectively etched to a first predetermined depth, thereby forming a second stack. The remaining silicon layer includes a silicon base. A second sidewall spacer extending along and covering a sidewall of the second stack is formed. The silicon base is selectively etched to form a third stack on the substrate. With the second sidewall spacer as a mask, lateral plasma ion implantation is performed. Defects at the interface between two adjacent semiconductor layers can be reduced by the method.
    Type: Grant
    Filed: May 11, 2022
    Date of Patent: May 28, 2024
    Assignees: JIANGSU ADVANCED MEMORY TECHNOLOGY CO., LTD., JIANGSU ADVANCED MEMORY SEMICONDUCTOR CO., LTD.
    Inventors: Chieh-Fang Chen, Kuo-Feng Lo, Chung-Hon Lam, Yu Zhu
  • Patent number: 11997894
    Abstract: A display panel and a display device are provided. The display panel includes a substrate, signal lines located on the substrate, and a plurality of light-emitting elements each located on a side of one of the signal lines facing away from the substrate. Each light-emitting element includes a first electrode, a light-emitting layer, and a second electrode that are stacked sequentially. Each signal line includes at least one overlapping portion overlapping the light-emitting layer of one of the light-emitting elements in a direction perpendicular to the display panel. An angle ? between an extending direction of a part of the at least one overlapping portion and a pixel column direction in a display region that satisfies: 0°<?<90°, or an angle ? between an extending direction of a tangent of a part of the at least one overlapping portion and a pixel column direction in a display area that satisfies: 0°<?<90°.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: May 28, 2024
    Assignee: HUBEI YANGTZE INDUSTRIAL INNOVATION CENTER OF ADVANCED DISPLAY CO., LTD.
    Inventors: Linshan Guo, Xiang Cai, Yong Yuan, Yaqi Kuang
  • Patent number: 11996373
    Abstract: A semiconductor device package includes a substrate and a shielding layer. The substrate has a first surface, a second surface opposite to the first surface and a first lateral surface extending between the first surface and the second surface. The substrate has an antenna pattern disposed closer to the second surface than the first surface. The shielding layer extends from the first surface toward the second surface of the substrate. The shielding layer covers a first portion of the first lateral surface adjacent to the first surface of the substrate. The shielding layer exposes a second portion of the first lateral surface adjacent to the second surface of the substrate.
    Type: Grant
    Filed: February 14, 2023
    Date of Patent: May 28, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Jenchun Chen, An-Ping Chien
  • Patent number: 11993894
    Abstract: A steel wire rope is presented for use in elevators and lifting applications. The steel wire rope contains a core surrounded by multiple strands. The outer filaments of the core and the outer filaments of the strands are likely to contact one another during use. The outer steel filaments of the core have an average Vickers hardness that is at least 50 Vickers hardness numbers lower than that of the outer filaments of the strands. As the hardness of the outer filaments of the core is substantially lower than that of the outer filaments of the strands, those softer filaments will preferentially abrade away during use. In this way the core is sacrificed while preserving the integrity of the outer filaments of the strands. The use of this ‘sacrificial core’ results in a higher residual breaking load after use.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: May 28, 2024
    Assignee: BEKAERT ADVANCED CORDS AALTER NV
    Inventors: Eline De Roose, Andreas Klust
  • Patent number: 11994757
    Abstract: A hybrid photonic chip comprising a plurality of semiconductor materials arranged to define a chip providing a function, wherein at least a first part of the chip is formed of materials which can be fabricated using a CMOS technique; and at least a second part of the chip which comprises non-linear crystal material and is not subjected to etching process; wherein the second part of the chip in conjunction with the first part is configured to support a propagating low loss single mode.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: May 28, 2024
    Assignee: ADVANCED MICRO FOUNDRY PTE. LTD.
    Inventors: Patrick Guo Qiang Lo, Shawn Yohanes Siew, Larry Lian Xi Jia
  • Patent number: 11997798
    Abstract: A package substrate and manufacturing method thereof are provided. The package substrate includes a substrate and an electronic component. The substrate includes a cavity. The electronic component is disposed in the cavity. The electronic component includes a first region and a second region, and an optical recognition rate of the first region is distinct from that of the second region.
    Type: Grant
    Filed: August 30, 2022
    Date of Patent: May 28, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wu Chou Hsu, Hsing Kuo Tien, Chih-Cheng Lee, Min-Yao Chen
  • Patent number: 11997888
    Abstract: A semiconductor device package includes a display device, an electronic module and a conductive adhesion layer. The display device includes a first substrate and a TFT layer. The first substrate has a first surface and a second surface opposite to the first surface. The TFT layer is disposed on the first surface of the first substrate. The electronic module includes a second substrate and an electronic component. The second substrate has a first surface facing the second surface of the first substrate and a second surface opposite to the first surface. The electronic component is disposed on the second surface of the second substrate. The conductive adhesion layer is disposed between the first substrate and the second substrate.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: May 28, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ming-Hung Chen, Sheng-Yu Chen, Chang-Lin Yeh, Yung-I Yeh
  • Patent number: 11996330
    Abstract: There is provided a method for manufacturing a SiC device wafer comprising the steps: a) slicing and polishing a SiC boule to thicker substrates compared to the usual thickness in the prior art, b) creating a device wafer on the substrate, c) removing the device wafer from the remaining substrate, d) adding SiC to the remaining substrate so that the original thickness of the substrate is essentially restored, and repeating steps b)-d). The removal of the device wafer can be made for instance by laser slicing. Advantages include that the SiC material loss is significantly decreased and the boule material used for device wafers is considerably increased, the substrates become more stable especially during high temperature processes, the warp and bow is reduced, the risk of breakage is decreased.
    Type: Grant
    Filed: May 20, 2020
    Date of Patent: May 28, 2024
    Assignee: II-VI ADVANCED MATERIALS, LLC
    Inventors: Adolf Schöner, Sergey Reshanov
  • Patent number: 11992080
    Abstract: An injection molded integral multicolor thermoplastic elastomeric foamed sole, comprising an integral sole made from thermoplastic elastomeric foaming bodies of at least two colors, and on surfaces thereof are provided grains of arbitrarily superposed injection strips; the foamed sole is made by: mixing, milling and heating thermoplastic elastomer raw materials of at least two colors, lubricants, and foaming auxiliaries to be thermoplastic elastomeric fused-masses, adding respectively gas-foaming agents at 0.
    Type: Grant
    Filed: June 1, 2021
    Date of Patent: May 28, 2024
    Assignee: GUANGDONG ANGSI ADVANCED MATERIALS TECHNOLOGIES CO., LTD.
    Inventor: Xubin Chen
  • Patent number: 11997924
    Abstract: Disclosed are a novel organic compound, and an organic electroluminescent element having improved characteristics, such as luminous efficiency, driving voltage, and lifespan, by containing the novel organic compound in one or more organic material layers.
    Type: Grant
    Filed: February 19, 2020
    Date of Patent: May 28, 2024
    Assignee: SOLUS ADVANCED MATERIALS CO., LTD.
    Inventors: Min-Sik Eum, Hojun Son, Woo Jae Park, Tae Hyung Kim, Jiyi Kim, Youngmi Beak
  • Patent number: 11992814
    Abstract: The present invention provides an asymmetric modified CMS hollow fiber membrane having improved gas separation performance properties and a process for preparing an asymmetric modified CMS hollow fiber membrane having improved gas separation performance properties. The process comprises treating a polymeric precursor fiber with a solution containing a modifying agent prior to pyrolysis. The concentration of the modifying agent in the solution may be selected in order to obtain an asymmetric modified CMS hollow fiber membrane having a desired combination of gas permeance and selectivity properties. The treated precursor fiber is then pyrolyzed to form an asymmetric modified CMS hollow fiber membrane having improved gas permeance.
    Type: Grant
    Filed: August 20, 2021
    Date of Patent: May 28, 2024
    Assignees: GEORGIA TECH RESEARCH CORPORATION, AIR LIQUIDE ADVANCED TECHNOLOGIES U.S., LLC
    Inventors: Nitesh Bhuwania, William John Koros, Paul Jason Williams
  • Patent number: 11994437
    Abstract: Aspects of the present disclosure relate to a piezoelectric device having at least one piezoelectric element, which has a support plane oriented to a force introduction element, wherein in the event of a thermal loading of the piezoelectric device in the support plane, expansion differences between the piezoelectric element and the force introduction element occur. To compensate for shear loadings, at least one transition element is arranged between the piezoelectric element and the force introduction element, the E-module of which is smaller than the E-module of the piezoelectric element in the support plane.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: May 28, 2024
    Assignee: PIEZOCRYST ADVANCED SENSORICS GMBH
    Inventors: Alexander Schricker, Christian Neubauer, Andreas Mayer
  • Patent number: 11997783
    Abstract: The present disclosure provides an electronic device. The electronic device includes a first insulating layer, a first antenna pattern, a second insulating layer, and a second antenna pattern. The first antenna pattern is configured to operate at a first frequency and at least partially disposed over the first insulating layer. The second insulating layer is disposed over the first insulating layer. The second antenna pattern is configured to operate at a second frequency different from the first frequency and at least partially disposed over the second insulating layer. A dielectric constant of the first insulating layer is different from a dielectric constant of the second insulating layer.
    Type: Grant
    Filed: May 27, 2022
    Date of Patent: May 28, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Po-An Lin, Huei-Shyong Cho, Shih-Wen Lu
  • Publication number: 20240167403
    Abstract: The present disclosure provides an acoustic metamaterial-based muffler for exhaust noise reduction, including an exhaust flow body that is provided with an inlet through which exhaust gas of an internal combustion engine flows in on one side, and an outlet through which the exhaust gas flows out on the other side, and a flow passage for guiding a movement of the exhaust gas therein; and a plurality of noise reduction units that are sequentially disposed along a discharge direction of the exhaust gas inside the exhaust flow body to reduce noise in a specific frequency band in exhaust noise of the exhaust gas caused by the movement of the exhaust gas on the inside of the exhaust flow body.
    Type: Application
    Filed: November 22, 2023
    Publication date: May 23, 2024
    Applicants: AJOU UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION, THE CENTER FOR ADVANCED META-MATERIALS
    Inventors: Jin Woo LEE, Gyeong Ju LEE
  • Publication number: 20240170491
    Abstract: The embodiment of the present application proposes a TFT-LCD float glass substrate processing line, which is sequentially divided into a precision cutting and edge grinding working area, a surface grinding working area, and an inspection and packaging working area. In the precision cutting and edge grinding working area, a cold-end cutting device, a precision cutting and breaking device, a multi-axis edge grinding device, an after-edge-grinding cleaning device, a first edge inspection machine device, a first size measurement device, a grinding range measurement device, a flipping conveyor belt, and a loading frame are sequentially installed.
    Type: Application
    Filed: May 19, 2023
    Publication date: May 23, 2024
    Applicants: BENGBU CHINA OPTOELECTRONIC TECHNOLOGY CO., LTD, CNBM RESEARCH INSTITUTE FOR ADVANCED GLASS MATERIALS GROUP CO.,LTD, CHINA NATIONAL BUILDING MATERIAL GROUP CO., LTD.
    Inventors: Shou PENG, Chong ZHANG, Zhiqiang CAO, Nan ZHAN, Longyue JIANG, Kui WU, Liangmao JIN, Changzhen WANG
  • Publication number: 20240168639
    Abstract: An apparatus for performing distributed reduction operations using near-memory computation includes memory and a first near-memory compute node. The first-near-memory compute node is coupled to a plurality of near-memory compute nodes. The first near-memory compute node comprises logic to store first data loaded from a second near-memory compute node, perform a reduction operation on the first data and second data to compute a result; and store the result within the first near-memory compute node. In some aspects, the near-memory compute node includes a PIM execution unit and carries out the reduction operation utilizing PIM commands.
    Type: Application
    Filed: November 18, 2022
    Publication date: May 23, 2024
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventors: SHAIZEEN AGA, JOHNATHAN ALSOP, NUWAN JAYASENA
  • Publication number: 20240170688
    Abstract: Provided is a method of controlling flow of an electrolyte in a vanadium redox flow battery, comprising: preparing an electrode for the vanadium redox flow battery comprising at least two carbon material-based papers disposed in parallel with each other; and flowing the electrolyte parallel to surfaces of the at least two carbon material-based papers, wherein each of the at least two carbon material-based papers comprises at least one hole pattern.
    Type: Application
    Filed: January 25, 2024
    Publication date: May 23, 2024
    Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Seong Su Kim, Jaemoon Jeong, Kwang Il Jeong, Jaehyung Oh
  • Publication number: 20240170366
    Abstract: Provided is a semiconductor package including a circuit board, a semiconductor chip on the circuit board, a heat dissipation member adjacent to the semiconductor chip, and a heat transmission member between the semiconductor chip and the heat dissipation member, the heat transmission member including a resin insulating body and phase change metal particles connected to each other in the resin insulating body, wherein the phase change metal particles connect the semiconductor chip and the heat dissipation member, the phase change metal particles being configured to transmit heat generated by the semiconductor chip to the heat dissipation member.
    Type: Application
    Filed: November 17, 2023
    Publication date: May 23, 2024
    Applicants: SAMSUNG ELECTRONICS CO., LTD., KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jonggyu Lee, Youngsuk Nam, Seokkan Ki, Jaechoon Kim, Taehwan Kim
  • Publication number: 20240170674
    Abstract: Provided is a binder composition for a negative electrode which can achieve both a high capacity and an excellent capacity retention rate of a lithium-ion secondary battery. The binder composition for a lithium-ion secondary battery negative electrode of this invention is characterized by containing a vinylphosphonic acid- or vinylphosphonic acid ester-derived vinyl phosphorus polymer and a cellulose-based water-soluble polymer.
    Type: Application
    Filed: March 14, 2022
    Publication date: May 23, 2024
    Applicants: JAPAN ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY, MARUZEN PETROCHEMICAL CO., LTD.
    Inventors: Noriyoshi MATSUMI, Noriyuki TAKAMORI, Tadashi YAMAZAKI
  • Patent number: 11988553
    Abstract: An optical module is disclosed. The optical module includes a carrier, an optical emitter disposed over the carrier, and a monitor disposed over the carrier and configured to adjust a property of a first light emitted from the optical emitter.
    Type: Grant
    Filed: September 20, 2022
    Date of Patent: May 21, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Kuo Sin Huang, Tien-Chia Liu, Ko-Fan Tsai, Cheng-Te Chou, Yan-Te Chou