Abstract: Disclosed is a capacitively coupled plasma etching apparatus, wherein a lower electrode is fixed to a lower end of an electrically conductive supporting rod, a retractable electrically conductive part is fixed to the lower end of the electrically conductive supporting rod, wherein the retractable electrically conductive part being extended or retracted along an axial direction of the electrically conductive supporting rod; besides, the lower end of the retractable electrically conductive part is electrically connected with the output end of the radio-frequency matcher via an electrically connection portion, and the loop end of the radio-frequency matcher is fixed to the bottom of a chamber body.
Type:
Grant
Filed:
December 16, 2019
Date of Patent:
June 6, 2023
Assignee:
ADVANCED MICRO-FABRICATION EQUIPMENT INC. CHINA
Inventors:
Yunwen Huang, Tuqiang Ni, Jie Liang, Jinlong Zhao, Lei Wu
Abstract: Provided are a parallel magnetic resonance imaging method and apparatus based on adaptive joint sparse codes and a computer-readable medium. The method includes solving an l2?lF?l2,1 minimization objective, where the l2 norm is a data fitting term, the lF norm is a sparse representation error, and the l2,1 mixed norm is the joint sparsity constraining across multiple channels; separately updating each of a sparse matrix, a dictionary and K-space data with a corresponding algorithm, and obtaining a reconstructed image by a sum of root mean squares of all the channels. The joint sparsity of the channels is developed using the norm l2,1. In this manner, calibration is not required while information sparsity is developed. Moreover, the method is robust.
Type:
Grant
Filed:
December 1, 2017
Date of Patent:
June 6, 2023
Assignee:
SHENZHEN INSTITUTES OF ADVANCED TECHNOLOGY
Abstract: There is provided a method for preparation of oxide support-nanoparticle composites, in which metal nanoparticles decorate with uniform size and distribution on the surface of an oxide support, and thus, high performance oxide support-nanoparticle composites that can be applied in the fields of heterogeneous catalysis can be provided.
Type:
Grant
Filed:
November 13, 2020
Date of Patent:
June 6, 2023
Assignee:
KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
Abstract: The present invention relates to a novel compound having excellent functions, such as electron injection and transport and light emission functions, and an organic electroluminescence device. By using the novel compound in an organic material layer of the organic electroluminescence device, properties of the device such a light emitting efficiency, driving voltage, and life can be improved.
Type:
Grant
Filed:
November 21, 2017
Date of Patent:
June 6, 2023
Assignee:
SOLUS ADVANCED MATERIALS CO., LTD.
Inventors:
Hongsuk Kim, Young Bae Kim, Hoe Moon Kim, Ho Jun Son, Hyungchan Bae
Abstract: A semiconductor device package includes a substrate, a first antenna pattern and a second antenna pattern. The substrate has a first surface and a second surface opposite to the first surface. The first antenna pattern is disposed over the first surface of the substrate. The first antenna pattern has a first bandwidth. The second antenna pattern is disposed over the first antenna pattern. The second antenna pattern has a second bandwidth different from the first bandwidth. The first antenna pattern and the second antenna pattern are at least partially overlapping in a direction perpendicular to the first surface of the substrate.
Type:
Grant
Filed:
May 21, 2021
Date of Patent:
June 6, 2023
Assignee:
ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Inventors:
Shao-En Hsu, Huei-Shyong Cho, Shih-Wen Lu
Abstract: Memory operations using compound memory commands, including: receiving, by a memory module, a compound memory command indicating one or more operations to be applied to each portion of a plurality of portions of contiguous memory in the memory module; generating, based on the compound memory command, a plurality of memory commands to apply the one or more operations to each portion of the plurality of portions of contiguous memory; and executing the plurality of memory commands.
Type:
Grant
Filed:
April 15, 2020
Date of Patent:
June 6, 2023
Assignee:
ADVANCED MICRO DEVICES, INC.
Inventors:
Anirban Nag, Nuwan Jayasena, Shaizeen Aga
Abstract: A semiconductor device package includes a substrate, an air cavity, a radiator, and a director. The substrate has a top surface. The air cavity is disposed within the substrate. The air cavity has a first sidewall and a second sidewall opposite to the first sidewall. The radiator is disposed adjacent to the first sidewall of the air cavity. The director is disposed adjacent to the second sidewall of the air cavity.
Type:
Grant
Filed:
October 29, 2020
Date of Patent:
June 6, 2023
Assignee:
ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Inventors:
Ting Ruei Chen, Hung-Hsiang Cheng, Guo-Cheng Liao, Yun-Hsiang Tien
Abstract: An electronic device is disclosed. An electronic device comprises: a first memory in which an operating system and an application program executed on the operating system are stored; a second memory; a processor for loading at least some codes among codes corresponding to an application program from the first memory to the second memory, and when access information of the codes loaded in the second memory is received from a kernel of an operating system, accessing an area in which the loaded codes are stored, on the basis of the received information and executing the application program; and a snoop for monitoring access to an area in which a preset code, the access of which has been limited, from among codes loaded in the second memory is stored.
Type:
Grant
Filed:
November 7, 2018
Date of Patent:
June 6, 2023
Assignees:
SAMSUNG ELECTRONICS CO., LTD., KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
Inventors:
Dong Uk Kim, Byung Hoon Kang, Seung Hyun Ha, Dae Hee Jang, Jin Soo Jang, Seok Hong
Abstract: A single-row electrical wire structure includes a first circuit board and a wire assembly. A board-to-board connector is on the first circuit board. The first circuit board includes a first group of contacts arranged into a single row. A distance between center portions of adjacent two contacts of the first group of contacts forms a width. The wires assembly includes a plurality of high-speed signal pairs and at least one low-speed signal pair respectively connected to the first group of contacts. A first spacing between a contact in the first group of contacts corresponding to a first high-speed signal pair of the high-speed signal pairs and a contact in the first group of contacts corresponding to a second high-speed signal pair of the high-speed signal pairs adjacent to the first high-speed signal pair is at least equal to or greater than 2 times of the width.
Abstract: A spatial light modulator and a liquid-crystal module are provided. The spatial light modulator includes a first liquid-crystal module and a second liquid-crystal module that are arranged opposite to each other. The first liquid-crystal module includes a first array substrate, a first color filter substrate, and a plurality of first spacers disposed therebetween. The second liquid-crystal module includes a second array substrate, a second color filter substrate, and a plurality of second spacers disposed therebetween. The first array substrate, the first color filter substrate, the second color filter substrate, and the second array substrate are stacked sequentially. At least one first spacer forms a first overlapped unit, and at least one second spacer forms a second overlapped unit. An orthographic projection of the first overlapped unit on the first array substrate fully overlaps an orthographic projection of the second overlapped unit on the first array substrate.
Type:
Grant
Filed:
December 17, 2020
Date of Patent:
June 6, 2023
Assignee:
HUBEI YANGTZE INDUSTRIAL INNOVATION CENTER OF ADVANCED DISPLAY CO., LTD.
Abstract: A device for ascertaining a property of a fluid, having: an electric conductor assembly which is designed to be at least partly brought into contact with the fluid and which is designed as a voltage divider with two elements, wherein the first element is a first conductor which, at least in a current-conducting state, has a resistance value that differs from that of the second element; a measuring bridge with two voltage dividers connected in parallel, one of said voltage dividers being formed by the electric conductor assembly; an actuation unit for applying an AC voltage to the measuring bridge; a voltage detection unit for detecting a bridge voltage; and an analysis unit which is configured to ascertain a thermal conductivity as the property of the fluid by analyzing the bridge voltage using the 3-omega method.
Type:
Application
Filed:
April 28, 2021
Publication date:
June 1, 2023
Applicant:
AST (ADVANCED SENSOR TECHNOLOGIES) INTERNATIONAL ASSET GMBH
Abstract: Stormwater management systems, methods, and apparatus for containing and filtering runoff may be provided. In one implementation, a stormwater management crate for managing stormwater runoff may be provided. A stormwater management crate assembly for managing stormwater comprising one or more stormwater management crates arranged in a modular array may be provided. In one implementation, the stormwater management crate assembly may include a top plate having a plurality of support column attachments a bottom plate, at least one intermediate plate having a plurality of support columns attachments and being located between the top plate and the bottom plate, and a plurality of support columns extending from the top plate through the at least one intermediate plate to the bottom plate. In one implementation, a stormwater management crate may include a lightweight intermediate plate configured to bear only lateral loads.
Type:
Application
Filed:
January 31, 2023
Publication date:
June 1, 2023
Applicant:
ADVANCED DRAINAGE SYSTEMS, INC.
Inventors:
Paul HOLBROOK, Adam MILLER, Bryan COPPES, Ronald VITARELLI
Abstract: A method for producing a metal catalyst having an inorganic film deposited thereon by means of an atomic layer deposition (ALD) process, and a metal catalyst according to the method are disclosed. More specifically, the method includes a step of inducing selective adsorption of reactants to a portion having a low coordination number on the surface of the catalyst in the ALD process, thereby being intended to induce interaction between the catalyst and an inorganic film layer and maximally secure active sites of the catalyst.
Type:
Application
Filed:
March 31, 2021
Publication date:
June 1, 2023
Applicants:
HANWHA SOLUTION CORPORATION, KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
Inventors:
Young Jin CHO, Do Heung KIM, Eun Ji WOO, Won Tae JANG, Keon Woo CHOI, Sung Gap IM
Abstract: An ordered porous nano-network electrode includes a conductive three-dimensional structure having ordered and interconnected pores, and an active layer disposed on a surface of the conductive three-dimensional structure to surround the pores and including an organic active material having a redox center. An amount of the organic active material in a unit area is 0.1 mg/cm2 to 30 mg/cm2.
Type:
Application
Filed:
April 26, 2022
Publication date:
June 1, 2023
Applicant:
KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
Abstract: A battery module includes a plurality of battery cells disposed in at least two rows. The battery cells in adjacent rows are offset from each other. Each of the plurality of battery cells includes a cover and a first terminal that extends from the cover outward. The first terminal is configured to be coupled to a second terminal on an adjacent battery cell. The plurality of battery cells are electrically coupled to each other in a zigzag pattern via the first and second terminals.
Type:
Grant
Filed:
April 9, 2020
Date of Patent:
May 30, 2023
Assignee:
CLARIOS ADVANCED SOLUTIONS LLC
Inventors:
Jason D. Fuhr, Steven J. Wood, Dale B. Trester, Gary P. Houchin-Miller
Abstract: A package structure and a manufacturing method are provided. The package structure includes a first circuit layer, a first dielectric layer, an electrical device and a first conductive structure. The first circuit layer includes a first alignment portion. The first dielectric layer covers the first circuit layer. The electrical device is disposed on the first dielectric layer, and includes an electrical contact aligning with the first alignment portion. The first conductive structure extends through the first alignment portion, and electrically connects the electrical contact and the first alignment portion.
Type:
Grant
Filed:
April 21, 2020
Date of Patent:
May 30, 2023
Assignee:
ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Abstract: A method for performing stutter of dynamic random access memory (DRAM) where a system on a chip (SOC) initiates bursts of requests to the DRAM to fill buffers to allow the DRAM to self-refresh is disclosed. The method includes issuing, by a system management unit (SMU), a ForceZQCal command to the memory controller to initiate the stutter procedure in response to receiving a timeout request, such as an SMU ZQCal timeout request, periodically issuing a power platform threshold (PPT) request, by the SMU, to the memory controller, and sending a ForceZQCal command prior to a PPT request to ensure re-training occurs after ZQ Calibration. The ForceZQCal command issued prior to PPT request may reduce the latency of the stutter. The method may further include issuing a ForceZQCal command prior to each periodic re-training.
Type:
Grant
Filed:
July 24, 2020
Date of Patent:
May 30, 2023
Assignee:
ADVANCED MICRO DEVICES, INC.
Inventors:
Jing Wang, Kedarnath Balakrishnan, Kevin M. Brandl, James R. Magro
Abstract: A semiconductor package includes: (1) a package substrate including an upper surface; (2) a semiconductor device disposed adjacent to the upper surface of the package substrate, the semiconductor device including an inactive surface; and (3) an antenna substrate disposed on the inactive surface of the semiconductor device.
Type:
Grant
Filed:
November 29, 2017
Date of Patent:
May 30, 2023
Assignee:
ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Abstract: A tunable element for an optical waveguide device, such as an Optical Phased Array (OPA), is described. Tunable element comprises three waveguide sections arranged such that light propagates through the first waveguide section, then through the second waveguide section and then through the third waveguide section, with light being either evanescently or directly coupled from one waveguide section to the next. The tunable element further comprises one or more resistive heating pad formed proximate to the second waveguide section. The first and third waveguide sections are formed from a first material and the second waveguide section is formed from a second, different material and the second material is more thermo-optically sensitive than the first material.
Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a substrate having a first surface and a second surface opposite to the first surface of the substrate. The substrate has a through opening extending between the first surface of the substrate and the second surface of the substrate. The semiconductor device package also includes a conductive pad in the through opening and approximal to the second surface of the substrate. The conductive pad has a first surface and a second surface opposite to the first surface of the conductive pad. The semiconductor device package also includes a conductive pillar in contact with the first surface of the conductive pad. The second surface of the conductive pad protrudes from the second surface of the substrate. A method of manufacturing a semiconductor device package is also disclosed.
Type:
Grant
Filed:
March 18, 2021
Date of Patent:
May 30, 2023
Assignee:
ADVANCED SEMICONDUCTOR ENGINEERING, INC.