Abstract: A probe contact system for establishing electrical connection with contact targets. The probe contact system is formed of a main frame, a flexible printed circuit board (PCB), a contactor carrier and a plurality of contactors. The flexible PCB has contact pads at a center area thereof and signal lines connected to the contact pads and extended to an end of the flexible PCB. The end of the flexible PCB with the signal lines is connected to a test head of a semiconductor test system. In one aspect, the contactor has a top spring to resiliently contact with the contact pads on the flexible PCB. In another aspect, the probe contact system includes a conductive elastomer sheet between the contactor and the flexible PCB thereby obviating the top spring of the contactor.

Abstract: A comparator circuit for use in a semiconductor test system for comparing differential output signals of a semiconductor device under test (DUT). The comparator circuit is formed of a first pair of comparators having a DC comparator and an AC comparator which receives a first differential signal, a second pair of comparators having a DC comparator and an AC comparator which receives a second differential signal, a first latch for latching output of the first pair of comparators, a second latch for latching output of the second pair of comparators, and first and second serial-parallel converters for converting output signals of the first and second latches into parallel signals. The comparator circuit is formed of discrete components on a dielectric substrate.

Abstract: A high speed semiconductor test system is so designed that pin cards in a test head are arranged in radial directions where the DUT is placed over the center of the test head. Since each of the pin cards is arranged radially, the side which faces the center is close to the DUT, and time critical components in the pin card are formed in an area close to the side of that faces the center, thereby minimizing the round-trip-delay (RTD).Moreover, each pin card is distanced equally from the DUT. Thus, the variation in the length of path connecting between the pin card and the DUT is minimized, and accordingly, the variation in RTD is also minimized.

Abstract: An electron beam irradiation apparatus which irradiates an electron beam to an object for easily detecting a defect of a backscattered electron detector, including: an electron beam generating section for generating an electron beam; a plurality of backscattered electron detectors for detecting backscattered electrons generated when the electron beam is irradiated on a mark; a plurality of attenuation sections for attenuating signal values indicating quantity of backscattered electrons detected by the plurality of backscattered electron detectors; and a defect detecting section for detecting a defect of the plurality of backscattered electron detectors based on the signal values attenuated by the plurality of attenuation sections, with attenuation factors for the plurality of attenuation sections being varied.

Abstract: A wafer map display apparatus and method for displaying an entire image of a semiconductor wafer and IC chips therein with an optimal display size within a specified window size. The wafer map display apparatus acquires window size information for displaying a wafer map of a semiconductor wafer under test in a specified window, and calculates a chip display size every time when receiving test results and XY address data of an IC chip that has been tested with use of all of XY address data of IC chips that have been tested, and renews the wafer map display based on the newest chip display size, thereby displaying all of the IC chips that have been tested and an overall semiconductor wafer under test with an optimum size within the specified window.

Abstract: An electron beam exposure apparatus for exposing a pattern on a wafer by an electron beam.

Abstract: A timing signal generation circuit comprising: a negative feedback loop comprising; a variable delay circuit for outputting a timing signal delayed from an input clock signal by a delay amount designated by a delay code; a phase difference detector for detecting a phase difference between the timing signal and the input clock signal to output a detection signal; and a loop filter for smoothing a waveform of the detection signal to generate a voltage signal and for feeding the voltage signal back to the variable delay circuit: and a cancel unit for generating a reverse detection signal based on the delay code to cancel the phase difference caused by a change in the delay amount where the reverse detection signal is supplied to the low pass filter.

Abstract: There are disposed an output sequence control section, and output waveform data generation section for one system, and an analog waveform generation section includes four systems of ports 40, attenuators 43b for individually adjusting gains of analog test signals outputted via the respective ports, and digital/analog converters 45 for individually adjusting offset voltages of the analog test signals. Accordingly, when a plurality of LSIs to be tested are concurrently tested, the analog test signals optimized for each LSI to be tested are generated with a simple circuit configuration without complicating the circuit configuration of a performance board.

Abstract: A probe contact system is capable of adjusting distances between tips of the contactors and contact targets with simple and low cost mechanism. The probe contact system includes a contact substrate having a large number of contactors, a probe card for fixedly mounting the contact substrate for establishing electrical communication between the contactors and a test system, a stiffener made of rigid material for fixedly mounting and reinforcing the probe card, a probe card ring attached to a frame of the probe contact system for mechanically coupling the probe card to the frame, and a plurality of adjustment members for up/down moving the stiffener relative to the probe card ring at three or more locations so that a gap between the probe card and the probe card ring can be altered.

Abstract: A method of producing a contact structure for establishing electrical connection with contact targets. The contact structure is formed of a contactor carrier and a plurality of contactors. The contactor has an upper end oriented in a vertical direction, a straight beam portion oriented in a direction opposite to the upper end and having a lower end which functions as a contact point for electrical connection with a contact target, a return portion returned from the lower end and running in parallel with the straight beam portion to create a predetermined gap therebetween, a diagonal beam portion provided between the upper end and the straight beam portion to function as a spring.

Abstract: A method of producing a contact structure for establishing electrical connection with contact targets. The contact structure is formed of a contact substrate and a plurality of contactors. The contactor is uniformly formed of conductive material and has an intermediate portion which is inserted in the through hole provided on the contact substrate in a vertical direction, a contact portion which is connected to the intermediate portion and positioned at one end of the contactor to function as a contact point for electrical connection with a contact target, and a base portion which is provided at other end of the contactor, and a spring portion which is substantially straight and upwardly inclined relative to the surface of the contact substrate and provided between the base portion and the intermediate portion.

Abstract: A particle beam apparatus includes a source for providing a primary particle beam along a primary beam axis, an objective lens for focussing the primary particle beam onto a specimen so as to release particles therefrom, and a detection system for image generation. The objective lens includes an immersion lens for decelerating the primary particle. The detection system includes a converter with a conversion area to convert the released accelerated particles into secondary particles, an electrode for influencing the converted secondary particles and at least one detector for detecting the converted secondary particles. The detection system is arranged in front of the immersion lens. The converter and the electrode control the converted secondary particles so as to prevent the converted secondary particles released at a specific part of the conversion area from reaching the detector.

Abstract: A contact structure having contactors formed on a flexible cable to establish electrical connection with contact targets. The contact structure includes a probe card having a plurality of sockets and a plurality of contact pads and signal patterns for connecting the sockets and the contact pads, a plurality of contactors mounted on the probe card in a manner that tips of the contactors are projected from one surface of the probe card to contact with the contact targets, and a flexible cable having a plurality of signal patterns for transmitting electrical signals therethrough wherein the flexible cable has the contactors at one end while being connected to the sockets on the probe card at another end. The contactors are directly mounted on the probe card without using a space transformer.

Abstract: The apparatus includes: a sequencer 11 for outputting a start signal, a timing signal, a write-in signal, and a clock signal sequentially, when an AD start signal is input; an ADC 12 for measuring an output of a device under test (DUT) 3 to which a test pattern is input, when the start signal is input; an arithmetic/logical unit (ALU) 13 for outputting an output voltage value of the ADC when the timing signal is input, and for outputting a result of comparing the output voltage value with an expected value to the pattern generator as a PASS/FAIL signal; an address counter 14 for updating an address value to be output when the clock signal is input; and a history memory for storing a measurement value in an address indicated by the address value when the write-in signal is input. This configuration makes it possible to measure each voltage value output from the DUT for a test pattern corresponding each AD start signal.

Abstract: A semiconductor test system which generates a test pattern produced based on data resultant to device logic simulation performed on a computer for an LSI device designed in an electronic design automation (EDA) environment, tests the LSI device, and feedbacks the test results to the EDA environment. The semiconductor test system includes an event file for storing event data obtained by executing device logic simulation in a design stage of an LSI device under test; an event memory for storing the event data from the event file relative to timings; means for generating a test pattern by directly using the event data from the event memory and applying the test pattern to the LSI device under test; a result data file for evaluating a response output of the LSI device under test and storing resultant evaluation data; and means for evaluating design of the LSI device based on the data stored in the result data file.

Abstract: A contact structure for establishing electrical connection with contact targets has a unique mounting mechanism for easy assembly. The contact structure is formed of a contactor carrier and a plurality of contactors. The contactor carrier includes a sliding layer for locking the contactors on the contactor carrier. The contactor has an upper end having a cut-out to engage with the sliding layer, a lower end oriented in a direction opposite to the upper end and functions as a contact point for electrical connection with a contact target, and a diagonal beam portion provided between the upper end and the lower end to function as a spring.

Abstract: A probe contact system is capable of adjusting distances between tips of the contactors and contact targets with simple and low cost mechanism. The probe contact system includes a contact substrate having a large number of contactors, a probe card for fixedly mounting the contact substrate for establishing electrical communication between the contactors and a test system, a probe card ring attached to a frame of the probe contact system for mechanically coupling the probe card to the frame, and a plurality of adjustment members for up/down moving the probe card relative to the probe card ring at three or more locations on the probe card. Each of the adjustment members is housed within a through hole formed on the probe card.

Abstract: A method and apparatus for validating SoC (system-on-a-chip) design with high accuracy and speed and low cost. The [apparatus allows to use a] method [which] includes the steps of verifying individual cores to be integrated in an SoC by evaluating a silicon IC having a function and structure identical to that of each core constituting the SoC with use of test patterns generated based on simulation testbenches produced through a design stage of the cores; verifying interfaces between the individual cores, on-chip buses of the cores and glue logic by using the silicon ICs and simulation testbenches [developed by an SoC designer] and FPGA/emulation of the glue logic; verifying core-to-core timings and SoC level timing critical paths; and performing an overall design validation by using the silicon ICs and simulation testbenches of [an] the overall SoC [and application runs].

Abstract: A method for producing a contact structure for establishing electrical connection with contact targets. The contact structure is formed of a contact substrate and a plurality of contactors. The contactor has a tip portion at one end of the contactor to contact with the contact target, a base portion at another end of the contactor which is inserted in a through hole provided on the contact substrate in such a way that an end of the contactor functions as a contact pad for electrical connection at a surface of the contact substrate, and a spring portion provided between the tip portion and the base portion which produces a contact force when the contactor is pressed against the contact target.

Abstract: The present invention provides a semiconductor test system and a monitor apparatus for monitoring a test history such as numbers of operation of relays. The semiconductor test system tests a semiconductor device by controlling test circuits therein through a tester bus and monitors the test history. The test system includes a plurality of buffer circuits for receiving signal information from the tester bus and storing the signal information therein, and a computer for storing the signal information from the buffer circuits in a file and analyzing the signal information in the file.