Abstract: A system that provides secure transmission of data between a subscriber's PC and an online service provider (OLS) over an Ethernet WAN. The system includes a remote transceiver unit located at a subscriber site and connected to the subscriber's PC; a central transceiver unit located at a telephone central office and connected to the remote transceiver unit over a twisted pair network and also connected to a WAN; an authorization server that is connected to the WAN; and one or more OLSs, which may include Internet service providers, connected to the WAN. Security of transmission is provided through a method in which only subscriber transmissions directed to a session-specific OLS are allowed to pass through the central transceiver unit onto the WAN, and only unicast transmissions from authorized OLSs are allowed to pass through the central transceiver unit to the subscriber port of the remote transceiver unit. Broadcast transmissions are minimized in favor of unicast messages.

Abstract: A digital phase lock detector and phase lock loop filter selector circuit implemented in hardware that dynamically selects a phase lock loop filter of appropriate bandwidth for the instant phase error condition. Phase error is primarily determined by an XOR gate receiving the PLL reference signal and the oscillator feedback signal coupled to a counter that is clocked by a high frequency signal.

Abstract: An on hold telephone service that allows a subscriber to the service to place a call on hold and make information services available to the party placed on hold. The on hold service can be implemented on a central office switch or an enhanced services platform connected to the switch. The on hold service is accessed by the subscriber to the service through a transfer function that causes the call to be maintained by the on hold service. The party so placed on hold by the subscriber can then interactively acquire the various types of information made available by the service, such as news, weather and stock market information. The subscriber to the service can then send a message to the other party or cause him to be reconnected to the subscriber either immediately or when the other party is finished using the service and is ready to be reconnected to the subscriber.

Abstract: An apparatus that dispenses disposable sanitary keyboard covers of a flexible transparent plastic film that is drawn across a key array and provides a sanitary cover that allows full use of the keyboard. When a subsequent user uses the keyboard, a new length of plastic film is drawn, and the old length of film is discarded. The apparatus includes a frame having a first tray holding a dispensing reel of plastic film at one end, and at the other end a second tray holding a take-up reel in a first embodiment, or rollers that direct the film to a slot in the outer wall of the tray with a cutting blade adjacent to the slot in a second embodiment.

Abstract: A multipoint video conferencing system in which the video conferencing terminals are in a daisy-chain arrangement with the head-of-chain terminal connected to the ATM network. ATM cells are relayed from the ATM network downstream to the last terminal, and from each terminal upstream to the network. Each video conference terminal has a video program input port provisioned with a unique ATM address, and a plurality of video program out ports, each provisioned with one of the video program input port addresses. ATM cells generated from each video program input port are transmitted upstream to the ATM network where they are relayed back to the head-of-chain terminal and then downstream to the last terminal. Each video conferencing terminal may also receive ATM cells having addresses that match the addresses provisioned for its video program output ports. These cells are converted to analog video programs and transmitted out the associated video output ports.

Abstract: Enhanced services are accessed from an enhanced services network element of a cellular radio telecommunications system using a cellular carrier specific code (#CCSC) string based office-level trigger and IS-41 messaging protocol message types. The invention takes advantage of the #CCSC standard to define MSC office-based trigger criteria wherein the dialed digits must start with the "#" character. When a call is received by the MSC in which the digits dialed start with "#" followed by a digit sequence, and an office-based trigger is provisioned for the "#" sequence dialed, the MSC suspends call processing and a service query message is generated and sent to the SCP of the requested enhanced service. The SCP then sends a response message back to the MSC, which resumes call processing in accordance with the response from the SCP.

Abstract: An on hold telephony service that allows a party placed on hold, if he is a subscriber to the service, to also place the call on hold and then hang up. The on hold service can be implemented on a central office switch or an enhanced services platform connected to the switch. The on hold service is accessed by the party placed on hold, i.e., subscriber, through a transfer function that causes the call to be maintained by the on hold service. When the party who originally placed the call on hold returns to the call, the on hold service informs him that the service will then call the subscriber so that both parties can be reconnected.

Abstract: A digital transmission framing system utilizing an address array containing pointers to a framing pattern reference register. The address array contains an entry for each set of possible framing bits. Pointer values reference the last bit of a consecutive-bit sub-pattern of the reference register that the previously received bits in this frame bit position have matched. As data bits are received, the associated pointer value is incremented by one to point to the next bit of the reference register, and the received data bit is compared to the newly referenced reference register bit. If the received data bit matches the newly referenced reference register bit, the associated pointer is updated with the incremented value and the corresponding frame bit position of the received data bit remains a candidate for the actual framing bit position. This matching operation continues until only one eligible framing bit position is identified in the input data frame.

Abstract: An on hold telephony service that allows a subscriber to the service to place a call on hold and make interactive games available to the party placed on hold. The on hold service can be implemented on a central office switch or an enhanced services platform connected to the switch. The on hold service is accessed by the subscriber to the service through a transfer function that causes the call to be maintained by the on hold service. The party so placed on hold by the subscriber can then interactively play the various games made available by the service. The subscriber to the service can then send a message to the other party or cause him to be reconnected to the subscriber either immediately or when the other party is finished playing games and is ready to be reconnected to the subscriber.

Abstract: A clock enabling circuit that generates an output clock signal such that when the enable output signal changes to a logical false, the output clock signal returns to its steady-state value in a manner that does not produce any glitches, and preserves the duty cycle of the input clock. The circuit comprises a first D flip-flop that is positive-edge triggered, a second D flip-flop that is negative-edge triggered, and a two-input AND gate. The first flip-flop has the D input connected to a constant positive voltage, the positive-edge triggered clock input connected to the input clock signal, the Q output connected to the AND gate, and the Q-complement output connected to the asynchronous reset of the second flip-flop. The second flip-flop has the D input connected to the enable output signal, the negative-edge triggered clock input connected to the input clock signal, the Q output connected to the asynchronous reset of the first flip-flop, and the Q-complement output connected to the AND gate.

Abstract: A circuit card faceplate, that is opaque to EMI emissions of a predetermined spectral range, having a tongue extending along one side edge, and a groove extending along the other side edge. The groove is arranged to receive and interlockingly engage a corresponding tongue on a side edge of an adjacent faceplate such that the tongue and groove engagement form a seam that is opaque to EMI emissions of the predetermined spectral range. The circuit card faceplate allows for top insertion of circuit card assemblies.

Abstract: A bus monitor system comprises eight identical programmable monitor circuits that are each connected to a monitored bus and to a local 16-bit event bus. There are three interfaces to the event bus within each monitor circuit. One interface asserts a predetermined bit pattern on the event bus when match conditions occur between bit patterns on the monitored bus and predetermined bit patterns stored in monitor circuit registers. A second interface asserts a signal on an external pin when bit patterns on the event bus match a predetermined bit pattern stored in a monitor circuit register. A third interface asserts a predetermined bit pattern on the event bus when an external device has asserted a signal on an external pin. Each monitor circuit is capable of reading and asserting any of the bits of the event bus. The event bus is used to enable or disable monitor circuit interfaces.

Abstract: A method and system implementation for combining and accessing telephony numbering and geographical position so direct access to information, services and goods may be invoked through the use of various telephone networks. The existing telephone networks throughout North America and the world use standardized numbering plans for connecting to, or switching any subtended device to any other device within the network. The U.S. government has orbited a series of communication satellites which provide a signaling method for determining precise geographical location throughout the world. This system is called the Global Positioning System (GPS) and provides several levels of service. Each GPS satellite continually transmits a navigation location signal which may be received on the ground, sea, or in the air and when combined with signals from other GPS satellites used to pinpoint navigational position in two or three dimensions.

Abstract: A data conversion circuit that acts as an interface between components or systems having different data input/output rate requirements. A circuit reads data transmitted at one bit rate and transmits data consisting of the input data along with overhead data interleaved with the input data in a fixed pattern at a faster bit rate. Also disclosed is a circuit that operates to read data at a faster bit rate and transmit data consisting of the input data stripped of interleaved overhead data at a slower bit rate. Data is written into and read from a register array that allows data to be concurrently and independently written and read. A suitable delay is introduced on the output side in order to avoid read/write collisions in the register array and achieve a minimum transmission delay.

Abstract: Two major Forth extensions provide high-level support for building rapid prototypes for systems. These extensions form distinct language vocabularies available in the Forth environment. One is a Finite State Machine Language, named FSML, and the other is an object oriented language, named 200L. Using these extension and the inherent expandability of the Forth language, a prototype can be rapidly created. The modeling method requires four steps. First, using 200L, the system is described as a set of objects. At least one of the objects must be a controlling object and so identified. Second, using FSML, the controlling object is described as a finite state machine. Third, the system's operation is expressed as a collection of one or more finite state machines. Each finite state machine type is defined with a unique machine type name. Any number of instances of a finite state machine type can be dynamically created at execution time. Fourth, communication is allowed between the finite state machines.

Abstract: A computer scans the voice messages for phrases that will be detected as DTMF digits and creates a record of where, when and for how long the possible problem maybe occurring. This allows prerecorded or synthesized messages from a Voice Response Announcement System to be checked for error causing DTMF digits prior to being placed into operation. The complete system consists of a computer containing the detection unit, a disk storage unit and scanning program. The Detection unit is placed within the computer and connects the system to the Central Office Switching Network for access to the Voice Response Announcement System.

Abstract: A test interface is disclosed that is added to a digital circuit device for providing a way of easily verifying that the device's input and output circuits are operating and connected properly. The arrangement implements a test mode in which a simple exercising sequence is placed on any single input of a defined sequential group of device pins. A resultant output can be observed on the next occurring output and all subsequent outputs of the defined sequential group.

Abstract: A circuit which synchronizes the phase of a data stream from a transmitting system, to the phase of the clock signal of the receiving system. Two frames of data from the transmitting data stream are stored in a memory which is continuously updated as the data for each time slot is stored in a different word of memory. The storage of the incoming stream data is controlled by the clock signal from the transmitting system. The data stored in the memory is then read out of that memory under control of the clock signal from the receiving system. As each word is read out, it is reinserted into the bit stream that is transmitted to the receiving system. An address control circuit ensures that write addresses have priority over read addresses. Similarly, a read/write control circuit ensures that write signals have priority over read signals. The read signals are arranged such that two read signals are available for each time slot.