Abstract: A method and structure for an electrical switch. According to the structure of the present invention, a liquid-filled chamber is housed within a solid material. A plurality of switch contacts within the liquid-filled chamber are coupled to the solid material, while a plurality of piezoelectric elements are coupled to a plurality of membranes. The plurality of membranes are coupled to the liquid-filled chamber. The plurality of switch contacts are coupled to a plurality of liquid metal globules, and a slug is coupled to two of the plurality of switch contacts and further coupled to the plurality of liquid metal globules. According to the method, a piezoelectric element is actuated, causing a membrane element to be deflected.

Abstract: A method for minimizing clock skew in a balanced tree when interfacing to an unbalanced load is presented. Unused portions of the balanced tree are replaced by a loading equivalent circuit to create a physically balanced load. In the preferred embodiment, the loading equivalent circuit is implemented with a single-pole resistor-capacitor circuit that has been modeled to match the RC characteristics of the replaced branch of the tree.

Abstract: A method for evaluating an orientation of a molecular array having features arranged in a pattern. An image of the molecular array is obtained by scanning the molecular array to determine data signals emanating from discrete positions on a surface of the molecular array. An actual result of a function on pixels of the image which pixels lie in a second pattern, is calculated. This actual result is compared with an expected result which would be obtained if the second pattern had a predetermined orientation on the array. Array orientation can then be evaluated based on the result.

Abstract: Delay induced apparent amplitude desensitization in a data signal channel and its accompanying worm-like distortion in an Eye Diagram Analyzer is avoided by altering the measurement to avoid the need for any substantial delay in the path of the data channel threshold comparison signals. In a first technique, only enough delay will be inserted in the data channels to produce the relative adjustments needed to compensate for skew between the data channels, as determined by a calibration operation, and it is these de-skewed, but otherwise un-delayed, data threshold comparison signals that are, in rapid succession, clocked into the latches whose difference registers a hit at a given (time, voltage) pair. The clock path delay is then varied from a minimal value to a sufficiently large value capable of spanning a desired the number of eye diagram cycles.

Abstract: A high resolution optical encoder with an angular collimated light beam. The optical encoder includes a source, a collimator, a reflective surface and a receiver. The light beam is collimated using a collimator and/or source at an angle to the plane of the reflective surface.

Abstract: A fraction collection system for liquid chromatography includes a conduit, which directs a sample eluent from an LC column through a flow splitter to a destructive analytical detector such as a mass spectrometer to analyze sample components, and to a fraction collector. A nondestructive detector such as a photodetector is positioned near the fraction collector to detect arrival of sample components. Optionally, a nondestructive detector such as a photodetector is situated upstream from the splitter, to detect passing sample components. Time intervals between detection of a calibrant or a sample component at any two of the detectors provide for automatable identification of selected sample components at the sample collector.

Abstract: Measurements are obtained of a signal within each one of multiple ranges of a parameter. For each range a representative measurement value is derived together with the extent of the range. A respective graphical display element is defined for each range of the parameter, a first dimension of each display element (such as its height) being indicative of the representative measurement value for the respective range of the parameter, and a second dimension of the display element (such as its width) being indicative of the extent of that respective range of the parameter. A display of the measured signal throughout the multiple ranges of the parameter is generated, with the graphical display elements superimposed at positions corresponding to the respective ranges of the parameter.

Abstract: The present invention is directed to a system and method which expands the applicability of subsampling to a larger range of signal repetition rates while reducing the range over which the sample rate must be tuned to accommodate a given signal. The resulting sample sequences are in the correct order, enabling direct display with an ordinary oscilloscope or other instrumentation. In one embodiment, a technique is used such that decimation of the samples also improves the response characteristics of the sensor. The system and method provides for a number of different procedures for sampling a signal of a given length. All other parameters being the same, the system allows more freedom in selecting the sample rate to correctly sub-sample a repetitive signal.

Abstract: One or more termination circuits or networks having compensation properties that are operative to reduce reflections occurring between a probe utilized by a test and measurement analyzer to test a device under test (DUT), such as an integrated circuit device, and the device under test itself are employed. The termination circuits are preferably small and less obtrusive than larger connectors and their compensation networking compensates for the connection of the probe to the DUT as well as connection of the cable from the probe to the analyzer performing the test and measurement function. The functionality of the termination circuits may be located at the DUT in a termination network connector or within the structure of the probe itself.

Abstract: Chip analyzer systems and methods are provided to partition chip designs into smaller blocks in order to test speed paths more efficiently for integrated circuits. In accordance with one aspect of the invention, a system includes a chip analyzer and an automatic test generator. The chip analyzer partitions information corresponding to the integrated circuit into a plurality of circuit configuration blocks, and creates a model of a selected circuit configuration block in the integrated circuit. The automatic test generator receives the model from the chip analyzer, and creates tests from the model to determine the correctness of the integrated circuit. In accordance with another aspect of the invention, the method partitions the integrated circuit into a plurality of circuit configurations, and selects a circuit configuration on the integrated circuit to be tested.

Abstract: An optical switch, preferably an add/drop switch, includes a minimal number of two-state switching arrangements, thereby facilitating a reduction of switch complexity. Light pulses entering the switch via a given input port may be directed to either a corresponding output port or a corresponding drop port by the operation of the switching arrangements. Light pulses entering the switch via a given add port may be directed to a corresponding output port or may be disbursed by the operation of the switching arrangements. The switching arrangements are toggled between reflective and transmissive states. In the preferred embodiment, the two-state switching arrangements are controlled by the manipulation of index matching fluid within trenches. Additionally, in the preferred embodiment, the switching arrangements are configured such that a given light pulse interacts with only one trench, thereby minimizing the overall signal loss and loss non-uniformities within the switch.

Abstract: A heterojunction bipolar transistor (HBT), including an emitter formed from a first semiconductor material, a base formed from a second semiconductor material, and a grading structure between the emitter and the base is disclosed. The grading structure comprises a semiconductor material containing at least one element not present in the first and second semiconductor materials, where the grading structure has a conduction band energy substantially equal to a conduction band energy of the base at an interface between the base and the grading structure, and where the grading structure has a conduction band energy substantially equal to a conduction band energy of the emitter at an interface between the emitter and the grading structure.

Abstract: A slab optical multiplexer comprises a slab substrate having two substantially flat and parallel surfaces, and internally propagating light beams. The multiplexer further comprises collimating/focusing optical elements and micro-diffractive optical elements each positioned on the surfaces in the light beams. At least one micro-diffractive optical element is positioned simultaneously in two separately incident and intersecting light beams, such that the two separately incident light beams are diffracted into a pair of co-propagating diffracted light beams.

Abstract: Modulated differential (balanced) drive signals are created where, at least one of the signals can be controlled in phase relative to the other, and both of which could be controlled in amplitude and both of which have the same modulation envelope. In one embodiment, a coherent signal is generated in a first electronic signal generator (ESG) and applied to a second ESG. The coherent signal replaces the normal input signal of the second ESG and the I and Q inputs of the second ESG control the amplitude and phase of the output signal. This output signal is applied to a third ESG replacing the normal input signal to the vector modulator.

Abstract: Microfluidic devices and systems that include keying, registration or indication elements that communicate a functionality of the microfluidic device to the instrumentation which is used in conjunction with these devices. Indicator elements include structural indicators, electrical indicators, optical indicators and chemical indicators. Different indicator elements are indicative of different functionalities, e.g., applications, new vs. used, and the like.

Abstract: A system for measuring optical characteristics of a multiport optical device uses optical heterodyne detection and known port-specific transmission delays to simultaneously monitor multiple ports of the multiport optical device with a single receiver. An embodiment of a system includes a splitter configured to split a swept optical signal into a reference signal and a test signal and a test system input, connectable to the multiport optical device, for transmitting the test signal to the multiport optical device. The test system also includes an optical combiner and a receiver. The optical combiner is connectable to the multiport optical device to receive a first portion of the test signal having a first port-specific transmission delay and to receive a second portion of the test signal having a second port-specific transmission delay.

Abstract: A system is described for interconnecting a first optical component and a second optical component in which the first optical component is guided passively into precise alignment with the second optical component. The system includes a base and a guide structure. The base has a first surface exposed for contact with a front surface of the first optical component and a second surface configured to contact a front surface of the second optical component, and defines a transparent optical aperture extending from the first base surface to the second base surface and aligned with respect to the optical axis. The guide structure is supported by the base in fixed registration with respect to the optical axis and is exposed for contact with an exposed peripheral surface of the first optical component at three or more spaced apart discrete locations.

Abstract: The present invention relates to an ionization source having a chamber for ionizing a sample. The ionization chamber has surfaces to reduce the overall interaction with reactive samples. The inner surface walls of the ionization chamber or the ionization chamber may be formed from an inert super alloy. For instance, Inconel™ 625, Inconel™ 601 or Hastelloy®) may comprise the ionization chamber or the surface walls of the ionization chamber. The invention also includes a method for reducing the interaction of a reactive analyte with an ion source.

Abstract: A method and apparatus for determining the hermeticity of a semiconductor package is disclosed. Gas is introduced into the semiconductor package during packaging. Vacuum suction is then applied to the package. If the package has any leaks, the gas within will escape. The package is next scanned using a spectrometer. If the spectrometer does not detect any gas within the package cavity, the package is not hermetically sealed. In an alternate embodiment, the device is packaged first, and then immersed in a pressurized liquid. If the package has a leak, the pressure on the liquid will force liquid into the package cavity. The cavity of a properly sealed package will remain empty and dry. The package is scanned using a spectrometer. If the spectrometer detects liquid within the package, the package is not hermetically sealed.

Abstract: The tunnel junction structure comprises a p-type tunnel junction layer of a first semiconductor material, an n-type tunnel junction layer of a second semiconductor material and a tunnel junction between the tunnel junction layers. At least one of the semiconductor materials includes gallium (Ga), arsenic (As) and either nitrogen (N) or antimony (Sb). The probability of tunneling is significantly increased, and the voltage drop across the tunnel junction is consequently decreased, by forming the tunnel junction structure of materials having a reduced difference between the valence band energy of the material of the p-type tunnel junction layer and the conduction band energy of the n-type tunnel junction layer.