Patents Assigned to Agilent Technologies
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Patent number: 6809931Abstract: In one embodiment, a heat sink apparatus that provides electrical isolation for an integrally shielded, electronic circuit. The heat sink apparatus comprises a substrate having a first hole extending between a first and second sides of the substrate, a conductive layer attached to the second side, an electrically and thermally conductive heat sink having a protrusion, wherein the heat sink is attached to the first side of the substrate, and an electrically conductive plate having a second hole extending through the plate. The protrusion extends through the first hole and has a surface located at substantially the same level as that of the conductive layer. An electronic component is attachable to the protrusion surface. The plate is electrically coupled to the conductive layer and to the protrusion surface such that the area between the protrusion and the conductive layer is covered by electrically conducting area of the plate.Type: GrantFiled: July 7, 2003Date of Patent: October 26, 2004Assignee: Agilent Technologies, Inc.Inventors: Lewis R. Dove, Marvin G. Wong
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Publication number: 20040208129Abstract: For testing communication in a network which carries data frames between communications ports having respective addresses, each frame containing an indication of the address of the source of the frame, the address of the intended destination of the frame, and other data, a tester has at least one communications port and a receiver for receiving a data frame arriving at the communications port. The tester includes circuitry for recognising test data frames according to at least one predetermined criterion, and extracting predetermined items from each test data frame including the source and destination addresses. A new test data frame is generated incorporating the predetermined items, with the source and destination addresses exchanged, and incorporating additional content of predetermined value, and a transmitter transmits the new data frame with the exchanged addresses into the network.Type: ApplicationFiled: January 21, 2004Publication date: October 21, 2004Applicant: Agilent Technologies, Inc.Inventors: Gordon Old, Colin Johnstone
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Patent number: 6807497Abstract: A method and system for determining and compensating for phase and time errors in an optical receiver. The method and system includes use of a measurement and reference signal; deriving phase and time errors; and providing compensation values to the optical receiver. The operating frequency and/or other operating parameters associated with phase and time errors are determined and recorded to allow for proper compensation to the optical receiver.Type: GrantFiled: December 17, 2001Date of Patent: October 19, 2004Assignee: Agilent Technologies, Inc.Inventors: Lee Charles Kalem, David Todd Dieken
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Patent number: 6806583Abstract: A light source suitable for surface mounting onto a printed circuit board. The light source includes a planar substrate with a centrally positioned recess. A light emitting diode is mounted in the recess and the substrate is encapsulated by a transparent encapsulant material forming an ellipsoidal dome over the light emitting diode.Type: GrantFiled: June 25, 2001Date of Patent: October 19, 2004Assignee: Agilent Technologies, Inc.Inventors: Huck Khim Koay, Seong Choon Lim, Cheng Why Tan, Gurbir Singh A/L Balwant Singh, Chee Keong Chong, Sundar a/l Natarajan Yoganandan
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Patent number: 6807658Abstract: A gating signal checker system and method are provided to perform clock gating check on a logic cell. In accordance with one aspect of the invention, the system includes logic that determines a clock transition time of a clock input into the logic cell, and logic that determines a transition time of at least one gating signal input into the logic cell. Also included in the gating signal checker system is logic that calculates a clock difference time between the clock transition time and the transition time of the at least one gating signal input into the logic cell, and logic that determines that the logic cell fails the clock gating check if the clock difference time is negative. In accordance with another aspect of the invention, a method performs a clock gating check on a logic cell by determining a clock transition time of a clock input into the logic cell, and determining a transition time of at least one gating signal input into the logic cell.Type: GrantFiled: June 5, 2002Date of Patent: October 19, 2004Assignee: Agilent Technologies, Inc.Inventors: David James Mielke, Gayvin E Stong
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Patent number: 6806969Abstract: The invention provides a system and method for reliably and accurately measuring the gap between two materials when the depth of gap is less than the smallest distance that an optical thickness gauge (OTG) is able to measure. The invention is practiced by forming a suitable slot (or a groove, channel, hole or other suitable deformation) having a precisely known depth in at least one material. The sum of the distance of the gap and the depth of the slot is at least equal to the smallest distance that the OTG can measure. The slot is positioned over the materials and under the OTG probe head such that a cavity is formed. The depth of the cavity is measured. Since the distance of the slot is known, the depth of the gap is determined by subtracting the known depth of the slot from the measured depth of the cavity.Type: GrantFiled: October 19, 2001Date of Patent: October 19, 2004Assignee: Agilent Technologies, Inc.Inventors: George M. Clifford, Jr., William Gong
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Apparatus and method for canceling DC errors and noise generated by ground shield current in a probe
Patent number: 6806697Abstract: A probe for connecting a device under test to a measurement device that corrects for dc errors and noise generated by the current flowing through the ground shield of a transmission line used by the probe. The probe identifies a voltage drop in the ground preferably using an additional line between the device under test and the measurement device. The signal provided to the measurement device is corrected based on the identified voltage drop.Type: GrantFiled: April 5, 2002Date of Patent: October 19, 2004Assignee: Agilent Technologies, Inc.Inventor: Michael T. McTigue -
Patent number: 6807345Abstract: Systems for removing heat from an opto-electronic component are provided. One such system incorporates an opto-electronic component that is thermally coupled to a heat spreader. The heat spreader is formed, at least partially, of a material capable of propagating optical signals. The heat spreader is operative to receive heat from the opto-electronic component and conduct an amount of the heat through at least a portion of the heat spreader. Methods and other systems also are provided.Type: GrantFiled: May 28, 2002Date of Patent: October 19, 2004Assignee: Agilent Technologies, Inc.Inventor: Jonathan Simon
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Patent number: 6806460Abstract: The light detection system includes at least two light detection elements. Each element is responsive to a selected light color in a first mode, and each element has a different sensitivity and is responsive to a single color in a second mode for enhanced dynamic range. A preferred embodiment includes four light detectors for responding to four separate colors or for responding with enhanced dynamic range to two colors. Embodiments are disclosed using a mirror/beam splitter arrangement to switch between modes and an embodiment including dichroic filters serving as fractional beam splitters.Type: GrantFiled: May 31, 2002Date of Patent: October 19, 2004Assignee: Agilent Technologies, Inc.Inventor: John F. Corson
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Patent number: 6807333Abstract: An optical switch and method of switching provide 1×N optical switching. The optical switch comprises a plurality of optical ports arranged in an annular pattern visible to and aligned with a movable mirror. The mirror is equidistant from each port of the plurality. The optical switch having a 1-dimensional (1D) annular array of ports comprises the mirror located at a center of a circle and the 1D array disposed on a portion of a circumference of the circle. The optical switch having a 2-dimensional (2D) annular array of ports comprises the mirror located at a center of a sphere and the 2D array disposed on a portion of a surface of the sphere. The mirror is movable about one or more axes to direct an optical signal from any port to any other port of the plurality.Type: GrantFiled: July 15, 2002Date of Patent: October 19, 2004Assignee: Agilent Technologies, Inc.Inventors: Datong Chen, Julie E. Fouquet
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Patent number: 6806431Abstract: A micro-relay device is provided including a fluid non-conductor. A first substrate and a second substrate are bonded together. A channel is defined in at least one of the substrates, and has a liquid metal in the channel. Electrodes are spaced along the channel and selectively interconnectable by the liquid metal. An open via is defined in one of the substrates and contains the fluid non-conductor. A heater substrate includes a suspended heater element in fluid communication with the open via. The suspended heater element is operable to cause the fluid non-conductor to separate the liquid metal.Type: GrantFiled: July 25, 2003Date of Patent: October 19, 2004Assignee: Agilent Technologies, Inc.Inventors: You Kondoh, Tsutomu Takenaka
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Patent number: 6806101Abstract: Plasma charging devices and methods are disclosed for detecting plasma charging during semiconductor wafer processing. Charging monitors are disclosed having ferroelectric capacitance elements which can be preprogrammed prior to processing steps of interest, and then subsequently measured afterwards, in order to determine whether plasma related charging is a problem in the intervening processing steps.Type: GrantFiled: April 24, 2003Date of Patent: October 19, 2004Assignees: Texas Instruments Incorporated, Agilent TechnologiesInventors: Shawming Ma, Guoqiang Xing, Stephen R. Gilbert
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Patent number: 6807334Abstract: An optical switching system includes a substrate, a microelectromechanical system (MEMS) input mirror, a MEMS output mirror, and an opposing mirror. The substrate is configured to carry an input light source and an output light source spaced from the input light source. The microelectromechanical system (MEMS) input mirror is carried by the substrate. The MEMS output mirror is carried by the substrate and is spaced from the MEMS input mirror. The opposing mirror is disposed opposite the substrate and is configured to communicate optically with an input light source and an output light source carried by the substrate. The input mirror optically couples an input beam from the input light source via the opposing mirror to a location on the opposing mirror with the output mirror via the opposing mirror. The output mirror optically couples the location on the opposing mirror with the output light source via the opposing mirror.Type: GrantFiled: August 6, 2002Date of Patent: October 19, 2004Assignee: Agilent Technologies, Inc.Inventors: Dale W. Schroeder, Jonathan P.R. Lacey, Julie E Fouquet, Brian E. Lemoff
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Patent number: 6807080Abstract: A memory with mechanisms for enhancing storage states without boosting voltages to levels that damage storage cell structures. A storage cell according to the present teachings includes a storage structure capable of switching storage states. A memory according to the present teachings includes means for writing the storage cell by applying a first voltage to a first node of the storage structure and for applying a second voltage to a second node of the storage structure such that the first and second voltages have opposite polarities.Type: GrantFiled: May 17, 2002Date of Patent: October 19, 2004Assignees: Agilent Technologies, Inc., Texas Instrument, Inc.Inventors: Jurgen Thomas Rickes, Hugh Pryor McAdams, Scott Robert Summerfelt
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Patent number: 6807506Abstract: A test executive system for controlling a test upon a device under test that is distinct and separate from said test executive system. The test executive system provides interactive dialog boxes in the following manner. A signal that an event in a testing procedure occurs is received. A file storing testing information is retrieved responsive to the signal. The testing information includes directions for the user to perform an action required to continue the test. The test executive system includes a web browser and the test information may comprise a web page. The testing information is displayed along with at least one input option. An input is then received from the user. The input is then processed responsive to receiving said input.Type: GrantFiled: March 20, 2002Date of Patent: October 19, 2004Assignee: Agilent Technologies, Inc.Inventors: Christopher K Sutton, Richard Mills
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Patent number: 6806658Abstract: A LED that includes a light emitter that emits light of a first wavelength and a phosphor layer that converts a portion of that light to light of a second wavelength is disclosed. The phosphor layer includes a powdered phosphor suspended in a photo-curable medium that sets upon exposure to light of a curing wavelength. The phosphor layer can also include a thixotropic agent that reduces the rate at which the powdered phosphor settles in the medium prior to the medium being exposed to light of the curing wavelength. The photo-curable medium preferably includes a photo-curable epoxy that cures in a time that is short compared to the settling time of the phosphor powder in the medium.Type: GrantFiled: March 7, 2003Date of Patent: October 19, 2004Assignee: Agilent Technologies, Inc.Inventors: Kheng Leng Tan, Abdul Karim Aizar, Su Lin Oon, Boon Chun Tan
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Patent number: 6807214Abstract: A modulated light emitter having a laser and modulator constructed on a common substrate. The light emitter includes an active layer having a quantum well (QW) layer sandwiched between first and second barrier layers. The active layer includes a laser region and a modulator region connected by a waveguide. The laser region emits light when a potential is applied across the active layer in the laser region. The modulator region has a first state in which the modulator region absorbs the generated light and a second state in which the modulator region transmits the generated light. The modulator region assumes either the first or second state depending on the potential across the modulator region. The QW layer in the modulator region is under a tensile strain, which provides improved light absorption in the first state.Type: GrantFiled: August 1, 2002Date of Patent: October 19, 2004Assignee: Agilent Technologies, Inc.Inventors: Scott W. Corzine, David Bour
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Patent number: 6806110Abstract: A monolithic array of vertical cavity lasers with different emission wavelengths on a single wafer, and method of manufacture therefor, is provided. A first reflector is over the semiconductor substrate with a photoactive semiconductor layer. A reflector support defines first and second air gaps with the photoactive semiconductor layer. The second and third air gaps are made to be different from each other by geometric differences in the reflector support structure. Second and third reflectors are formed over the reflector support whereby a first laser is formed by the first reflector, the photoactive semiconductor structure, the first air gap, and the second reflector and whereby a second laser is formed by the first reflector, the photoactive semiconductor structure, the second air gap, and the third reflector. The emission wavelengths of the first and second lasers are different because of the different sizes of the first and second air gaps.Type: GrantFiled: May 16, 2002Date of Patent: October 19, 2004Assignee: Agilent Technologies, Inc.Inventors: Steven D. Lester, Virginia M. Robbins, Jeffrey N. Miller
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Patent number: 6806129Abstract: A method for forming a heterojunction bipolar transistor (HBT) includes forming an etch mask a top layer of the HBT to expose a portion of the emitter cap layer, and selectively etching the exposed portion of the emitter cap layer to (1) form a reentry feature and (2) to expose a portion of the emitter layer. The method further includes selectively etching the exposed portion of the emitter layer to expose a portion of the base layer, and forming a metal layer over the exposed portion of the base layer and the exposed portion of the emitter cap layer.Type: GrantFiled: May 9, 2003Date of Patent: October 19, 2004Assignee: Agilent Technologies, Inc.Inventors: Scott A. McHugo, Gregory N. DeBrabander
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Patent number: 6806960Abstract: A multi-axis interferometer uses a combined beam for a first pass through the interferometer optics. Measurement and reference components of the combined beam that exit the interferometer optics are subject to walk-off that measurement or reference reflector misalignment can cause. A return reflector and non-polarizing beam splitter system split the combined beam into separated input beams for the various axes of the interferometer and return the separated beams for respective second passes through the interferometer optics. Walk-off for the separated beams in the interferometer optics cancels the walk-off for the combined beam to eliminate beam walk-off in separated output beams. Sharing a combined beam for a first pass through the interferometer optics reduces the sizes required for the interferometer optics and reference and measurement mirrors. The multi-axis interferometer may have a single return reflector.Type: GrantFiled: October 30, 2002Date of Patent: October 19, 2004Assignee: Agilent Technologies, IncInventors: Kerry D. Bagwell, Greg C. Felix, John J. Bockman, Alan B. Ray