Abstract: A modulation system having in-phase and quadrature phase (IQ) calibration while on-line. The modulation system includes digital filters for converting I and Q data bit streams into filtered multilevel I and Q digital data streams, digital-to-analog converters, and an IQ modulator for converting the analog I and Q data streams into a modulated output signal having a representative IQ diagram having modulation states and transition locations between the modulation states. The system also includes an on-line correction data state detector, an IQ correction code, and a scalar amplitude detector. The on-line correction state detector monitors the data states in memories of the digital filters and detects the presence of particular data states that are expected to result in particular modulation states or transition locations. The amplitude detector monitors the modulated output signal and provides representative detected magnitudes.

Abstract: There is provided an adapter for electrically interconnecting a first circuit substrate with a second circuit substrate. The adapter includes a first electrical connector which is operatively connected to the first circuit substrate. The first electrical connector mates with a corresponding second electrical connector which is operatively connected to the second circuit substrate. A longitudinal guide is provided with the adapter for receiving an edge of one of the first circuit substrate and the second circuit substrate. The longitudinal guide is positioned such that when the edge of one of the first circuit substrate and the second circuit substrate is received therein, relative translation of the first circuit substrate with respect to the second circuit substrate directs the first electrical connector and the second electrical connector together to thereby provide electrical engagement therebetween.

Abstract: A method and apparatus include processing for providing reliable internetworking services that begins by determining whether identified internetworking resources and identified intranetworking resources provide a reliable intranetworking service. For example, the internetworking service may be a communication, data transfer, file share, etc., between two or more users affiliated with different networks. The identified intranetworking resources are those links within each network to support the communication (i.e., the internetworking service) and the identified internetworking resources are those that couple the networks. The processing continues by determining whether the reliable internetworking service cannot be provided due to a failure of one of the identified intranetworking resource. When this occurs, the identified internetworking resources that are associated with the failed intranetworking resource are flagged.

Abstract: A modulation system having in-phase and quadrature phase (IQ) calibration while on-line. The modulation system includes digital filters for converting I and Q data bit streams into filtered multilevel I and Q digital data streams, digital-to-analog converters for converting the digital data streams from digital to analog form, and an IQ modulator for converting the analog I and Q data streams into a modulated output signal having a representative IQ diagram having modulation states and transition locations between the modulation states. The digital filters include forward shifting memories having several samples of the data bit streams for each data bit time. The system also includes an on-line correction data state detector, an IQ correction code, and a scalar amplitude detector. The on-line correction state detector monitors the data states in the memory and detects the presence of particular data states that are expected to result in particular modulation states or transition locations.

Abstract: A method and apparatus for load distribution across memory banks with constrained access is accomplished using a bank balancer that ensures that data to be buffered is evenly distributed throughout the various banks of the memory structure. The bank balancer maintains bank depth information relating to each of the banks. The bank balancer receives dequeue and enqueue information, where the dequeue information specifies read operations that will remove data from the various banks, and the enqueue information indicates that there is data to be written to the memory banks. The dequeue information constrains which banks may be utilized to enqueue received data. In order to determine to which banks to enqueue data, the bank balancer sorts the banks by their depth. The bank balancer then eliminates those banks which cannot be used for enqueue operations due to either the dequeue operations or other enqueue operations that have already been determined.

Abstract: A method is described for allocating buffers in a packet switched communication system offering different classes of service, each class of service being associated with a QoS queue. The optimal buffering is determined when a new packet for a particular QoS class arrives. The buffer limit is for the queue associated with said particular class in accordance with the determination, and new packet is handled according to the newly set buffer limit.

Abstract: A system and method of distributing information from a central source to network elements in a communications network. The central source or network manager is augmented by a distributor which maintains a record of all table entries or transactions originating at the central source. The distributor also maintains a dynamic record of all network elements including current status information and the last transaction successfully received thereby. Each table entry is assigned a transaction number (NextTN) which is incremented by one with each new transaction. The transaction last received by a network element is assigned a transaction number (LastTN) which is one less than NextTN. If an element has been temporarily out of service, upon its return to service its LastTN is compared with the source's current NextTN and if the difference is greater than one, the entries are update sequentially beginning with the table entry following its LastTN.

Abstract: The ATM transmitting apparatus for transmitting messages, such as frame relay packets, associated with a plurality of connections comprises ATM layer transmission equipment for receiving multiple messages, segmenting each received message into a plurality of smaller data units, such as 48 byte AAL SAR protocol data units, and multiplexing such data units into a single stream for transport over a physical interface. A scheduler receives messages from each of the connections and transfers the messages to the transmission equipment. The scheduler can dynamically set a transmission rate for any connection, and allocates each connection whose message is transferred to the transmission equipment a substantially maximal amount of bandwidth at any given time during the transmission of the message, to thereby minimize interleaving of data units from the various connections and reduce the average latency (per unit of message) in transmitting the messages across a network.

Abstract: A device and algorithm for fairly allocating available bandwidth between contending connections at a contention point in a data network. The allocation is based on global queue size at the contention point and a weighted value assigned to the data traffic. The device and algorithm find particular application in an ATM network which supports the available bit rate (ABR) service category.

Abstract: An electronic circuit pack having a printed circuit board with a faceplate at a front of the board. The faceplate has two end regions carrying latches for holding the board into a shelf. A front wall of the faceplate has an intermediate part between the end regions, the intermediate part extending forwardly of the end regions and lying at least between the latches. Preferably, the intermediate part of the front wall extends as far as a frontal vertical plane of the shelf which is the foremost position allowable for a shelf and a circuit board combination. The intermediate part of the front wall lying in this forward position provides additional space behind it for extending the electronic circuitry of the circuit pack for a unitary shelf size. This additional space is occupied by the printed circuit board with conductors and electronic components and/or connectors for test purposes and memory cards.

Abstract: A modification to the “leaky bucket” algorithm provides fair treatment of Frame Relay packets of varying length. The previously known leaky bucket scheme requires that there be sufficient credits in either the committed burst (Bc) bucket or excess burst (Be) bucket to accommodate the entire frame at an access point for the frame to be accepted. The “elastic leaky bucket” algorithm of the present invention permits acceptance of frames if there are any credits at all in the relevant buckets. This provides for fair treatment of long frames.

Abstract: A method of assigning effective bandwidth to a physical or logical link for propagating multiple virtual paths through a switched digital communications network is described. Switching nodes within the network have more than one interconnecting link in order to provide redundancy in the event of link failure. The effective bandwidth is assigned to each link according to dual multipliers or booking factors. The first booking factor is used for provisioning the link on set up and the second booking factor is for re-routing in the event of link failure.

Abstract: A radio interface card for use in a base station of a broadband wireless ATM system to support bi-directional communications with customer premise network interface units (NIUs) over a wireless link. The ATM radio interface card (ARIC) includes a modem for modulating data received from an ATM backbone connected to the base station into a point to multipoint format for transmission over the link to the NIUs. A demodulator in the ARIC supports a point to point protocol for processing digital communications received from distributed NIUs located within a geographic area.

Abstract: A scheduling device for use in a packet-switched network, belonging to the class of non-work conserving or idling weighted round robin (WRR) arbiters, assigns a packet stream slots in a fixed-length time division multiple access (TDMA) frame by selecting free slots which are closest to ideal slot positions that would, if assigned, eliminate jitter or cell delay variation. The scheduler is able to simultaneously determine if a new constant bit rate connection requiring a predetermined bandwidth conforms to a leaky bucket or GCRA algorithm characterized by a peak packet or cell emission interval T=1/PCR and a packet or cell delay variation time, CDVT, i.e., whether the new connection is GCRA (T, CDVT) conformant.

Abstract: A semi-permanent virtual path circuit (SPVPC) is used in a dedicated-connection switching digital network for routing and maintaining data flow between network edge nodes. A two level connection admission control and signaling regime is employed wherein the semi-permanent virtual path circuit is automatically provisioned by a network management system to level two signaling and connection admission control and the physical link between pairs of core nodes is provisioned with level one resources. Under this scheme the physical link between core nodes is limited to virtual path circuits and the SPVPC carries switched virtual channel circuits (SVCCs) and semi-permanent virtual channel circuits (SPVCCs). The level two resources are configured to react slower to network changes, such as network failure, than the level one resources.

Abstract: A method and system for implementing network policy is described. The method involves storing policy data using certificates using a certificate database server. Upon retrieval, a policy is then validated as properly certified prior to use. When a policy is not validated, it indicates tampering or improper policy data entry. When policy data is successfully validated, the policy is implemented.

Abstract: A method and apparatus for extracting data from a stream of data includes processing that begins by receiving at least one bit of data from a bit stream of data. The bit stream of data represents packetized data that is formatted based on a data packetizing protocol (e.g., HDLC encapsulated data packetizing formats). Next, a data packet associated with the at least one bit is identified based on time occurrence of receiving the bit. Next, the status of the data packet is determined based on the time occurrence of the bit and the data packet (e.g., the content of the data contained within the data packet and/or the bit). The processing continues by extracting data from the at least one bit based on the status of the data packet and the content of the bit. Next, the processing updates at least a portion of the status of the data packet based, at least partially, on the content of the bit.

Abstract: The invention relates to distributed computer or server networks and to methods of automatically establishing communication links between individual servers in the network. By taking advantage of the properties of group addresses (anycast addresses) inherent in certain networking technologies, coupled with innovative discovery and hunt protocols the servers in the network all become members of an overlay spanning tree where the tree is comprised of servers as nodes and communication links as edges. Discovery and hunt protocols are implemented to locate peer servers in the network and communication links are set up as required.

Abstract: In a method of fair queue servicing at a queuing point in a multi-service class packet switched network, incoming packets are received in buffers and outgoing packets are scheduled by a weighted fair queue scheduler. Real-time information of buffer usage along with the minimum bandwidth requirement is used to dynamically modify the weights of the weighted fair queue scheduler.