Abstract: A method and apparatus for setting up a telecommunications call from a calling customer (caller) terminal to one of a plurality of call destinations through an interconnection network. The caller dials an 800 number. This number is identified in a first data base as indicating a plurality of possible services, each of which is associated with one or more call destinations. A second data base provides the identification of a switch for generating an announcement to the customer and for the identification of an announcement in that switch. The call is connected to that announcement and an automatic speech and tone recognition unit, and the announcement prompts the caller to speak a command or key a dual tone multifrequency (DTMF) signal in order to select one of the possible destinations.

Abstract: A structure of first and second grating sections separated by a phase-shift section serves as a narrow-band resonator filter. Such structure may be optically coupled to a semiconductor laser cavity, and the resulting assembly can serve as a tunable narrow-linewidth laser, e.g., in wavelength-multiplexed and coherent-lightwave communications systems.

Abstract: A sol-gel process is utilized for producing silicon oxide glasses useful in the manufacture of devices such as semiconductor devices. These glasses are easily deposited by techniques such as spinning. Not only is the glass easily applied, but also has advantageous electrical, etching, and mechanical properties. Thus, these glasses are useful in applications such as passivating layers for integrated circuit devices and as intermediary layers in trilevel lithography for the production of such devices.

Abstract: A method and system for improving the design of an integrated circuit by iteratively analyzing the circuit and improving it with each iteration, until a preselected constraint is met. The design improvement is realized by selecting a model for the delay through each active element of the circuit that is characterized by a convex-function of the logarithm of the active element's size. Using the convex function model, with each iteration a static timing analysis of the circuit identifies the output that most grievously violates the specified constraint. With that output selected, an analysis of the path's timing structure identifies the active element in that path whose change in size would yield the largest improvement in performance. The size of that active element is adjusted accordingly and the iteration is repeated. For further improvement, the interconnection pattern of subnetworks of the circuit is evaluated and rearranged to improve performance.

Abstract: A vertical, enhancement mode InP MISFET includes a conducting n-type substrate, a semi-insulating Fe-doped InP blocking layer on the substrate, a conducting layer formed in the blocking layer, a groove which extends through both the conducting layer and the blocking layer, a borosilicate dielectric layer formed on the walls of the groove, a gate electrode formed on the dielectric layer, drain electrodes formed on each side of the gate electrode, and a source electrode formed on the bottom of the substrate. When a positive gate voltage relative to the source is applied, conduction channels are formed along the sidewalls of the groove, and current flows vertically from drain to source.

Abstract: Disclosed are semiconductor devices and circuits which are highly resistant to the effects of radiation. A thin conductive layer, which is biased at substrate potential, and a thin oxide are provided under the usual field oxide of the devices. The conductive layer shields the semiconductor substrate from the effects of charge generation in the field oxide due to radiation absorption.

Abstract: A transistor is described which the base region comprises a submonolayer of essentially only dopant atoms. One embodiment is a GaAs/AlGaAs heterojunction bipolar transistor in which the base region comprises a submonolayer of Be atoms. The effective base transit time is negligible in these transistors.

Abstract: A symmetric integrated FET amplifier is disclosed which exhibits a DC offset voltage that is insensitive to power supply variations, as well as variations in the threshold voltages of the FETs forming the amplifier. These variations are known to be most prevalent in InP-based FET amplifier arrangements. The symmetry is achieved by using a pair of impedance matching elements in the input stage of the amplifier to essentially match the impedance of the input FET and its load element, and a matching buffer FET and diode level shifting arrangement are used to match similar elements present in the output branch of the amplifier structure. The impedance matching elements, as well as the level shifting diodes, may all be formed with FET structures to minimize fabrication problems. In accordance with the symmetric arrangement of the present invention, the output DC offset voltage will be maintained at zero volts, regardless of the variations noted above.

Abstract: A method of performing remote process execution in a computer network. A remote process execution request, including an identification of a process to be executed, is transmitted from a requesting computer to a serving computer. At both the requesting and the serving computers, a file addressing structure is established, so that a file reference by the remote process at the serving computer addresses a file located at the requesting computer. The remote process is activated at the serving computer in response to the remote process execution request. In response to a file reference by the remote process, the file is automatically accessed from the requesting computer in accordance with the addressing structure. The method includes a technique by means of which files may be selectively and automatically accessed from either the requesting or the serving computer, as desired by a user.

Abstract: A method of fabricating FETs to reduce parasitics. Contact is made to the source and drain regions through a polycrystalline silicon runner which is aligned with the edge of the gate electrode. This is accomplished by providing a multi-level electrode structure including a gate electrode and depositing the polycrystalline silicon layer over the device. The polycrystalline silicon is rendered selectively removable in the portion overlying the gate electrode. When this portion is removed, the remaining polycrystalline is aligned with the gate.

Abstract: A high frequency DC to DC converter having at least two phase differentiated pulsed voltage sources, utilizes two phase differentiated unidirectional power flow resonant circuits to permit multiple quasi resonant operation of the converter and thereby gain the benefit of lowered EMI, high efficiency, lowered component stress and increased power throughput.

Abstract: An integrated circuit has output buffers whose switching rise and/or fall times are controlled to compensate for process speed and other variations. Therefore, an integrated circuit fabricated by a "fast" process does not generate excessive noise, while integrated circuits fabricated by a "slow" process still obtain adequate speed. A control voltage generated by an on-chip voltage divider network is applied to the gate of a control transistor to provide the compensation.

Abstract: A is a duel processor system (100) with duplicated memory (114,124) has two modes (10,11) of operation: a converged mode (10) in which one of the two processors (101,102) is active and executing all system tasks while the other processor is inactive; and a diverged mode (11) in which both processors are active and independently executing different tasks. The system automatically changes modes in response to requests such as manual and program control and certain system fault conditions. In diverged mode, the system may be in either of two states of operation (1 and 2). In one state (1) one processor (101) is designated a primary processor, and in the other state (2) the other processor (102) is designated the primary processor. In the converged mode the system may be in either of four states of operaton (3-6). In two of these states (3,4) one processor is active while the other processor is standing by ready to take up execution of tasks from the point where the one processor stoped execution.

Abstract: An optical system, including a waveguide such as an optical fiber, in which optical signals are noninvasively coupled into the waveguide at any point along the length of the waveguide, is disclosed. This is achieved by coupling substantially constant intensity electromagnetic radiation into the waveguide, and then impinging upon the waveguide a directed beam of energy, such as electromagnetic radiation or heat, from an energy source. Alternatively, the waveguide is impinged upon by a combination of an energy beam and a stimulus, e.g., a temperature change. The energy beam, or energy beam and stimulus, induce at least partial absorption of the guided, substantially constant intensity electromagnetic radiation by radiation-absorbing material in the waveguide, to produce the desired optical signal.

Abstract: Method and apparatus are provided for overcladding a preform rod (22). The preform rod is aligned with and inserted into an overcladding tube (30). The outer diameter of the preform rod and the inner diameter of the tube are such that the clearance between the tube and the rod does not exceed a predetermined value. Successive increments of length of the tube and rod therein are subjected to a controlled zone of heat while the pressure inside the tube is maintained at a value which is substantially less than that outside the tube. This causes the tube to be collapsed onto the preform rod to provide an overclad preform and subsequently a drawn optical fiber in which the overcladding is substantially concentric with respect to the optical fiber core.

Abstract: An arrangement for endpoint detection improves speech recognition accuracy where the input signal includes nonstationary noise. Energy pulses are found by looking for local energy level peaks, then analyzing surrounding energy levels to determine pulse boundaries. Energy pulses are combined according to predetermined criteria to form longer pulses corresponding to words or phrases in the input signal.

Abstract: A switching system including a number of switching modules each having a plurality of access ports. Incoming and outgoing packet channels are extended between each switching module and an inter-module packet switch. Each of the switching modules includes both a packet switching unit and a circuit switching unit for switching information to and from the access ports. Each switching module further includes a control unit that controls the switching units and that generates inter-module control packets, and a communication interface that transmits inter-module control packets generated by the control unit on the incoming packet channel to the inter-module packet switch. The communication interface also transmits inter-module control packets received on the outgoing packet channel from the inter-module packet switch to the control unit.

Abstract: An optical fiber system which includes a source of electromagnetic radiation, e.g., a laser, in optical communication with a multicomponent halide glass optical fiber is disclosed. This system is distinguished from previous such systems in that, within the context of the inventive system, the multicomponent halide glass fiber exhibits lower intrinsic loss than when used in previous such systems. This is achieved by choosing the source in relation to the composition of the fiber so that the wavelength of at least a portion of the electromagnetic radiation emitted by the source is substantially equal to the minimum intrinsic loss wavelength for the fiber, as determined using a new, more accurate procedure.

Abstract: A digital clock recovery scheme is disclosed. A reference clock, is used to provide a plurality of N signals with different clock phases. The incoming data stream is sampled and clocked with the reference clock to generate a plurality of M samples for each data bit. The logic values of the M samples are then analyzed to determine the relationship between the current clock phase and the data bit transition. In particular, if all samples agree, the clock phase is correctly aligned with the data. If the clock phase is either leading or lagging the data, various samples will disagree. In the latter situation, the clock phase is adjusted until all samples agree, the particular clock which provides this state thus being defined as the recovered clock signal.

Abstract: An electronics space-division packet switch is disclosed in which each switch crosspoint includes digital logic capable of resolving simultaneous contentions for the source output buss medium. In particular, a bit-by-bit comparison of priority codes disconnects all switches but the one with the highest priority from the output buss.This extremely simple crosspoint switch structure makes possible extremely large space-division packet switches in very compact physical form, using large scale integration techniques.