Abstract: An improved heat spreader having a specified structure suitable for commonly used in semiconductor packages regardless of pad sizes of the packages is disclosed. The heat spreader has a pad evenly provided with a plurality of first indentations. A plurality of outward broadening openings radially extend from the pad. A plurality of second indentations are provided on a leadframe facing surface of the heat spreader at the outside of the openings, so that the second indentations surround the openings. A plurality of small coupling sections radially extend on the edge of the heat spreader at every 90.degree. angle. The small coupling sections have their downward extending projections at their distal ends. A plurality of large coupling sections diagonally extend on the edge of the heat spreader. Each of the large coupling sections has a plurality of outward extending projections.

Abstract: Method and device for molding integrated circuit packages using dambarless lead frames are disclosed. The mold dies and the lead frame have means for preventing resin leakage out of the mold dies during the package molding step. The leakage preventing means may comprise a tape put on the leads, an enlarged area sections provided on each lead and notches formed on each lead. The leakage preventing means may comprise projections formed on a lead pressing frame of one of the mold dies. In another embodiment, an auxiliary lead frame, which has a plurality of rectangular openings and will be fixed to a bottom mold die, is used as the resin leakage preventing means. When using the auxiliary lead frame, the dambarless lead frame is laid on the auxiliary lead frame and clamped by a top mold die. The enlarged area sections may be formed on the inner leads exclusively or on both the inner and outer leads.

Abstract: According to the invention, an electronic device mounted on a substrate is encapsulated using a standard two-piece mold. A novel degating region is formed on a surface of the substrate to allow removal of excess encapsulant formed on the surface during molding without damaging the remainder of the device. The material of the degating region that contacts the encapsulant forms a weak bond with the encapsulant, relative to the bond formed between the encapsulant and the substrate, so that the encapsulant can be peeled away from the degating region without damaging the substrate or other portion of the device. The degating region is provided without introducing additional steps into the process for forming the device. The presence of the degating region eliminates the necessity of using a three-piece or modified two-piece mold to achieve top gating in order to degate without damaging the device. In one embodiment, the degating region is made of gold.

Abstract: A highly integrated semiconductor package having a light and compact construction and heat dissipating means suitable to effectively dissipate heat generated from the package during the operation of the package is disclosed. The semiconductor package has a lower heat sink for dissipating heat generated from a semiconductor chip of the package. The package also has a tape attached to the top of a plurality of inner leads of the package. The inner leads are attached to the top surface of the lower heat sink. The package further has a heat dissipating means for dissipating heat generated from the inner leads. The heat dissipating means has a heat bar attached to the tape. An upper heat sink may be integrated with the heat bar so as to form the heat dissipating means.

Abstract: A heat spreader with one or more integrally formed open regions discourages the formation of air bubbles in the encapsulant of a plastic packaged integrated circuit. Little or no air bubbles can be trapped between the heat spreader and the encapsulant surface. Any air bubbles that do form in the encapsulant can escape through the open regions of the heat spreader. The heat spreader of the invention is placed on the surface of a liquid encapsulant and the encapsulant fills the open regions of the heat spreader and covers the sides of the open regions. When the encapsulant hardens, a form fitting bond between the heat spreader and the upper surface of the encapsulant is created. This form fitting bond provides for secure attachment of the heat spreader to the surface of the encapsulant. One embodiment of the heat spreader of the invention includes integrally formed tabs with which a supplementary heat spreader, such as heat tower, is inserted for even greater heat dissipation capability.

Abstract: A ball grid array package and low cost method for manufacture of the same is disclosed herein. The ball grid array package includes a thermal conductor which is a linearly co-extensive outer layer of an interconnection substrate and forms the outer surface of the ball grid array package. An integrated circuit chip is positioned on the underside of the package in a well region. The well region is either formed directly in the interconnection substrate or is formed by the application of a dam. The well region is then filled with an insulating encapsulant material to a predetermined level.

Abstract: There is disclosed a copper oxide-filled polymer die attach adhesive composition for semiconductor package The copper oxide-filled polymer die attach adhesive composition for semiconductor package is made of an adhesion resin mixture and an inorganic filler, wherein the inorganic filler includes copper oxide selected from a group consisting of CuO, Cu.sub.2 O and the mixture thereof in an amount of approximately 0.1 to approximately 90% by weight. Optionally, silver may be contained in the composition. It is capable of maintaining electric conductivity under severe temperature cycle as well as providing bonding strength enough to prevent package crack and delamination.

Abstract: An inexpensive packaged integrated circuit with improved heat dissipative capacity and electrical performance. In one embodiment, the packaged integrated circuit includes a semiconductor die, a plurality of electrically conductive package leads, a thermal induction plate and a plurality of electrically conductive bond wires. A surface of the thermal induction plate may remain exposed outside the package. The thermal induction plate reduces package lead inductance and provides shielding of electromagnetic radiation that can cause electromagnetic interference. Preferably, holes are formed through the thermal induction plate to enhance flow of the package material during formation of a package and provide interlocking of the package to the remainder of the integrated circuit. In another embodiment, the packaged integrated circuit further includes a heat sink having a surface exposed to the exterior of the package.

Abstract: A method and apparatus for applying flux to a series of metallization contacts or plated contact pad a substrate exposed by an apertured solder mask, employs a compressible transfer pad. A central flux pick-up area is formed on the transfer pad bottom surface. The bottom surface may be spherical and may include a cylindrical post onto which a predetermined amount of flux is transferred, such as by dipping the pick-up area into a reservoir of semi-liquid paste flux. The transfer pad is then positioned over and compressed on the solder mask such that the picked up flux on the flux pick-up area of the transfer pad is pressure forced by compression of the transfer pad through apertures in the solder mask directly and successively into all the series of depressions formed on the substrate until all the depressions are substantially filled with flux.

Abstract: An inexpensive packaged integrated circuit with improved heat dissipative capacity and electrical performance. In one embodiment, the packaged integrated circuit includes a semiconductor die, a plurality of electrically conductive package leads, a thermal induction plate and a plurality of electrically conductive bond wires. A surface of the thermal induction plate may remain exposed outside the package. The thermal induction plate reduces package lead inductance and provides shielding of electromagnetic radiation that can cause electromagnetic interference. Preferably, holes are formed through the thermal induction plate to enhance flow of the package material during formation of a package and provide interlocking of the package to the remainder of the integrated circuit. In another embodiment, the packaged integrated circuit further includes a heat sink having a surface exposed to the exterior of the package.

Abstract: An integrated circuit package, and a method for forming the integrated circuit package, including a single layer or multilayer substrate in which interconnection vias are formed is described. Laser energy is swept across a surface of a mask in which holes have been formed. Laser energy passing through the holes of the mask forms vias in a substrate held in place below the mask. The laser energy is swept at such a speed and is maintained at such an energy level that the laser energy forms vias in the substrate, but does not penetrate a set of leads attached to the substrate. Vias may be formed in this way by either a mask imaging, contact mask or conformal mask technique. The laser energy is emitted from a non-thermal (e.g., excimer) laser. The substrate is formed of an organic (e.g., epoxy) resin. The resin may include reinforcing fibers (e.g., aramid fibers). Substrates may be formed on one or both sides of the set of leads.

Abstract: According to the invention, a method and structure for flip chip interconnection of an integrated circuit chip to a substrate is provided. The method and structure of the invention overcome the problems associated with interconnecting the chip to the substrate by wirebonding and are less expensive than prior art flip chip interconnection methods and structures. Conventional integrated circuit chips that have been made using wafer fabrication processes for wirebonding chip-level interconnection are electrically connected to a substrate using a flip chip interconnection. Conventional wirebonding equipment can be used to bump chips for use in the invention.

Abstract: An integrated circuit package including a heat sink is disclosed. The package incorporates an sealing (or locking) ring located circumferentially around the heat sink to provide a better seal between the encapsulant and heat sink and to reduce the possibility that contaminants from outside the package will reach the interior semiconductor die. A stress relief section is formed in the package leads and a dielectric adhesive material is used to attach the package leads to a heat sink surface. The dielectric adhesive creates a secure bond between leads and heat sink, allows heat transfer from the leads to the heat sink, and prevents shorting of the leads to the heat sink.

Abstract: A low cost electronic device package having greatly improved heat dissipation capability. The package includes a heat slug, preferably formed from oxygen-free high-conductivity copper, that has a surface exposed outside the package. A simplified and inexpensive manufacturing method is described using a "drop in" technique. Using this technique, the size and shape of the heat slug is dependent only on the size and shape of the mold cavity; the package may have any number of leads and any size die. The heat slug is preferably formed with fins around its circumference so that the slug is self-aligning when it is dropped into the mold cavity. Preferably, slots are formed through the heat slug to provide improved encapsulant flow during the encapsulation process and interlocking between slug and encapsulant in the finished package.

Abstract: An integrated circuit package, and a method for forming the integrated circuit package, including a single layer or multilayer substrate in which interconnection vias are formed is described. Laser energy is swept across a surface of a mask in which holes have been formed. Laser energy passing through the holes of the mask forms vias in a substrate held in place below the mask. The laser energy is swept at such a speed and is maintained at such an energy level that the laser energy forms vias in the substrate, but does not penetrate a set of leads attached to the substrate. Vias may be formed in this way by either a mask imaging, contact mask or conformal mask technique. The laser energy is emitted from a non-thermal (e.g., excimer) laser. The substrate is formed of an organic (e.g., epoxy) resin. The resin may include reinforcing fibers (e.g., aramid fibers). Substrates may be formed on one or both sides of the set of leads.

Abstract: A ball grid array is formed by mounting and electrically connecting one or more electronic devices to a substrate in which vias are formed to interconnect electrically conductive traces formed in a surface of the substrate to solder ball pads formed at an opposite surface of the substrate. The vias are formed by mechanical or laser drilling. Solder balls are formed on each of the pads and are reflow-attached to, for instance, a printed circuit board. The electronic components can include one or more integrated circuit chips, as well as passive components. The electronic components are attached to the substrate using wirebonding, TAB or flip chip connection. An encapsulating material is applied to encapsulate the electronic devices.

Abstract: An improved integrated circuit package including a heat sink and an improved method for making the package is disclosed. The package incorporates an improved sealing (or locking) ring located circumferentially around the heat sink to provide a better seal between the encapsulant and heat sink and to reduce the possibility that contaminants from outside the package will reach the interior semiconductor die. A stress relief section is formed in the package leads and a dielectric adhesive material is used to attach the package leads to a heat sink surface. The dielectric adhesive creates a secure bond between leads and heat sink, allows heat transfer from the leads to the heat sink, and prevents shorting of the leads to the heat sink.

Abstract: Lead frames for microchips and other integrated circuit dies are produced by a continuous manufacturing method and apparatus in which silver spot plating is done prior to etching away unwanted portions of the lead frame substrate. A flexible substrate of a metal alloy is fed continuously from a reel, then spot plated with silver, coated with a photosensitive material, and exposed to intensive light in an exposure chamber using a photoresist or masking tool of predetermined design. The exposed photosensitive material is developed chemically, etched in acid, and placed in a chemical solution to remove any remaining unwanted material. The strip is then dried, cut to predetermined lengths and boxed for shipment. If necessary, the strip is downset and taped before packaging. In a presently preferred process, the metal alloy substrate is 42 alloy (Fe+Ni), and the selective spot plating is silver 100 to 150 microinches thick.

Abstract: A slitter machine for slitting a film sheet wound on a core in a roll to obtain desired widths of film sheet for laminating onto metallic substrates of semiconductor devices comprises a main frame, notches on the main frame for rotatably supporting the roll on the frame, a rotatable knife blade for slitting the roll sheet into a strip of desired width, a tiltable knife blade mounting plate on the frame for mounting the knife blade on the frame, guide tracks adjusting the lateral position of the knife blade to adjust the width of the strip being cut, an air cylinder for pressing the knife blade into the rolled sheet to cut the sheet into strips of the desired width, and a sensing roller for limiting the depth of the cut.

Abstract: Lead frames for microchips and other integrated circuit dies are produced by a continuous manufacturing method and apparatus in which silver spot plating is done prior to etching away unwanted portions of the lead frame substrate. A flexible substrate of a metal alloy is fed continuously from a reel, then spot plated with silver, coated with a photosensitive material, and exposed to intensive light in an exposure chamber using a photoresist or masking tool of predetermined design. The exposed photosensitive material is developed chemically, etched in acid, and placed in a chemical solution to remove any remaining unwanted material. The strip is then dried, cut to predetermined lengths and boxed for shipment. If necessary, the strip is downset and taped before packaging. In a presently preferred process, the metal alloy substrate is 42 alloy (Fe+Ni), and the selective spot plating is silver 100 to 150 microinches thick.