Patents Assigned to Analog Device Global
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Publication number: 20180061569Abstract: The disclosure relates to the manufacture of inductive components, in particular transformers, using a combination of microfabrication techniques and discrete component placement. By using a prefabricated core, the core may be made much thicker than one that is deposited using microfabrication techniques. As such, saturation occurs later and the efficiency of the transformer is improved. This is done at a much lower cost than the cost of producing a thicker core by depositing multiple layers using microfabrication techniques.Type: ApplicationFiled: August 26, 2016Publication date: March 1, 2018Applicant: Analog Devices GlobalInventors: Jan Kubík, Bernard Patrick Stenson, Shane Patrick Geary, Michael Noel Morrissey
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Patent number: 9906211Abstract: A circuit for compensation of baseline voltage wander operating at an input of an isolator is disclosed. The circuit can compensate electronically the frequency response of an isolation circuit (e.g., a transformer) by increasing the pass band in the low frequency region in order to minimize the baseline wander caused by low inductance windings. The compensation circuit can be used to inject a current ramp proportional to the amplitude and the duration of the pulse and inversely proportional to the open circuit inductance of the isolation circuit.Type: GrantFiled: August 2, 2016Date of Patent: February 27, 2018Assignee: Analog Devices GlobalInventor: Miguel Ángel Fernández Robayna
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Patent number: 9893623Abstract: A “windowless” H-bridge buck-boost switching converter includes a regulation circuit with an error amplifier which produces a ‘comp’ signal, a comparison circuit which compares ‘comp’ with a ‘ramp’ signal, and logic circuitry which receives the comparison circuit output and a mode control signal indicating whether the converter is to operate in buck mode or boost mode and operates the primary or secondary switching elements to produce the desired output voltage in buck or boost mode, respectively. A ‘ramp’ signal generation circuit operates to shift the ‘ramp’ signal up by a voltage Vslp(p?p)+Vhys when transitioning from buck to boost mode, and to shift ‘ramp’ back down by Vslp(p?p)+Vhys when transitioning from boost to buck mode, thereby enabling the converter to operate in buck mode or boost mode only, with no need for an intermediate buck-boost region.Type: GrantFiled: May 22, 2015Date of Patent: February 13, 2018Assignee: Analog Devices GlobalInventor: Hirohisa Tanabe
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Patent number: 9893877Abstract: Techniques for synchronization between multiple sampling circuits using a single pin interface to control an output data rate are described. The frequency or rate of a signal on this pin can be automatically determined and used to accomplish the required output data rate. Also described are techniques for using a single pin interface that can allow a sampling device to operate either in a master mode that can generate data strobes, or in a slave mode that can receive a convert start signal. Also described are techniques for controlling bandwidth and throughput for individual channels in a multi-channel device using a single pin interface. For example, using various techniques of this disclosure, integer multiple rate control for other channels can be provided thereby providing varying ODR for different channels, which can also control the bandwidth of interest.Type: GrantFiled: October 27, 2016Date of Patent: February 13, 2018Assignee: Analog Devices GlobalInventors: Mayur Gurunath Anvekar, Venkata Aruna Srikanth Nittala, Roberto Sergio Matteo Maurino, Naiqian Ren
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Patent number: 9893734Abstract: Aspects of this disclosure relate to a digital phase-locked loop (DPLL) arranged to adjust output phase using a phase adjustment signal. In certain embodiments, the phase adjustment signal can be received in a signal path from an output of a time-to-digital converter of the DPLL to an input to the digitally controlled oscillator of the DPLL. Some embodiments relate to adjusting the output phase of the DPLL to reduce a relative phase difference between the output phase of the DPLL and an output phase of another DPLL.Type: GrantFiled: October 3, 2016Date of Patent: February 13, 2018Assignee: Analog Devices GlobalInventors: Vamshi Krishna Chillara, Declan M. Dalton
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Patent number: 9893025Abstract: A high isolation wideband switch is disclosed. In one aspect, the switch includes an integrated circuit package having an integrated circuit die with a first plurality of leads that is positioned on a package substrate that has a second plurality of leads. The first leads of the integrated circuit die are connected to the second the leads of the package substrate via bond wires and a first electrical coupling occurs between the first leads and the integrated circuit die in response to an RF signal applied to the integrated circuit package. The bond wires have a second electrical coupling in response to the RF signal and the bond wires are arranged such that the second electrical coupling is matched to the first electrical coupling within a selected frequency band so as to reduce the overall electrical coupling of the integrated circuit package for RF signals within the selected frequency band.Type: GrantFiled: September 11, 2015Date of Patent: February 13, 2018Assignee: Analog Devices GlobalInventors: Yusuf Alperen Atesal, Turusan Kolcuoglu
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Publication number: 20180041200Abstract: A transformer based digital isolator is provided that has improved immunity to common mode interference. The improved immunity is provided by placing the transformer in association with an H-bridge drive circuit, and taking additional effort to tailor the on state resistance of the transistors to control a common mode voltage at the transformer.Type: ApplicationFiled: August 8, 2016Publication date: February 8, 2018Applicant: Analog Devices GlobalInventors: Michael Lynch, Brian Anthony Moane
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Publication number: 20180040941Abstract: Radio frequency (RF) isolators are described, coupling circuit domains operating at different voltages. The RF isolator may include a transmitter which emits a directional signal toward a receiver. Layers of materials having different dielectric constants may be arranged to confine the emission along a path to the receiver. The emitter may be an antenna having an aperture facing the receiver.Type: ApplicationFiled: August 2, 2016Publication date: February 8, 2018Applicant: Analog Devices GlobalInventors: Check F. Lee, Bernard P. Stenson, Baoxing Chen
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Patent number: 9887687Abstract: A method of trimming a component is provided in which the component is protected from oxidation or changes in stress after trimming. As part of the method, a protective glass cover is bonded to the surface of a semiconductor substrate prior to trimming (e.g., laser trimming) of a component. This can protect the component from oxidation after trimming, which may change its value or a parameter of the component. It can also protect the component from changes in stress acting on it or on the die adjacent it during packaging, which may also change a value or parameter of the component.Type: GrantFiled: January 28, 2015Date of Patent: February 6, 2018Assignee: Analog Devices GlobalInventors: Seamus Paul Whiston, Bernard Patrick Stenson, Michael Noel Morrissey, Michael John Flynn
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Publication number: 20180034279Abstract: According to some aspects, a power regulation system for energy harvesters that lacks a battery is provided. In some embodiments, the power regulation system may receive power from multiple energy harvesters that generate energy from different sources, such as wind currents and ambient light. In these embodiments, the power regulation system may selectively provide power from one or more of the energy harvesters to a load as environmental conditions change and power itself with energy from the energy harvesters. Thereby, the power regulation system may start and operate without a battery and provide power to the load over a wider range of environmental conditions.Type: ApplicationFiled: July 29, 2016Publication date: February 1, 2018Applicant: Analog Devices GlobalInventors: Junifer Frenila, Perryl Glo Angac, Oliver Silvela, JR.
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Patent number: 9882549Abstract: Provided herein are apparatus and methods for high linearity voltage variable attenuators (VVAs). In certain configurations, a high linearity VVA includes multiple shunt arms or circuits that operate in parallel with one another between a signal node and a first DC voltage, such as ground. Thus, the shunt arms are in shunt with respect to a signal path of the VVA. The multiple shunt arms include a first shunt arm of one or more n-type field effect transistor (NFETs) and a second shunt arm of one or more p-type field effect transistor (PFETs). The gates of the NFETs are controlled using a control voltage, and the gates of the PFETs are controlled using a complementary control voltage that changes inversely with respect to the control voltage.Type: GrantFiled: February 23, 2016Date of Patent: January 30, 2018Assignee: Analog Devices GlobalInventor: Ahmed Mohammad Ashry Othman
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Patent number: 9871373Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.Type: GrantFiled: March 27, 2015Date of Patent: January 16, 2018Assignee: Analog Devices GlobalInventors: Alan J. O'Donnell, David Aherne, Javier Alejandro Salcedo, David J. Clarke, John A. Cleary, Patrick Martin McGuinness, Albert C. O'Grady
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Patent number: 9864389Abstract: A delta-Vbe based bandgap reference voltage circuit generates a temperature stable reference voltage. First and second paths of the circuit each include a respective transistor coupled in series with a resistance. The collector current density of the transistor in first path is lower than the collector current density of transistor in the other path. A control path is used to generate a 2Vbe voltage that is coupled to the base nodes of the resistors in each path. A resistance that is coupled between a common node of a first end of the two paths and a circuit ground node. The circuit current is controlled by this resistance and a voltage drop of 2?Vbe is across the resistance. The output reference voltage of the circuit is 2(Vbe+?Vbe) when stack resistors in each path are used.Type: GrantFiled: November 10, 2016Date of Patent: January 9, 2018Assignee: Analog Devices GlobalInventor: Sharad Vijaykumar
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Patent number: 9866136Abstract: A power converter can include an electrical isolation circuit between input and output nodes. An input signal monitor node can be provided, such as on a converter output side of the isolation circuit. In an example, a peak detection circuit can be coupled to the input signal monitor node. The output node of the power converter can be configured to supply an output power signal that is a function of an input signal at the input node. The power converter can include multiple, independently-switchable switches at one or more of the input and output sides of the isolation circuit. In an example, the power converter with the input signal monitor node can be configured as a bias supply to provide power, at the output node, to a controller circuit for a main stage power converter circuit.Type: GrantFiled: December 9, 2013Date of Patent: January 9, 2018Assignee: Analog Devices GlobalInventors: Jun Duan, Liuqing Yang, Xudong Huang, Zhijie Zhu, Renjian Xie
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Patent number: 9866110Abstract: A switched capacitor voltage converter is provided that includes an array of switches configured to alternately switch multiple capacitors between a charge configuration in which the multiple capacitors are coupled in series with each other and in parallel with the source voltage and a discharge configuration in which a first set of capacitors having n capacitors are coupled in parallel with each other and in series with the load and a second set of capacitors having m capacitors coupled in parallel with the load.Type: GrantFiled: August 27, 2014Date of Patent: January 9, 2018Assignee: Analog Devices GlobalInventors: Miguel A. Ruiz, Jose Tejada Gomez
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Patent number: 9859878Abstract: A control circuit for use with a four terminal sensor, such as a glucose sensor. The Glucose sensor is a volume product and typically its manufacture will want to make it as inexpensively as possible. This may give rise to variable impedances surrounding the active cell of the sensor. Typically the sensor has first and second drive terminals and first and second measurement terminals, so as to help overcome the impedance problem. The control circuit is arranged to drive at least one of the first and second drive terminals with an excitation signal, and control the excitation signal such that a voltage difference between the first and second measurement terminals is within a target range of voltages. To allow the control circuit to work with a variety of measurement cell types the control circuit further comprises voltage level shifters for adjusting a voltage at one or both of the drive terminals, or for adjusting a voltage received from one or both of the measurement terminals.Type: GrantFiled: October 17, 2014Date of Patent: January 2, 2018Assignee: Analog Devices GlobalInventors: Colin G. Lyden, Donal Bourke
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Patent number: 9859803Abstract: A transformer based isolated bi-directional DC-DC power converter may have signals for controlling power transfer in first and second directions are derived from the same side of the transformer. The converter may include a transformer, a first switching circuit, a second switching circuit, and a controller. In a first mode, the controller controls the first and second switching circuits, and power is transferred from a first side to a second side. In a second mode, the controller controls the first and second switching circuits, and power is transferred from the second side to the first side.Type: GrantFiled: April 23, 2013Date of Patent: January 2, 2018Assignee: Analog Devices GlobalInventor: Bernhard Strzalkowski
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Publication number: 20170366876Abstract: Aspects of the embodiments are directed an analog front end circuit (AFE circuit), the AFE circuit including a beamforming circuit configured to receive as an input a plurality of receiver inputs, the receiver inputs coupled to a sensor element. The beamforming circuit can include a plurality of receiver sub-circuits, each sub-circuit including a digital-to-analog converter, a low noise amplifier, and an I/Q mixer circuit element; an adder circuit element at an output of the I/Q mixer circuit element; and a multiplexer coupled to an output of the adder circuit. The AFE can be part of a current sensing device. The current sensing device can include a two-dimensional array of sensor elements.Type: ApplicationFiled: June 14, 2017Publication date: December 21, 2017Applicant: Analog Devices GlobalInventors: Vinayak Agrawal, Gaurav Gupta, John Cleary, Ken M. Feen
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Publication number: 20170359079Abstract: Digital to analog converters (DAC) are used to convert digital signals to analog values. The digital system providing data to the analog converter may be highly tasked. A DAC is provided with some in built logic to assist in reducing the load on the devices driving the DAC. The DAC may include a library of functions that it can apply to the input words to modify transitions in the analog output words. The DAC may further include a health checking system for monitoring the digital words being supplied to the DAC and raising a concern, and taking action if required, if the sequence of words is unlikely to be correct or beyond the target operating range.Type: ApplicationFiled: June 9, 2017Publication date: December 14, 2017Applicant: Analog Devices GlobalInventor: DENNIS A. DEMPSEY
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Publication number: 20170359077Abstract: A buffer is provided where a part of the buffer is implemented in switched capacitor or other analog discrete time processing circuitry and a dynamic response characteristic, such as an effective gain or charge transfer coefficient between the input stage and an output stage is digitally controllable. This means that the buffer can be driven as if it was a system controlled by, for example a three (3) term controller, giving rise to greater, digital flexibility in tailoring the buffer's transient response.Type: ApplicationFiled: June 9, 2017Publication date: December 14, 2017Applicant: Analog Devices GlobalInventors: Dennis A. DEMPSEY, Harvey T. MERCADO