Patents Assigned to Analog Device Global
  • Patent number: 10170929
    Abstract: Apparatus and techniques described herein can include a load circuit comprising a direct current (DC) input terminal, and a source circuit comprising a direct current (DC) output terminal coupled to the DC input terminal of the load circuit. The source circuit can include a source control circuit configured to provide a current-limited DC output voltage and monitor the current-limited DC output voltage to detect an authentication signal provided at the DC output terminal by the load circuit, the load circuit configured to modulate the voltage at the DC output terminal using a pull-down circuit. The load circuit can be configured to compare the supply voltage at the DC input terminal to a reference voltage and, in response, energize other portions of the load circuit when the input current provided the DC input terminal is sufficient as indicated at least in part by the comparison.
    Type: Grant
    Filed: February 1, 2016
    Date of Patent: January 1, 2019
    Assignee: Analog Devices Global
    Inventors: Bin Shao, Yanfeng Lu, Scott D. Biederwolf
  • Patent number: 10164614
    Abstract: Embodiments of the present disclosure may provide a circuit comprising a tank circuit. The tank circuit may include an inductor having a pair of terminals, a first pair of transistors, and a first pair of capacitors. Each transistor may be coupled between a respective terminal of the inductor and a reference voltage along a source-to-drain path of the transistor. Each capacitor may be provided in a signal path between an inductor terminal coupled to a respective first transistor in the first pair and a gate of a second transistor in the first pair.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: December 25, 2018
    Assignee: Analog Devices Global Unlimited Company
    Inventors: Xin Yang, Tianting Zhao, Baoxing Chen
  • Patent number: 10157058
    Abstract: An adaptive self-configuring sensor node is disclosed herein. The node is associated with one or more sensor, and can include a microcontroller unit (MCU), sensors and a wired/wireless communication module (e.g., transceiver) to communicate the data collected by the sensors. Sensor node software running on the CPU can be adaptively reconfigured based on the sensors connected with the node, and using configuration data that is read from a non-volatile memory (NVM). The NVM can further store loadable sensor device specific data acquisition and processing (DAP) routines corresponding to one or more of the sensors, which can be executed to configure a sensor or cause collection or processing of sensor data.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: December 18, 2018
    Assignee: Analog Devices Global
    Inventors: Shankar S. Malladi, Nagarjuna Gandrothu, Subbarao Chennu
  • Patent number: 10158334
    Abstract: A capacitive gain amplifier circuit amplifies an input signal by a pair of differential amplifier circuits couples in series. The first differential amplifier circuit is reset during an autozero phase while disconnected from the second differential amplifier circuit, and the first and second differential amplifier circuits are connected together in series during a chop phase. A set of feedback capacitors is selectively switched in between respective outputs of the second differential amplifier circuit and respective inputs of the first differential amplifier circuit during the chop phase.
    Type: Grant
    Filed: May 19, 2017
    Date of Patent: December 18, 2018
    Assignee: Analog Devices Global
    Inventors: Hanqing Wang, Gerard Mora-Puchalt
  • Publication number: 20180358166
    Abstract: Techniques for fabricating low-loss magnetic vias within a magnetic core are provided. According to some embodiments, vias with small, well-defined sizes may be fabricated without reliance on precise alignment of layers. According to some embodiments, a magnetic core including a low-loss magnetic via can be wrapped around conductive coils of an inductor. The low-loss magnetic vias can improve performance of an inductive component by improving the quality factor relative to higher loss magnetic vias.
    Type: Application
    Filed: June 8, 2018
    Publication date: December 13, 2018
    Applicant: Analog Devices Global Unlimited Company
    Inventors: Jan Kubik, Bernard Patrick Stenson, Michael Morrissey
  • Publication number: 20180344203
    Abstract: A minimally invasive surgical instrument using 3-axis magnetic positioning, system and methods thereof. This invention describes two key ideas that enable the development of a magnetic position system based on integrated anisotropic magnetoresistive (AMR) magnetic field sensors. This achieves the resolution, power and area targets necessary to integrate 3 axes anisotropic magnetoresistance (AMR) sensors along with the Analog Front End integrated circuit (IC) in a 4 mm by 350 um integrated solution for catheter applications. The stringent area and power dissipation requirements are met by development through both system level solutions for higher field strengths and a minimally necessary Analog Front End (AFE) to meet the 1 mm rms resolution requirement in the power dissipation and area budget.
    Type: Application
    Filed: June 1, 2018
    Publication date: December 6, 2018
    Applicant: Analog Devices Global
    Inventors: Yogesh Jayaraman SHARMA, Christopher W. HYDE, Brendan CRONIN, Jochen SCHMITT
  • Patent number: 10148263
    Abstract: A combined isolator and power switch is disclosed. Such devices are useful in isolating low voltage components such as control compilers from motors or generators working at high voltages. The combined isolator and power switch includes circuits to transfer internal power from its low voltage side to the switch driver circuits on the high voltage side. The combined isolator and switch is compact and easy to use.
    Type: Grant
    Filed: July 21, 2016
    Date of Patent: December 4, 2018
    Assignee: Analog Devices Global Unlimited Company
    Inventors: Edward John Coyne, Patrick Martin McGuinness, William Allan Lane, Laurence O'Sullivan
  • Patent number: 10145906
    Abstract: A magnetic device may include a magnetic structure, a device structure, and an associated circuit. The magnetic structure may include a patterned layer of material having a predetermined magnetic property. The patterned layer may be configured to, e.g., provide a magnetic field, sense a magnetic field, channel or concentrate magnetic flux, shield a component from a magnetic field, or provide magnetically actuated motion, etc. The device structure may be another structure of the device that is physically connected to or arranged relative to the magnetic structure to, e.g., structurally support, enable operation of, or otherwise incorporate the magnetic structure into the magnetic device, etc. The associated circuit may be electrically connected to the magnetic structure to receive, provide, condition or process of signals of the magnetic device.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: December 4, 2018
    Assignee: Analog Devices Global
    Inventors: Alan J. O'Donnell, Robert Guyol, Maria Jose Martinez, Jan Kubik, Padraig L. Fitzgerald, Javier Calpe Maravilla, Michael P. Lynch, Eoin E. English
  • Publication number: 20180337084
    Abstract: Integrated digital isolators comprise a first transformer coil or capacitor plate mounted on an integrated circuit substrate, and separated from a second transformer coil or capacitor plate via an electrically insulating isolation layer. The electrical isolation that is achieved is dependent upon the material and thickness of the isolation layer. In order to reduce the amount of time required for fabrication while still allowing thick isolation layers to be deployed, in examples of the disclosure pre-formed sheets or tapes of dielectric material are applied to the substrate over the first transformer coil or capacitive plate, for example by being rolled onto the substrate using a heated roller. Such a technique results in a thick isolation layer that is formed using a simple process and much more quickly and reliably than conventional spin-coating or deposition techniques.
    Type: Application
    Filed: May 19, 2017
    Publication date: November 22, 2018
    Applicant: Analog Devices Global
    Inventors: Alan John Blennerhassett, Bernard Patrick Stenson
  • Publication number: 20180337085
    Abstract: Integrated digital isolators comprise a first transformer coil or capacitor plate mounted on an integrated circuit substrate, and separated from a second transformer coil or capacitor plate via an electrically insulating isolation layer. The electrical isolation that is achieved is dependent upon the material and thickness of the isolation layer. In order to reduce the amount of time required for fabrication whilst still allowing thick isolation layers to be deployed, in examples of the disclosure a pre-formed solid layer of dielectric material is bonded to the substrate over the first transformer coil or capacitive plate. The preformed solid layer is formed from a thick layer of solid dielectric material, which is ground to the required thickness, either prior to being bonded to the circuit substrate, or thereafter. Such techniques result in a thick isolation layer that is formed more quickly and with lower outgassing risk than conventional spin-coating or deposition techniques.
    Type: Application
    Filed: May 19, 2017
    Publication date: November 22, 2018
    Applicant: Analog Devices Global
    Inventor: Alan John Blennerhassett
  • Publication number: 20180335509
    Abstract: Embodiments of the present disclosure provide an optical range finder that includes a transimpedance amplifier (TIA) and a photodiode emulation circuitry for testing the TIA. The photodiode emulation circuitry may be coupled to an input port of the TIA and configured to receive one or more parameters specifying one or more characteristics of a test current signal to be provided to the TIA. The photodiode emulation circuitry may further be configured to provide the test current signal in accordance with the one or more parameters to the input port of the TIA while the photodiode is also coupled to the input port of the TIA.
    Type: Application
    Filed: March 23, 2018
    Publication date: November 22, 2018
    Applicant: Analog Devices Global
    Inventors: Devrim AKSIN, Yalcin Alper EKEN
  • Patent number: 10135472
    Abstract: Apparatus and methods for compensating radio frequency (RF) transmitters for local oscillator (LO) leakage are provided herein. In certain configurations herein, a transmitter generates an RF transmit signal based on mixing an input signal with an LO signal. Additionally, the transmitter is calibrated to compensate for LO leakage, which provides a number of benefits, including lower levels of undesired emissions from the transmitter.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: November 20, 2018
    Assignee: Analog Devices Global
    Inventor: Ahmed Mohammad Ashry Othman
  • Patent number: 10132846
    Abstract: Current transducers are widely used in current measuring systems. They provide good isolation between the supply voltage and the measurement equipment. However they can introduce small phase errors which can become significant sources of error if the current to a load is out of phase with the supply voltage for the load. This disclosure discusses a robust measurement apparatus and method that can be used in situ to monitor for and correct phase errors.
    Type: Grant
    Filed: June 14, 2016
    Date of Patent: November 20, 2018
    Assignee: Analog Devices Global
    Inventors: Jonathan Ephraim David Hurwitz, Seyed Amir Ali Danesh, William Michael James Holland, Shaoli Ye
  • Patent number: 10128859
    Abstract: Techniques are described to cancel kT/C sampling noise and residue amplifier sampling noise while also reducing power consumption in a pipelined analog-to-digital converter circuit.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: November 13, 2018
    Assignee: Analog Devices Global Unlimited Company
    Inventors: Sanjay Rajasekhar, Roberto Sergio Matteo Maurino
  • Patent number: 10129011
    Abstract: An apparatus comprising: a signal detection circuit determine a count reached by a counter between successive detected edge signals and to provide an indication of whether successive detected edge signals are separated from each other by at least a prescribed time interval; a clock circuit that produces clock signal pulses in response to a provided indication of an occurrence of a succession of detected edge signals each separated from a previous edge signal of the succession by at least the prescribed time interval; phase matching circuitry configured to align the produced clock signal pulses with detected edge signals; and a pattern matching circuit that that samples a sequence of detected edge signals aligned with the produced clock signal pulses to detect a data packet.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: November 13, 2018
    Assignee: Analog Devices Global
    Inventors: Muhammad Kalimuddin Khan, Kenneth J. Mulvaney, Philip P. E. Quinlan, Shane O'Mahony
  • Patent number: 10122376
    Abstract: Systems and methods to reduce the amount of reference current drawn by a SAR ADC by including an auxiliary or precharge reference source. The ADC can connect the bit trial capacitors of a main digital-to-analog converter (DAC) to an auxiliary or precharge reference source during the loading of the bit trials, and then the ADC can switch to a main reference buffer. After allowing enough time for both phases, the main DAC can proceed with the bit trials to resolve the remaining bits. The rest of the bit trials can be performed directly using the main reference buffer.
    Type: Grant
    Filed: September 21, 2017
    Date of Patent: November 6, 2018
    Assignee: Analog Devices Global
    Inventors: Anoop Manissery Kalathil, Arvind Madan, Sandeep Monangi
  • Patent number: 10116268
    Abstract: The amplifier circuit includes a pair of differential input stages coupled to an output stage where both a selected input stage and an unselected input stage are active with one of either a differential input signal or a reference voltage. A switching network couples a first input differential signal to a first differential input stage and a reference voltage to a second differential input stage when an amplifier input signal is less than a threshold voltage. The switching circuit also couples the second input differential signal to the second differential input stage and the reference voltage to the first differential input stage when the amplifier input signal is greater than the threshold signal.
    Type: Grant
    Filed: January 9, 2017
    Date of Patent: October 30, 2018
    Assignee: Analog Devices Global
    Inventors: Sharad Vijaykumar, Gerard Mora-Puchalt
  • Patent number: 10116368
    Abstract: A communication unit comprises a plurality of antenna element feeds (203, 205) for coupling to a plurality of antenna elements of an antenna array, where each antenna element feed comprises at least one coupler; and a plurality of transmitters operably coupled to the plurality of antenna element feeds. At least one transmitter of the plurality of transmitters comprises: an input for receiving a first signal and at least one second signal; beamformer logic arranged to apply independent beamform weights (RefBF1, RefBF2) on the first signal and the at least one second signal of the transmitter respectively, wherein each of the independent beamform weights is allocated on a per sector basis; and a signal combiner arranged to combine the first signal and the second signal to produce a combined signal, such as that the combined signal supports a plurality of sectored beams.
    Type: Grant
    Filed: August 15, 2014
    Date of Patent: October 30, 2018
    Assignee: Analog Devices Global
    Inventors: Conor O'Keeffe, Michael O'Brien, Sean Sexton
  • Publication number: 20180306908
    Abstract: Embodiments of the present disclosure propose analog-to-digital conversion (ADC) systems particularly suitable for Light Detection and Ranging (LIDAR) implementations. An exemplary proposed ADC system is configured to determine whether an absolute value of an analog value is greater than a threshold, and, upon positive determination, assign a predetermined digital value as a digital value corresponding to the analog value, without proceeding with the analog-to-digital conversion of the analog value. Because the ADC system only proceeds with the analog-to-digital conversion, using an ADC, when the input analog value is smaller than the threshold, and otherwise the input analog value is simply assigned some predefined digital value, design complexity and power consumption of the system may be significantly reduced, compared to conventional ADCs used in LIDAR applications.
    Type: Application
    Filed: November 17, 2016
    Publication date: October 25, 2018
    Applicant: Analog Devices Global
    Inventors: Libo Meng, Jun Mo, Yu Liu, Wei Wang, Ke Yun
  • Patent number: 10110206
    Abstract: According to a first aspect of this disclosure there is provided a voltage controlled current path. The voltage controlled current path comprises a first stage arranged to conduct current once the voltage at an input node of the first stage exceeds a threshold value. The amount of current that passes through the first stage is a function of the voltage at the input node. A second stage is arranged to pass a current that is a function of the current passing through the first stage.
    Type: Grant
    Filed: May 15, 2015
    Date of Patent: October 23, 2018
    Assignee: Analog Devices Global
    Inventors: Derek J. Hummerston, Christopher Peter Hurrell