Patents Assigned to Analog Devices, Inc.
  • Patent number: 10298252
    Abstract: An analog front end system can include a filter bypass switch connected in a boot-strapped configuration to pull a control terminal of the filter bypass switch above or below a supply voltage. Using bootstrapped switches can allow both the charge injection and capacitive coupling of the bypass switches of a differential anti-alias filter (AAF) to be common mode. A differential input signal of the ADC is not affected by the charge injection and capacitive coupling of the bypass switches in the AAF filter to a first order.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: May 21, 2019
    Assignee: Analog Devices, Inc.
    Inventors: Yogesh Jayaraman Sharma, Arthur J. Kalb
  • Patent number: 10291248
    Abstract: A time-interleaved digital-to-analog converter (DAC) uses M DAC cores to convert a digital input signal whose digital input words are spread to different DAC cores to produce a final analog outputs. The M DAC cores, operating in a time-interleaved fashion, can increase the sampling rate several times compared to the sampling rate of just one DAC. However, sequential time-interleaving DAC cores often exhibit undesirable spurs at the output. To spread those spurs to the noise floor, the time-interleaving DAC cores can be selected at a pseudo randomized manner or in a specific manner which can break up the sequential or periodic manner of selecting the DAC cores.
    Type: Grant
    Filed: April 11, 2018
    Date of Patent: May 14, 2019
    Assignee: ANALOG DEVICES, INC.
    Inventors: Gil Engel, Shawn S. Kuo, Steven C. Rose
  • Patent number: 10285651
    Abstract: Activity monitors and smart watches utilizing optical measurements are becoming widely popular, and users expect to get an increasingly accurate estimate of their heart rate (HR) from these devices. These devices are equipped with a light source and an optical sensor which enable estimation of HR using a technique called photoplethysmography (PPG). One of the main challenges of HR estimation using PPG is the coupling of motion into the optical PPG signal when the user is moving randomly or exercising. The present disclosure describes a computationally feasible and fast HR estimation algorithm to be executed at instances of little or no motion. Resulting HR readings may be useful on their own, or be provided to systems that monitor HR continuously to prevent the problem of such systems being locked on an incorrect HR for long periods of time. Implementing techniques described herein leads to more accurate HR measurements.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: May 14, 2019
    Assignee: ANALOG DEVICES, INC.
    Inventors: Sefa Demirtas, Jason D. King, Robert Adams, Tony Joseph Akl, Jeffrey G. Bernstein
  • Patent number: 10287161
    Abstract: An integrated device package is disclosed. The package can include a carrier, such as first integrated device die, and a second integrated device die stacked on the first integrated device die. The package can include a buffer layer which coats at least a portion of an exterior surface of the first integrated device die and which is disposed between the second integrated device die and the first integrated device die. The buffer layer can comprise a pattern to reduce transmission of stresses between the first integrated device die and the second integrated device die.
    Type: Grant
    Filed: April 6, 2016
    Date of Patent: May 14, 2019
    Assignee: ANALOG DEVICES, INC.
    Inventors: Xiaojie Xue, Michael J. Zylinski, Thomas M. Goida, Kathleen O. O'Donnell
  • Patent number: 10291207
    Abstract: A programmable resistor can provide discrete logarithmic (linear-in-dB) gain control. It can include multiple like programmable resistor subnetworks or cells, such as can be connected in parallel, such as according to a decoding scheme. The subnetworks can be configured to cover a subrange such as [0 dB, ?6 dB) relative to the maximum resistance value. Coarse increments of ?6 dB can be further added to this range by successively doubling the number of subnetworks that are connected in parallel. An additional decoder help ensure a linear control curve, free of dead zones or other nonlinearities. The programmable resistor can be suitable for use in such circuits as programmable-gain amplifiers, filters, or more complex networks, such as where the resistance can be programmed as a function of a digital code. An example including a tuning circuit for a variable gain active filter is described.
    Type: Grant
    Filed: July 7, 2016
    Date of Patent: May 14, 2019
    Assignee: Analog Devices, Inc.
    Inventors: Alexandru Aurelian Ciubotaru, Robert C. Glenn
  • Patent number: 10291249
    Abstract: An analog-to-digital converter (ADC) circuit comprises a first digital-to-analog (DAC) circuit and a second DAC circuit, wherein the first and second DAC circuits include weighted bit capacitors and reservoir capacitors; a sampling circuit configured to sample a differential input voltage onto the weighted bit capacitors and to sample a reference voltage onto the reservoir capacitors; a comparator circuit operatively coupled to outputs of the first and DAC circuits; and logic circuitry configured to: initiate successive bit trials of weighted bit capacitors to convert the input voltage to a digital value by comparing an output of the first DAC circuit and an output of second DAC circuit using the comparator circuit; and apply charge of the reservoir capacitors to the bit capacitors to reduce the comparator differential input voltage and reduce an error between the input common mode offset and the comparator common mode offset.
    Type: Grant
    Filed: July 18, 2016
    Date of Patent: May 14, 2019
    Assignee: Analog Devices, Inc.
    Inventor: Michael C. W. Coln
  • Publication number: 20190138753
    Abstract: As a PUF device ages, the response characteristics of the device change. Thus, mappings made on the original PUF outputs can drift and become invalid. Re-enrollment or re-mapping of hidden values to PUF response characteristics can resolve the changing nature of the PUF. Unfortunately, an adversary may tamper with the PUF during re-enrollment compromising security of the PUF. Accordingly, techniques of securely and remotely re-enrolling a PUF device are described. During an initial enrollment of the PUF device, multiple sets of enrollment values of the PUF device can be generated. For remote re-enrollment, a first initial set of enrollment values can be used to authenticate the PUF device. Upon authentication using the first initial set, the PUF device can re-enroll the PUF device and account for changes in PUF characteristics. A second set of initial enrollment values can then be used to verify that the PUF device is unaltered.
    Type: Application
    Filed: November 8, 2017
    Publication date: May 9, 2019
    Applicant: Analog Devices, Inc.
    Inventor: John Ross Wallrabenstein
  • Patent number: 10284213
    Abstract: Some or all of a comparator circuit of an analog-to-digital converter (ADC) circuit can be efficiently repurposed or reused for residue amplification for efficient noise-shaping, e.g., in a noise-shaping feedback configuration. A preamplifier portion of a comparator circuit in an oversampling ADC can be re-purposed to provide an amplifier to amplify or otherwise modify a residue left after the bit trials of a conversion cycle. The amplified or modified residue can then be used elsewhere, for example, for noise-shaping by applying a noise transfer function (NTF), a result of which can then be fed back (e.g., summed with the next sampled input at an input of the comparator circuit for use in the N bit trials of the next ADC cycle).
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: May 7, 2019
    Assignee: Analog Devices, Inc.
    Inventors: Abhishek Bandyopadhyay, Rong Jin
  • Patent number: 10284194
    Abstract: A differential pair gain stage is disclosed. In one embodiment, the gain stage includes a differential pair of depletion-mode transistors, including a first and a second n-type transistor. In certain embodiments of the invention, the depletion mode transistor may be GaN (gallium nitride) field effect transistors. The gain stage includes an active load including one or more depletion mode transistors electrically coupled to at least one of the drains of depletion mode transistors of the differential pair. The active load may include a source follower for maintaining the AC voltages at the drains of the differential pair at a constant value and may further include a casocde stage for setting a fixed drain source voltage across the output transistors to increase the output impedance and gain of the stage.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: May 7, 2019
    Assignee: Analog Devices, Inc.
    Inventors: Yogesh Jayaraman Sharma, James Fiorenza
  • Patent number: 10283970
    Abstract: In an example, a circuit for controlling at least two electronic switches in a parallel configuration between a power supply and a load. The circuit includes a control circuit to generate first and second control signals to control first and second electronic switches of the at least two electronic switches, and establish a conduction sequence of the first and second electronic switches using the first and second control signals. The circuit includes a detection circuit configured to detect a current flowing through a control terminal of the first electronic switch during a transition portion, wherein the circuit is configured to adjust the first control signal and establish the second portion of the conduction sequence in response to the detected current.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: May 7, 2019
    Assignee: Analog Devices, Inc.
    Inventors: Lawrence H. Edelson, Michael Daly, Marcus O'Sullivan
  • Patent number: 10284221
    Abstract: A multibit flash quantizer circuit, such as included as a portion of delta-sigma conversion circuit, can be operated in a dynamic or configurable manner. Information indicative of at least one of an ADC input slew rate or a prior quantizer output code can be used to establish a flash quantizer conversion window. Within the selected conversion window, comparators in the quantizer circuit can be made active. Comparators outside the conversion window can be made dormant, such as depowered or biased to save power. An output from such dormant converters can be preloaded and latched. In this manner, full resolution is available without requiring that all comparator circuits within the quantizer remain active at all times.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: May 7, 2019
    Assignee: Analog Devices, Inc.
    Inventors: Abhishek Bandyopadhyay, Daniel Peter Canniff, Mariana Tosheva Markova, Edward Chapin Guthrie
  • Publication number: 20190131990
    Abstract: Improved track and hold (T/H) circuits can help analog-to-digital converters (ADCs) achieve higher performance and lower power consumption. The improved T/H circuits can drive high speed and interleaved ADCs, and the design of the circuits enable additive and multiplicative pseudo-random dither signals to be injected in the T/H circuits. The dither signals can be used to calibrate (e.g., linearize) the T/H circuits and the ADC(s). In addition, the dither signal can be used to dither any remaining non-linearity, and to calibrate offset/gain mismatches in interleaved ADCs. The T/H circuit design also can integrate an amplifier in the T/H circuit, which can be used to improve the signal-to-noise ratio (SNR) of the ADC or to act as a variable gain amplifier (VGA) in front of the ADC.
    Type: Application
    Filed: August 31, 2018
    Publication date: May 2, 2019
    Applicant: Analog Devices, Inc.
    Inventor: Ahmed Mohamed Abdelatty Ali
  • Publication number: 20190131992
    Abstract: Multi-step ADCs performs multi-step conversion by generating a residue for a subsequent stage to digitize. To generate a residue, a stage in the multi-step ADC would reconstruct the input signal to the stage using a feedforward digital to analog converter (DAC). Non-linearities in the DAC can directly affect the overall performance of the multi-step ADC. To reduce power consumption and complexity of analog circuit design, digital background calibration schemes are implemented to address the non-linearities. The non-linearities that the calibration schemes address can include reference, DAC, and quantization non-linearities.
    Type: Application
    Filed: September 21, 2018
    Publication date: May 2, 2019
    Applicant: Analog Devices, Inc.
    Inventors: Ahmed Mohamed Abdelatty Ali, Paridhi GULATI
  • Patent number: 10277278
    Abstract: An embodiment of a communication system for transmitting and receiving data across an isolation barrier may include a communication circuit connected to an isolator at a first side of the isolation barrier, the communication circuit having a transmit circuit to drive a first data signal onto the isolator based on input data received by the communication circuit, a receive circuit to receive a second data signal from the isolator and produce output data based on the received second data signal, and a control circuit to control the transmit and receive circuits to provide time division multiplexing of the first and second data signals.
    Type: Grant
    Filed: June 9, 2015
    Date of Patent: April 30, 2019
    Assignee: Analog Devices, Inc.
    Inventors: Bikiran Goswami, Baoxing Chen
  • Patent number: 10277233
    Abstract: Apparatus and methods for frequency tuning of rotary traveling wave oscillators (RTWOs) are provided herein. In certain configurations, distributed quantized tuning is used to tune a frequency of the RTWO. The RTWO includes a plurality of segments distributed around the RTWO's ring, and the segments include tuning capacitors and other circuitry. The distributed quantized frequency tuning is used to control the tuning capacitors in the RTWO's segments using separately controllable code values, thereby enhancing the RTWO's frequency step size or resolution. Moreover, in configurations including multiple RTWO rings that are locked to one another to reduce phase noise, the distributed quantized frequency tuning can be used to separately set the tuning capacitors across multiple RTWO rings that are coupled to one another.
    Type: Grant
    Filed: October 7, 2016
    Date of Patent: April 30, 2019
    Assignee: Analog Devices, Inc.
    Inventor: Hyman Shanan
  • Publication number: 20190123760
    Abstract: A successive-approximation-register analog-to-digital converter (SAR ADC) typically includes circuitry for implementing bit trials that converts an analog input to a digital output bit by bit. The circuitry for bit trials are usually weighted (e.g., binary weighted), and these bit weights are not always ideal. Calibration algorithms can calibrate or correct for non-ideal bit weights and usually prefer these bit weights to be signal-independent so that the bit weights can be measured and calibrated/corrected easily. Embodiments disclosed herein relate to a unique circuit design of an SAR ADC, where each bit capacitor or pair of bit capacitors (in a differential design) has a corresponding dedicated on-chip reference capacitor. The speed of the resulting ADC is fast due to the on-chip reference capacitors (offering fast reference settling times), while errors associated with non-ideal bit weights of the SAR ADC are signal-independent (can be easily measured and corrected/calibrated).
    Type: Application
    Filed: December 20, 2018
    Publication date: April 25, 2019
    Applicant: Analog Devices, Inc.
    Inventors: Junhua SHEN, Mark D. Maddox, Ronald Alan KAPUSTA
  • Patent number: 10270630
    Abstract: A receiver system for an on-off key (“OOK”) isolator system may include a receiver that generates an intermediate current signal based on an OOK input signal. The intermediate current may be provided at a first current level when the input signal has a first OOK state and a second current level when the input signal has a second OOK state. The system also may include an output driver to generate a voltage representation of the intermediate current signal. Performing signal processing in a current domain permits fast transitions between OOK states.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: April 23, 2019
    Assignee: Analog Devices, Inc.
    Inventors: Ruida Yun, Eric C. Gaalaas, Baoxing Chen
  • Patent number: 10269343
    Abstract: The present disclosure relates generally to improving audio processing using an intelligent microphone and, more particularly, to techniques for processing audio received at a microphone with integrated analog-to-digital conversion, digital signal processing, acoustic source separation, and for further processing by a speech recognition system. Embodiments of the present disclosure include intelligent microphone systems designed to collect and process high-quality audio input efficiently. Systems and method for audio processing using an intelligent microphone include an integrated package with one or more microphones, analog-to-digital converters (ADCs), digital signal processors (DSPs), source separation modules, memory, and automatic speech recognition. Systems and methods are also provided for audio processing using an intelligent microphone that includes a microphone array and uses a preprogrammed audio beamformer calibrated to the included microphone array.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: April 23, 2019
    Assignee: Analog Devices, Inc.
    Inventor: David Wingate
  • Publication number: 20190113606
    Abstract: Time of Flight (ToF) depth image processing methods. Depth edge preserving filters are disclosed with superior performance to standard edge preserving filters applied to depth maps. In particular, depth variance is estimated and used to filter while preserving depth edges. In doing so, filter strength is calculated which can be used as an edge detector. A confidence map is generated with low confidence at pixels straddling a depth edge, and which reflects the reliability of the depth measurement at each pixel.
    Type: Application
    Filed: October 15, 2018
    Publication date: April 18, 2019
    Applicant: Analog Devices, Inc.
    Inventors: Charles Mathy, Nicolas Le Dortz, Richard Haltmaier
  • Patent number: 10261105
    Abstract: A microelectromechanical system (MEMS) accelerometer is described. The MEMS accelerometer is arranged to limit distortions in the detection signal caused by displacement of the anchor(s) connecting the MEMS accelerometer to the underlying substrate. The MEMS accelerometer may include masses arranged to move in opposite directions in response to an acceleration of the MEMS accelerometer, and to move in the same direction in response to displacement of the anchor(s). The masses may, for example, be hingedly coupled to a beam in a teeter-totter configuration. Motion of the masses in response to acceleration and anchor displacement may be detected using capacitive sensors.
    Type: Grant
    Filed: February 7, 2018
    Date of Patent: April 16, 2019
    Assignee: Analog Devices, Inc.
    Inventor: William A. Clark