Patents Assigned to Analog Devices, Inc.
  • Patent number: 11712516
    Abstract: A substance delivery device is disclosed. The substance delivery device includes a lever that includes a drive arm that is rotatable about a pivot. The substance delivery device also includes a pump that has a deformable chamber. The deformable chamber is configured to rotate the drive arm about the pivot towards a container so as to deform the container to drive a fluid substance from the container.
    Type: Grant
    Filed: April 17, 2020
    Date of Patent: August 1, 2023
    Assignee: Analog Devices, Inc.
    Inventors: David Frank Bolognia, Brian Hall
  • Patent number: 11714102
    Abstract: Disclosed herein are aspects of a multiple-mass, multi-axis microelectromechanical systems (MEMS) accelerometer sensor device with a fully differential sensing design that applies differential drive signals to movable proof masses and senses differential motion signals at sense fingers coupled to a substrate. In some embodiments, capacitance signals from different sense fingers are combined together at a sensing signal node disposed on the substrate supporting the proof masses. In some embodiments, a split shield may be provided, with a first shield underneath a proof mass coupled to the same drive signal applied to the proof mass and a second shield electrically isolated from the first shield provided underneath the sense fingers and biased with a constant voltage to provide shielding for the sense fingers.
    Type: Grant
    Filed: June 8, 2021
    Date of Patent: August 1, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Jianglong Zhang, Xin Zhang
  • Publication number: 20230234835
    Abstract: Packaging of microfabricated devices, such as integrated circuits, microelectromechanical systems (MEMS), or sensor devices is described. The packaging is 3D heterogeneous packaging in at least some embodiments. The 3D heterogeneous packaging includes an interposer. The interposer includes stress relief platforms. Thus, stresses originating in the packaging do not propagate to the packaged device. A stress isolation platform is an example of a stress relief feature. A stress isolation platform includes a portion of an interposer coupled to the remainder of the interposer via stress isolation suspensions. Stress isolation suspensions can be formed by etching trenches through the interposer.
    Type: Application
    Filed: January 24, 2023
    Publication date: July 27, 2023
    Applicant: Analog Devices, Inc.
    Inventors: Xin Zhang, Jianglong Zhang, Li Chen, John C. Cowles, Michael Judy, Shafi Saiyed
  • Patent number: 11709235
    Abstract: Techniques to adjust a gain of an analog-to-digital converter circuit (ADC) and/or an ADC full scale from one sample to the next of an analog input signal to compensate for the signal loss over distance, which can increase an effective dynamic range of the system. The benefit of compensating for the signal loss due to distance is that a data interface between the ADC of the receiver of the LIDAR system and a signal processor no longer needs to support the dynamic range from the range specification.
    Type: Grant
    Filed: August 10, 2020
    Date of Patent: July 25, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Shawn S. Kuo, Lijun Gao
  • Patent number: 11711200
    Abstract: Apparatus and methods for multiphase clock generation are provided herein. In certain embodiments, a multiphase clock generator includes a first clock buffer that generates a first output clock signal based on a first input clock signal, a second clock buffer that generates a second output clock signal based on a second input clock signal, and a first clock interpolation circuit that generates a third output clock signal based on interpolating the first input clock signal and the second input clock signal. The first clock interpolation circuit generates the third output clock signal based on multiplying the first input clock signal by a first adjustable current to generate a first multiplied current, multiplying the second input clock signal by a second adjustable current to generate a second multiplied current, combining the first multiplied current and the second multiplied current to generate a combined current, and integrating the combined current.
    Type: Grant
    Filed: December 16, 2021
    Date of Patent: July 25, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Michael St. Germain, John Kenney
  • Patent number: 11711073
    Abstract: A signal conditioning circuit to reduce detrimental effects of analog circuit elements. The techniques described herein provide a cascade of buffer circuits and signal processing circuitry to measure and cancel the distortion introduced by the buffer circuits. Thus, a buffer can be added to the signal path of an input signal without the detrimental effects, such as added distortion, that typically accompany the addition of buffers.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: July 25, 2023
    Assignee: Analog Devices, Inc.
    Inventor: Andrew Joseph Thomas
  • Publication number: 20230228888
    Abstract: One embodiment is a method for counting charge events detected by a pixel in a photon-counting computed tomography (PCCT) scanning system comprising a plurality of discriminators, wherein each discriminator is associated with a respective one of a plurality of threshold voltage levels. The method includes detecting a signal output from one of the discriminators; incrementing a quantitative count corresponding to the threshold voltage level associated with the one of the discriminators if the detected discriminator output signal meets a first condition; and incrementing a qualitative count if the detected discriminator output signal meets at least one second condition.
    Type: Application
    Filed: December 13, 2022
    Publication date: July 20, 2023
    Applicant: Analog Devices, Inc.
    Inventors: Patrick S. RIEHL, Sunrita PODDAR
  • Patent number: 11702335
    Abstract: An integrated device package is disclosed. The integrated device package can include a package housing that defines a cavity. The integrated device package can include an integrated device die that is disposed in the cavity. The integrated device die has a first surface includes a sensitive component. A second surface is free from a die attach material. The second surface is opposite the first surface. The integrated device die include a die cap that is bonded to the first surface. The integrated device package can also include a supporting structure that attaches the die cap to the package housing.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: July 18, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Yeonsung Kim, Shafi Saiyed, Thomas M. Goida
  • Patent number: 11705914
    Abstract: Apparatus and methods for clock synchronization and frequency translation are provided herein. Clock synchronization and frequency translation integrated circuits (ICs) generate one or more output clock signals having a controlled timing relationship with respect to one or more reference signals. The teachings herein provide a number of improvements to clock synchronization and frequency translation ICs, including, but not limited to, reduction of system clock error, reduced variation in clock propagation delay, lower latency monitoring of reference signals, precision timing distribution and recovery, extrapolation of timing events for enhanced phase-locked loop (PLL) update rate, fast PLL locking, improved reference signal phase shift detection, enhanced phase offset detection between reference signals, and/or alignment to phase information lost in decimation.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: July 18, 2023
    Assignee: Analog Devices, Inc.
    Inventor: Reuben P. Nelson
  • Publication number: 20230224639
    Abstract: Systems, devices, and methods related to audio systems for providing personalized audio zones are provided. An example audio system includes a first speaker to transmit an ultrasonic signal modulated by a first portion of a first audio signal. The audio system further includes a second speaker to transmit a second portion of the first audio signal, where the second portion is in a lower frequency band than the first portion. The audio system further includes a noise canceller to at least attenuate a second audio signal, where the second audio signal is in a lower frequency band than the first portion of the first audio signal.
    Type: Application
    Filed: December 19, 2022
    Publication date: July 13, 2023
    Applicant: Analog Devices, Inc.
    Inventors: Boris LERNER, Gina G. AQUILANO
  • Patent number: 11697882
    Abstract: Various examples are directed to a solar power electrolyzer system comprising a first electrolyzer stack, a second electrolyzer stack, a first converter and a first converter controller. The first electrolyzer stack may be electrically coupled in series with a photovoltaic array. The first converter may be electrically coupled in series with the first electrolyzer stack and electrically coupled in series with the photovoltaic array. The second electrolyzer stack electrically may be coupled at an output of the first converter. The first converter controller may be configured to control a current gain of the first converter.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: July 11, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Brian Harrington, Leonard Shtargot, Antonio Montalvo
  • Patent number: 11698257
    Abstract: According to some aspects, there is provided a microelectromechanical systems (MEMS) device wherein one or more components of the MEMS device exhibit attenuated motion relative to one or more other moving components. The MEMS device may comprise a substrate; a proof mass coupled to the substrate and configured to move along a resonator axis; and a first shuttle coupled to the proof mass and comprising one of a drive structure configured to drive the proof mass along the resonator axis or a sense structure configured to move along a second axis substantially perpendicular to the resonator axis in response to motion of the proof mass along the resonator axis, wherein displacement of at least a first portion of the proof mass is attenuated relative to displacement of the first shuttle and/or a second portion of the proof mass.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: July 11, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Igor P. Prikhodko, John A. Geen
  • Patent number: 11695093
    Abstract: A device emitting mid-infrared light that comprises a semiconductor substrate of GaSb or closely related material. The device can also comprise epitaxial heterostructures of InAs, GaAs, AlSb, and related alloys forming light emitting structures cascaded by tunnel junctions. Further, the device can comprise light emission from the front, epitaxial side of the substrate.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: July 4, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Shrenik Deliwala, Ryan Michael Iutzi
  • Patent number: 11692825
    Abstract: A MEMS device is provided comprising a mass configured to move along a first axis and a second axis substantially perpendicular to the first axis; a drive structure coupled to the mass and configured to cause the mass to move along the first axis; a sense structure coupled to the mass and configured to detect motion of the mass along the second axis; a stress relief structure coupled to one of the drive structure or the sense structure; and at least one anchor coupled to an underlying substrate of the MEMS device, wherein the stress relief structure is coupled to the at least one anchor and the at least one anchor is disposed outside of the stress relief structure.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: July 4, 2023
    Assignee: Analog Devices, Inc.
    Inventor: Gaurav Vohra
  • Publication number: 20230207710
    Abstract: Techniques, methods, and systems are provided for packaging high-voltage packages. On example system package includes circuitries comprising circuit elements; and a plurality of connection pins including low-voltage pins; input/output (IO) pins arranged in regions proximate edges of the system package; and high-voltage pins arranged in an inner region of the system package away from all edges of the system package.
    Type: Application
    Filed: December 13, 2022
    Publication date: June 29, 2023
    Applicant: Analog Devices, Inc.
    Inventors: Noe QUINTERO, Brian Hamilton
  • Patent number: 11686581
    Abstract: A MEMS device is provided comprising a substrate; a proof mass coupled to the substrate and configured to move along a resonator axis; a drive structure comprising at least one electrode and configured to drive the proof mass to move along the resonator axis; and a pivoting linkage coupled to the proof mass at first and second ends of the pivoting linkage, the first end comprising a first fixed pivot and the second end comprising a second fixed pivot, the pivoting linkage comprising: a first bar configured to pivot about the first fixed pivot and a first dynamic pivot; a second bar configured to pivot about the second fixed pivot and a second dynamic pivot; and a third bar configured to pivot about the first dynamic pivot and the second dynamic pivot, wherein the proof mass moves along the resonator axis when the pivoting linkage pivots.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: June 27, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Igor P. Prikhodko, Gaurav Vohra
  • Patent number: 11689097
    Abstract: A UHV-LV interface circuit that is capable of the following, among other things: 1) starting up a primary controller of a power converter circuit with a precisely controlled startup charging profile; 2) performing pulse-based line-voltage sensing with reduced power and improved sensing accuracy; and 3) discharging a capacitor, e.g., class-X2 capacitor, with a stable supply voltage for the controller. The UHV-LV interface circuit can use a single UHV device, such as a single depletion-mode transistor, e.g., field-effect transistor (FET).
    Type: Grant
    Filed: May 5, 2021
    Date of Patent: June 27, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Wen Chuen Liu, Xugang Ke, Min Chen, Wei Gu
  • Patent number: 11686699
    Abstract: The battery monitoring techniques described herein may be used for detection of battery anomalies or faults. Also, the battery monitoring techniques described herein may be used to generate estimates of total battery capacity. The battery monitoring techniques may employ an alternating current frequency response (ACFR) of the battery. The ACFR response of the battery may be used to detect anomalies and/or estimate a total capacity of the battery.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: June 27, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Hemtej Gullapalli, Omer Tanovic, Johannes Traa, Erfan Soltanmohammadi
  • Patent number: 11688709
    Abstract: An integrated device package is disclosed. The package can include a package substrate and an integrated device die having active electronic circuitry. The integrated device die can have a first side and a second side opposite the first side. The first side can have bond pads electrically connected to the package substrate by way of bonding wires. A redistribution layer (RDL) stack can be disposed on a the first side of the integrated device die. The RDL stack can comprise an insulating layer and a conductive redistribution layer. The package can include a passive electronic device assembly mounted and electrically connected to the RDL stack.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: June 27, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Vikram Venkatadri, Santosh Anil Kudtarkar
  • Patent number: 11686773
    Abstract: A test system can receive a test signal from a device under test (DUI) via a first signal path. A comparator circuit can receive the test signal and, in response, generate an intermediate output signal based on a magnitude relationship between the test signal a comparator reference signal. A compensation circuit can generate a correction signal that is complementary to a portion of the received test signal, such as to correct for loading effects of the first signal path. The test system can include an output circuit configured to provide a corrected differential output signal that is based on a combination of the intermediate output signal and the correction signal.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: June 27, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Christopher C. McQuilkin, Andrew Nathan Mort