Patents Assigned to Analog Devices, Inc.
  • Patent number: 5541620
    Abstract: A cursor control system where the starting x-axis pixel position of the cursor pattern is determined by decoding the last two bits of the preloaded x-axis address (as determined by a manual control manipulated by the operator). This decoded data produces a signal for controlling the transmission gate multiplexer so as to determine the position where the cursor data stream is inserted into the video data stream.
    Type: Grant
    Filed: March 30, 1995
    Date of Patent: July 30, 1996
    Assignee: Analog Devices, Inc.
    Inventor: David C. Reynolds
  • Patent number: 5541532
    Abstract: An all MOS single-ended to differential level converter including: first and second source follower circuits each including first and second PMOS semiconductors each having a drain, a source and a gate electrode; a current source commonly connected to the drain electrodes of the first and second PMOS semiconductors; an input circuit for providing to one of the gate electrodes a single-ended input signal and to the other an inverted single-ended input signal; and first and second load impedances connected to the source electrodes of the first and second PMOS semiconductors, respectively, for providing output analog differential signals at a level which is a function of the load impedances and current source magnitude.
    Type: Grant
    Filed: August 17, 1995
    Date of Patent: July 30, 1996
    Assignee: Analog Devices, Inc.
    Inventor: Kevin J. McCall
  • Patent number: 5540095
    Abstract: An accelerometer comprising a microfabricated acceleration sensor and monolithically fabricated signal conditioning circuitry. The sensor comprises a differential capacitor arrangement formed by a pair of capacitors. Each capacitor has two electrodes, one of which it shares electrically in common with the other capacitor. One of the electrodes (e.g., the common electrode) is movable and one of the electrodes is stationary in response to applied acceleration. The electrodes are all formed of polysilicon members suspended above a silicon substrate. Each of the capacitors is formed of a plurality of pairs of electrode segments electrically connected in parallel and, in the case of the movable electrodes, mechanically connected to move in unison. When the substrate is accelerated, the movable electrodes move such that the capacitance of one of the capacitors increases, while that of the other capacitor decreases.
    Type: Grant
    Filed: April 14, 1995
    Date of Patent: July 30, 1996
    Assignee: Analog Devices, Inc.
    Inventors: Steven J. Sherman, A. Paul Brokaw, Robert W. K. Tsang, Theresa Core
  • Patent number: 5541120
    Abstract: Bipolar transistors and MOS transistors on a single semiconductor substrate involves depositing a single layer of polysilicon on a substrate, including complementary transistors of either or both types, and a method for fabricating same. The devices are made by depositing a single layer of polysilicon on a substrate and etching narrow slots in the form of rings around every bipolar emitter area, which slots are thereafter filler with an insulating oxide. Then, emitters and extrinsic base regions are formed. The emitters are self-aligned to the extrinsic base regions. An optical cladding procedure produces a surface layer of a silicide compound, a low resistance conductor. The resulting structure yields a high-performance device in which the size constraints are at a minimum and contact regions may be made at the top surface of the device.
    Type: Grant
    Filed: November 9, 1994
    Date of Patent: July 30, 1996
    Assignee: Analog Devices, Inc.
    Inventors: Derek W. Robinson, William A. Krieger, Andre M. Martinez, Marion R. McDevitt
  • Patent number: 5541446
    Abstract: A leadframe that exhibits improved thermal dissipation and that can be incorporated into standard integrated circuit (IC) packages is provided by widening the inner lead portions with respect to the outer lead portions and extending them along a major surface of the IC. In the preferred embodiment, the wide inner lead portions cover at least 80 percent of the IC surface and also support the IC, eliminating the need for a leadframe paddle. The wide inner lead portions are more efficient at conducting heat away from the IC than prior "standard" width inner lead portions because of the increased thermal contact area between them and the IC. Heat from the IC is conducted to the outside of the package via the leads and into the circuit board on which the IC package is mounted. Added thermal dissipation is achieved by making the inner portion of a ground lead wider than the inner portion of any other lead.
    Type: Grant
    Filed: September 26, 1995
    Date of Patent: July 30, 1996
    Assignee: Analog Devices, Inc.
    Inventor: Oliver J. Kierse
  • Patent number: 5539338
    Abstract: A circuit for selecting between two states and using the same pin as an input and an output. On power-up, the pin can be connected to either a grounded resistor (to select the first state) or the power supply (to select the second state). The input signal generates a logic select signal. The logic select signal selects between first and second logic formats. If the first format is selected, the pin is used to output a reference voltage for that format. If the second format is selected, the logic select signal also provides a disable signal, that prevents the reference voltage output from appearing on the pin.
    Type: Grant
    Filed: December 1, 1994
    Date of Patent: July 23, 1996
    Assignee: Analog Devices, Inc.
    Inventor: Carl W. Moreland
  • Patent number: 5537027
    Abstract: A calibration system for an asymmetrical ramp generator system for a pulse width modulator wherein a current splitting circuit establishes a slew rate and a calibration level for the first ramp that is the same as the slew rate and the usable voltage range of the second ramp and wherein the first and second sets of ramps are matched so that calibration of the first set results in simultaneous calibration of the second set.
    Type: Grant
    Filed: April 25, 1995
    Date of Patent: July 16, 1996
    Assignee: Analog Devices, Inc.
    Inventor: Edward P. Jordan
  • Patent number: 5537079
    Abstract: An IC amplifier having first and second cascaded stages formed by respective pairs of symmetrical complementary bipolar transistors followed by a unity gain buffer amplifier and provided with overall current feedback. The quiescent collector currents of the second amplifier stage are controlled by respective transconductance generators with respective complementary bipolar transistors connected in parallel relationship to the transistors of the second stage. The collector currents of the transconductance generators are fixed at the levels of respective reference current generators.
    Type: Grant
    Filed: December 5, 1994
    Date of Patent: July 16, 1996
    Assignee: Analog Devices, Inc.
    Inventors: Royal A. Gosser, Jeffrey A. Townsend
  • Patent number: 5534794
    Abstract: A logic output stage that may be part of a circuit that provides the circuit user with the ability to select the type of digital electronic format for the digital signals output from the circuit. The logic output stage may include separate sections for processing signals so that they will have one of a plurality of digital electronic formats. Moreover, in cases where two or more digital electronic formats are very close, a single section may be used to process digital signals to have these formats.
    Type: Grant
    Filed: December 1, 1994
    Date of Patent: July 9, 1996
    Assignee: Analog Devices, Inc.
    Inventor: Carl W. Moreland
  • Patent number: 5532905
    Abstract: A leadframe that exhibits improved thermal dissipation and that can be incorporated into standard integrated circuit (IC) packages is provided by increasing the thermal cross-section between the leadframe paddle and the lead fingers (leads) so that the leads are utilized for conducting a significant amount of heat away from the IC. A larger thermal cross-section can be achieved by making the shape of the paddle perimeter nonlinear to increase the surface area of its edge. In the preferred embodiment, the paddle perimeter has a "serpentine" shape and the inner ends of the leads are placed in close proximity to the paddle perimeter and are shaped to substantially follow its serpentine shape. The shaped paddle and lead ends increase the thermal cross-section between the paddle and the leads, resulting in improved thermal conduction. The leads conduct the heat to the outside of the package, where it is dissipated into the circuit board on which the leadframe package is mounted.
    Type: Grant
    Filed: May 19, 1995
    Date of Patent: July 2, 1996
    Assignee: Analog Devices, Inc.
    Inventor: Thomas D. Moore
  • Patent number: 5530444
    Abstract: Open-loop differential amplifiers (120, 140) are disclosed which have accurate and stable gain. The gain of these amplifiers is substantially insensitive to the effects of small-signal emitter resistance r.sub.e, current gain .beta. and Early voltage V.sub.A. Thus, their gain can be accurately set by resistance ratios which makes them particularly useful in integrated circuits. These advantages are obtained with an output differential pair (67) that has cross-coupled base and collector terminals. In addition, resistors (141, 143, 148, 150) and a current source (146) associated with this differential pair are related to like elements (27, 28, 24, 25 and 26) that are associated with an input differential pair (21) by disclosed numerical ratios, e.g., the nominal gain G of the amplifier. Versions of the amplifiers can be adapted for use as a residue amplifier (162) in a subranging A/D converter (160).
    Type: Grant
    Filed: January 5, 1995
    Date of Patent: June 25, 1996
    Assignee: Analog Devices, Inc.
    Inventors: Thomas E. Tice, David T. Crook, Kevin M. Kattmann, Charles D. Lane
  • Patent number: 5528197
    Abstract: A current mode VCA includes a negative feedback architecture around a gain core stage. An input signal is injected as a differential current into the signal path and is converted to a differential voltage by a transresistance stage having a dynamic impedance. The differential voltage is applied to a transconductance stage which limits the VCA's high frequency gain and stabilizes the feedback loop. The transconductance stage supplies a differential drive current to the gain core stage, which produces two differential output currents that sum to the differential drive current. The fraction of the drive current provided to each output current is controlled by the application of a control signal to the gain core stage. A current-to-voltage converter produces an output voltage in response to the output current.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: June 18, 1996
    Assignee: Analog Devices, Inc.
    Inventor: Douglas R. Frey
  • Patent number: 5528240
    Abstract: A method and apparatus for phase locking to an input signal and outputting a sigma-delta modulated control signal. The method and apparatus of the present invention provide a sigma-delta modulated control signal which can be utilized by any one of a decimator for decimating a digital data at a first data rate to a digital data at a second data rate and an interpolator for interpolating a digital data at a first data rate to a digital data at a second data rate. The decimator and the interpolator can be utilized in any one of an analog-to-digital converter, a digital-to-analog converter and a digital-to-digital converter. In one embodiment, a period of the input signal is determined and fed to a phase-locked loop which includes a sigma-delta modulator for providing the sigma-delta modulated control signal. The phase-locked loop also includes a phase detector for determining a phase and a frequency-difference between the input signal and a conversion signal generated by the phase-locked loop.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: June 18, 1996
    Assignee: Analog Devices, Inc.
    Inventors: James Wilson, Ronald A. Cellini
  • Patent number: 5525986
    Abstract: An intrinsic R2R resistance ladder digital to analog converter (DAC) includes a plurality of matched semiconductor ladder switches, one in each of the R and 2R legs of the R2R ladder. The ON resistance of each semiconductor switch being matched to constitute the resistance ladder of the DAC; the ladder switches being operated in response to the digital signal input to the DAC; a reference circuit including a reference semiconductor switch matched with the ladder switches responsive to a reference current to generate a reference voltage; and a voltage follower circuit for monitoring the reference voltage and adjusting the current through the ladder switches to match the voltage at each ladder switch with the reference voltage for precisely fixing the DAC analog output current as a proportion of the reference current in dependence upon the operation of the ladder switches by the digital input signal.
    Type: Grant
    Filed: October 4, 1994
    Date of Patent: June 11, 1996
    Assignee: Analog Devices, Inc.
    Inventors: Janos Kovacs, Steven R. Robinson, Wyn Palmer
  • Patent number: 5523718
    Abstract: A double-folded cascode operational amplifier capable of operating with rail-to-rail common mode inputs includes two differential input transistor pairs of opposite conductivity, with an associated current source and input resistor pair for each pair of input transistors. Its gain stage includes two interconnected pairs of folded cascode gain transistors that are connected to the two pairs of input resistors so that a change in the differential input signal produces a corresponding change in the gain stage output via the resistors. An output stage includes transistor-resistor circuitry to bias a pair of output transistors in opposite directions and produce a net amplifier output at their junction. The gain transistor voltages are balanced by a voltage shifting circuit to inhibit input voltage offsets.
    Type: Grant
    Filed: May 12, 1995
    Date of Patent: June 4, 1996
    Assignee: Analog Devices, Inc.
    Inventor: James R. Butler
  • Patent number: 5521783
    Abstract: An electrostatic discharge (ESD) protection circuit formed on a semiconductor substrate includes a first stage clamping circuit and a second stage clamping circuit separated by a dissipative circuit. The first and second stage clamping circuits are designed to absorb and dissipate the high and low energy ESD, respectively. The first clamping circuit has a self-regulated current mechanism capable of diverting the electrical current generated by an ESD from a high current density region to a low current density region within the semiconductor substrate, and simultaneously lowers the ESD induced voltage for safe protection.
    Type: Grant
    Filed: September 17, 1993
    Date of Patent: May 28, 1996
    Assignee: Analog Devices, Inc.
    Inventors: Edward L. Wolfe, Andrew H. Olney
  • Patent number: 5521553
    Abstract: A bipolar micro-power rail-to-rail operational amplifier has a low complexity output stage that provides a high ratio of load current to no load idle current. The output stage includes first and second output transistors of opposite conductivities whose current circuits are connected in series at the output terminal between high and low voltage supplies. A control transistor responds to the drive voltage at its base by modulating the base-emitter voltages of the first output transistor and a gain transistor in opposite directions to modulate their respective output and gain currents. A regenerative current source supplies current to the gain transistor by returning the gain current in a regenerative feedback loop to its emitter so that the current source idles at a low gain current but is capable of supplying much higher gain currents.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: May 28, 1996
    Assignee: Analog Devices, Inc.
    Inventor: James R. Butler
  • Patent number: 5521552
    Abstract: A bipolar micro-power rail-to-rail operational amplifier has a low complexity output stage that provides a high ratio of load current to no load idle current. The output stage includes first and second output transistors of opposite conductivities whose current circuits are connected in series at the output terminal between high and low voltage supplies. A control transistor responds to the drive voltage at its base by modulating the base-emitter voltages of the first output transistor and a gain transistor in opposite directions to modulate their respective output and gain currents. A regenerative current source supplies current to the gain transistor by returning the gain current in a regenerative feedback loop to its emitter so that the current source idles at a low gain current but is capable of supplying much higher gain currents.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: May 28, 1996
    Assignee: Analog Devices, Inc.
    Inventor: James R. Butler
  • Patent number: 5519576
    Abstract: A leadframe that exhibits improved thermal dissipation and that can be incorporated into standard integrated circuit (IC) packages is provided by increasing the thermal cross-section between the leadframe paddle and the lead fingers (leads) so that the leads are utilized for conducting a significant amount of heat away from the IC. A larger thermal cross-section can be achieved by making the shape of the paddle perimeter nonlinear to increase the surface area of its edge. In the preferred embodiment, the paddle perimeter has a "serpentine" shape and the inner ends of the leads are placed in close proximity to the paddle perimeter and are shaped to substantially follow its serpentine shape. The shaped paddle and lead ends increase the thermal cross-section between the paddle and the leads, resulting in improved thermal conduction. The leads conduct the heat to the outside of the package, where it is dissipated into the circuit board on which the leadframe package is mounted.
    Type: Grant
    Filed: May 19, 1995
    Date of Patent: May 21, 1996
    Assignee: Analog Devices, Inc.
    Inventor: Thomas D. Moore
  • Patent number: 5519354
    Abstract: An IC temperature sensor with a programmable offset generates an output voltage V.sub.o over a desired temperature range that is a PTAT voltage V.sub.PTAT shifted by an offset voltage V.sub.off. A band gap cell generates a basic PTAT voltage across a first resistor to produce a PTAT current I.sub.PTAT. A second resistor is connected from the first resistor to a reference voltage terminal to provide voltage gain. A third resistor is connected across the base-emitter junction of a transistor which is connected from the top of the second resistor to an output terminal at which V.sub.o is generated. The transistor's base-emitter voltage provides a portion of V.sub.off. The third resistor reduces the portion of I.sub.PTAT that flows through the second resistor to provide the remaining portion of V.sub.off. A current source is positioned between the transistor's emitter and the reference voltage terminal to supply its emitter current and the current for the third resistor. The offset voltage V.sub.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: May 21, 1996
    Assignee: Analog Devices, Inc.
    Inventor: Jonathan M. Audy