Abstract: An optical coupler can be provided for coupling a light beam into a waveguide. The optical coupler can include a stepped structure, such as to reduce difficulties during manufacture, reduce expenses associated with manufacture, and additionally, to provide an increased acceptance angle of the optical coupler. The waveguide can include a guiding region where a cladding thickness can be increased relative to a coupling region, such as to reduce losses due to evanescent outcoupling in the guiding region.

Abstract: Isolators for providing electrical isolation between two circuits operating at different voltages are described, in which multiple semiconductor dies including the isolator components and the components of the two circuits are stacked on top of each other to provide a laterally-compact arrangement. An isolation barrier electrically separates the two circuits, and the isolator may provide a communication channel for transfer of information and/or power between the two circuits. The isolator may be included in an integrated device having a stacked die configuration where a first semiconductor die includes the isolator and components of the first of the two circuits, and a second semiconductor die positioned over the first semiconductor die includes components of the second of the two circuits. Two components of the isolator may be formed in separate layers of the first semiconductor die.

Abstract: Mechanical resonators including doped piezoelectric active layers are described. The piezoelectric active layer(s) of the mechanical resonator may be doped with a dopant type and concentration suitable to increase the electromechanical coupling coefficient of the active layer. The increase in electromechanical coupling coefficient may all for improved performance and smaller size mechanical resonators than feasible without using the doping.

Abstract: Apparatus and methods for phase synchronization of phase-locked loops (PLLs) are provided. In certain configurations, an RF communication system includes a PLL that generates one or more output clock signals and a phase synchronization circuit that synchronizes a phase of the PLL. The phase synchronization circuit includes a sampling circuit that generates samples by sampling the one or more output clock signals based on timing of a reference clock signal. Additionally, the phase synchronization circuit includes a phase difference calculation circuit that generates a phase difference signal based on the samples and a tracking digital phase signal representing the phase of the PLL. The phase synchronization circuit further includes a phase adjustment control circuit that provides a phase adjustment to the PLL based on the phase difference signal so as to synchronize the PLL.

Abstract: Present disclosure describes an improved scaling mechanism for a multi-stage fixed-point FFT algorithm used to process signals received by radar or sonar systems. Proposed scaling includes scaling an output of every pair of consecutive butterfly stages of the FFT algorithm by a scaling factor equal to two times of the inverse of a growth factor for the pair of consecutive butterfly stages for the FFT algorithm for a purely complex exponential input signal. Besides this scaling, input signals are allowed to overflow by saturation. Such mechanism yields adequate performance of radar and sonar receivers implementing fixed-point FFTs for any types of input signals, from random to substantially complex exponential or sinusoidal signals. Proposed scaling achieves a balance between having signal to noise ratio (SNR) that is possible to obtain for a particular input signal and SNR that is needed to successfully process that signal for radar and sonar applications.

Abstract: Capped microelectromechanical systems (MEMS) devices are described. In at least some situations, the MEMS device includes one or more masses which move. The cap may include a stopper which damps motion of the one or more movable masses. In at least some situations, the stopper damps motion of one of the masses but not another mass.

Abstract: An isolator system is disclosed in which a pair of circuit systems is separated by an isolation barrier but engage in mutual communication by an isolator device that bridges the isolation barrier. A first circuit system may include a measurement system generating measurement data and status monitor generating status data. The first circuit system also may include a communication system that multiplexes the measurement data and the status data for transmission across a common isolator device. In this manner, the number of isolator devices may be reduced over conventional designs.

Abstract: Various examples are directed to crosspoint switches and methods of use thereof. An example cross point switch comprises a first row buffer, a second row buffer, a first column buffer, and a second column buffer. The crosspoint switch may also comprise a first switch that, when closed, electrically couples the second row buffer to the first column buffer, and a correction controller. The correction controller may be configured to send a first correction signal to the first row buffer; send a second correction signal to the second row buffer; receive an indication that the first switch is closed; send a third correction signal to the first column buffer; and send a fourth correction signal to the second column buffer.

Abstract: Systems and techniques are described for matching the resonance frequencies of multiple resonators. In some embodiments, a resonator generates an output signal reflecting the resonator's response to an input drive signal and an input noise signal. The output signal is then compared to the noise signal to derive a signal representative of the resonance frequency of the resonator. Comparing that signal to the output signal of a second resonator gives an indication of whether there is a difference between the resonance frequencies of the two resonators. If there is, one or both of the resonators may be adjusted. In this manner, the resonance frequencies of resonators may be matched during normal operation of the resonators.

Abstract: Embodiments of the present disclosure provide apparatuses and methods for balancing parasitic capacitances between metal tracks in an integrated circuit chip. Specifically, additional capacitances in the form of, for example, tab capacitors, are attached to the metal tracks with the intention of detaching a select number of the attached capacitances for the purpose of balancing the parasitic capacitances between the metal tracks. The attached capacitances may be structural metal elements. Further, the attached structural metal elements may be detachable at thin-film resistive material associated with each of the attached structural metal elements.

Abstract: A time-interleaved digital-to-analog converter (DAC) uses M DAC cores to convert a digital input signal whose digital input words are spread to different DAC cores to produce a final analog outputs. The M DAC cores, operating in a time-interleaved fashion, can increase the sampling rate several times compared to the sampling rate of just one DAC. However, sequential time-interleaving DAC cores often exhibit undesirable spurs at the output. To spread those spurs to the noise floor, the time-interleaving DAC cores can be selected at a pseudo randomized manner or in a specific manner which can break up the sequential or periodic manner of selecting the DAC cores.

Abstract: Methods of forming a thin film are disclosed. One such method can include sputtering a target material to form a first thin film resistor and adjusting a parameter of deposition to modulate a property of a subsequently formed second thin film resistor. For instance, a substrate bias and/or a substrate temperature can be adjusted to modulate a property of the second thin film resistor. A temperature coefficient of resistance (TCR) and/or another property of the second thin film resistor can be modulated by adjusting the parameter of deposition. The target material sputtered onto the substrate can include, for example, a Cr alloy, a Ni alloy, SiCr, NiCr, or the like. A relationship can be established between the substrate bias and/or substrate temperature and the thin film resistor property, and the relationship can be used in selecting deposition conditions for a desired property value.

Abstract: An integrated circuit may include a substrate and a dielectric layer formed over the substrate. A plurality of p-type thermoelectric elements and a plurality of n-type thermoelectric elements may be disposed within the dielectric layer that are connected in series while alternating between the p-type and the n-type thermoelectric elements. The integrated circuit may include first and second substrates each having formed thereon a plurality of thermoelectric legs of a respective type of thermoelectric material. The first and second thermoelectric substrates also may have respective conductors, each coupled to a base of an associated thermoelectric leg and forming a mounting pad for coupling to a thermoelectric leg of the counterpart substrate.

Abstract: Apparatus and methods are provided for starting up an isolated power converter. In an example, an integrated circuit for controlling an isolated power converter can include a control circuit configured to control a duty cycle of a primary switch according to an startup schedule during an initial interval of a start-up period of the isolated power supply, and to switch to a closed-loop control mode of the primary switch during a second interval of the start-up period after a voltage level of the DC output power signal is above a start-up threshold.

Abstract: Magnetic devices, and associated methods of manufacture, using flex circuits. Conductive flex circuit traces, or combinations of such traces with conductive printed circuit board or other substrate traces, form windings around toroidal ferromagnetic cores. Bending the flex circuit into a partial loop or a full loop forms partial or full windings respectively. Bonding or flow soldering electrically connects the windings together and to a printed circuit board or other substrate. The methods yield transformers with high conversion efficiency, are compatible with conventional printed circuit boards and readily available high-volume assembly equipment, and avoid the higher cost of manually made windings.

Abstract: A battery monitoring system and method are disclosed. A battery monitor compares data in parallel register files. If voltage deviation above a certain threshold is detected in one register file, the system generates an alert that a fault exists upstream in the system. In order to better detect errors, the system may intentionally alter the voltages on the batteries to be monitored.

Abstract: Integrated circuit substrates having through silicon vias (TSVs) are described. The TSVs are vias extending through the silicon substrate in which the integrated circuitry is formed. The TSVs may be formed prior to formation of the integrated circuitry on the integrated circuit substrate, allowing the use of via materials which can be fabricated at relatively small sizes. The integrated circuit substrates may be bonded with a substrate having a microelectromechanical systems (MEMS) device. In some such situations, the circuitry of the integrated circuit substrate may face away from the MEMS substrate since the TSVs may provide electrical connection from the circuitry side of the integrated circuit substrate to the MEMS device.

Abstract: A time-to-digital converter (TDC) detects a timing relationship between signals representing two temporal events. Several samples are acquired over a certain time period for each event, and the signals related to the different events are digitized or quantized either by separate TDCs or by a single TDC in a time-sequential manner. The quantized results are then processed, for example added to/ subtracted from one another, and used to determine the phase or time difference between the two events. When information being quantized is quasi-static over time periods where the measurement is performed, the instantaneous or “one shot” accuracy of a TDC need not be as good as or better than the desired time resolution. Digitally processing the signals and averaging the results moves an otherwise difficult analog quantizer problem to the digital domain where savings in power and chip area can be easily achieved without sacrificing accuracy.

Abstract: Methods and apparatus for anchoring resonators, such as microelectromechanical systems (MEMS) resonators. A resonator may include a substrate, a mechanical resonating structure, and at least one anchor. The mechanical resonating structure may be configured to resonate in a resonance mode of vibration at a frequency. The anchor may couple the mechanical resonating structure to the substrate. The anchor may be configured to exhibit an acoustic bandgap at the frequency of the resonance mode of vibration of the mechanical resonating structure. The anchor may be oriented in a direction substantially parallel to a direction of propagation of the resonance mode of vibration of the mechanical resonating structure.

Abstract: Apparatus and methods for electrostatic discharge (ESD) protection of radio frequency circuits are provided. In certain configurations, an ESD protection circuit includes two or more pairs of field effect transistors (FETs) electrically connected in series between a radio frequency signal pin and a radio frequency ground pin. Each of the two or more pairs of FETs includes a negative ESD protection FET for providing protection from negative polarity ESD events and a positive ESD protection FET for providing protection from positive polarity ESD events. The source and gate of the negative ESD protection FET are electrically connected to one another, and the source and gate of the positive ESD protection FET are electrically connected to one another. Additionally, the drains of the negative and positive ESD protection FETs are electrically connected to one another. The ESD protection circuit exhibits a relatively low capacitance and flat capacitance versus voltage characteristic.