Abstract: A method and a device for canceling an offset voltage in an output of a comparator circuit include applying a signal to a first input of the comparator as a function of an initial tap point in a resistor ladder. While the signal is applied to the first input, a nominal voltage is applied to a second input of the comparator, and then an output of the comparator is analyzed. The signal to the first input is changed in response to the analyzing, by accessing a different tap point in the resistor ladder.
Abstract: A multi-string LED drive system for multiple LED strings powered by a common line voltage. A plurality of current control circuits are connected in series with respective LED strings, each of which includes a transistor which causes a desired LED string current to be conducted when a sufficient voltage is applied to the transistor's gate. A “maximum” circuit receives each of the gate voltages at respective inputs and outputs a voltage which is proportional to the greatest of the received voltages. A line regulator circuit receives the output of the maximum circuit and a signal which represents a target gate voltage at respective inputs and generates the common line voltage such that the highest of the gate voltages is approximately equal to the target gate voltage, such that system power efficiency is optimized in cases of imbalance between LED string voltage drops and/or sink device characteristics.
Abstract: Apparatus and methods reduce increase the common mode range of a difference amplifier. A circuit uses one or more floating powers and one or more floating grounds coupled to an input stage of an amplifier to increase the common mode range of a difference amplifier. The floating power can be configured to select from the greater of the voltage level of one of the differential signals and the system power high source. The floating ground can be configured to select from the lesser of the voltage level of one of the differential signals and the system power low source.
Abstract: An integrated circuit having an insulated conductor or within a semiconductor substrate and extending perpendicular to a plane of a semiconductor wafer or substrate on which the integrated circuit is fabricated, the conductor comprising a first region of doped semiconductor extending between a first device or a first contact and a second device or a second contact.
Abstract: A composite resistor includes a thin film resistor element having a first temperature coefficient of resistance and a metal resistor element having a second temperature coefficient of resistance. A portion of the metal resistor element overlaps a portion of the thin film resistor element such that the portion of the metal resistor element is in thermal communication with the portion of the thin film resistor element to compensate for a resistance drift arising during operation of the composite resistor.
Abstract: Low power low noise input bias current compensation for an amplifier input stage is provided by recycling the tail current of the differential pair transistors. A local amplifier regulates the tail current and buffers the base current of the tail current transistor, which is mirrored back to the input transistors to provide input bias current compensation.
Abstract: A temperature sensing system can include first and second temperature sensing circuits and a digitizing encoder. The first and second temperature sensing circuits can include respective devices with semiconductor junction areas. Temperature information can be determined from one or more characteristic signals measured from the temperature sensing circuits. A feedback circuit can be configured to provide one or more offset signals to the digitizing encoder. The one or more offset signals can correspond to components or characteristics of the first and second temperature sensing circuits. In an example, at least one of the first and second temperature sensing circuits can include an adjustable load circuit for use with the other of the first and second temperature sensing circuits.
Abstract: A packaged integrated device can include a die attach pad having a top surface and a bottom surface. A plurality of leads physically and electrically separated from the die attach pad can be positioned at least partially around the perimeter of the die attach pad. An integrated device die can be mounted on the top surface of the die attach pad. A package body can cover the integrated device die and at least part of the plurality of leads, and at least a portion of the bottom surface of each of the plurality of leads can be exposed through the package body. A plating layer can cover substantially the entire width of an etched lower portion of the outer end of each lead and at least the exposed portion of the bottom surface of each lead.
Abstract: Embodiments of the present invention provide an integrated circuit system including a first active layer fabricated on a front side of a semiconductor die and a second pre-fabricated layer on a back side of the semiconductor die and having electrical components embodied therein, wherein the electrical components include at least one discrete passive component. The integrated circuit system also includes at least one electrical path coupling the first active layer and the second pre-fabricated layer.
Type:
Grant
Filed:
September 30, 2013
Date of Patent:
November 18, 2014
Assignee:
Analog Devices, Inc.
Inventors:
Alan J. O'Donnell, Santiago Iriarte, Mark J. Murphy, Colin G. Lyden, Gary Casey, Eoin Edward English
Abstract: A line voltage control circuit for use with a multi-string LED drive system which provides a common line voltage for multiple LED strings that are connected to respective current sink circuits at respective junctions. An error amplifier receives the minimum junction voltage and a reference ‘desired junction voltage’ at respective inputs, and a voltage regulator outputs the line voltage in response to a voltage applied to a feedback input. A comparator toggles an output when the maximum junction voltage (Vmax) exceeds a reference limit (Vlimit). A multiplexer receives the error amplifier output and a fixed voltage at respective inputs and provides one of the signals to the regulator's feedback input in response to the comparator output. When Vmax>Vlimit, the fixed voltage is provided to the feedback input and the line voltage is reduced, thereby protecting low voltage current sinks from potentially damaging high voltages.
Abstract: Embodiments of the present invention provide an integrated circuit system including a first active layer fabricated on a front side of a semiconductor die and a second pre-fabricated layer on a back side of the semiconductor die and having electrical components embodied therein, wherein the electrical components include at least one discrete passive component. The integrated circuit system also includes at least one electrical path coupling the first active layer and the second pre-fabricated layer.
Type:
Grant
Filed:
February 25, 2014
Date of Patent:
November 18, 2014
Assignee:
Analog Devices, Inc.
Inventors:
Alan J. O'Donnell, Santiago Iriarte, Mark J. Murphy, Colin G. Lyden, Gary Casey, Eoin Edward English
Abstract: A pre-distortion circuit that may introduce a pre-distortion signal in a communication channel by determining a harmonic signal of the signal to be output. One or more image correction signals of the signal to be output may be determined. The one or more image correction signals may be complex conjugate signal variations of the signal to be output. The harmonic signal, the one or more image correction signals and the signal to be output may be combined into a combined output signal. The combined output signal may be transmitted to a digital-to-analog converter. The predistortion circuit may be implemented in a FPGA, an ASIC, a digital-to-analog converter, and/or a separate IC package.
Type:
Grant
Filed:
June 27, 2012
Date of Patent:
November 18, 2014
Assignee:
Analog Devices, Inc.
Inventors:
Ganesh Ananthaswamy, Sudheesh A. Somanathan
Abstract: The present invention may provide a system including a controller and a plurality of integrated circuits. The controller may control synchronization operations of the system, the controller may include a master timing counter and a controller data interface. Each integrated circuit may include a timing counter and an IC data interface. Further, each integrated circuit may synchronize its respective timing counter based on synchronization command received from the controller via the data interfaces. Hence, the system may provide synchronization between the controller and the integrated circuits without an extraneous designated pin(s) for a designated common time-based signal.
Abstract: The present disclosure provides an attenuator and associated methods of operations. An exemplary attenuator includes an input terminal, an output terminal, a voltage reference terminal, a first attenuation segment coupled with the input terminal and the output terminal, and a second attenuation segment coupled with the first attenuation segment and the voltage reference terminal. The attenuator further includes at least two switches coupled with the input terminal and the output terminal in parallel with the first attenuation segment, where at least some of the at least two switches have an associated voltage control terminal. For example, the attenuator includes a first switch and a second switch coupled with the input terminal and the output terminal in parallel with the first attenuation segment, wherein a first voltage control terminal is coupled with the first switch and a second voltage control terminal is coupled with the second switch.
Abstract: Electrical networks are formed to produce an approximation of at least one desired performance characteristic, based on the recognition that fabrication variations introduce slight differences in electronic sub-networks which were intended to be identical. These fabrication differences are turned to an advantage by providing a pool of sub-networks, and then selectively connecting particular combinations of these sub-networks to implement networks that approximate the desired performance characteristics. The sub-networks are of like kind (e.g., resistors) and have a like measure.
Abstract: Data-transfer transactions in the read and write directions may be balanced by taking snapshots of the transactions stored in a buffer, and executing transactions in the same direction back-to-back for each snapshot.
Type:
Grant
Filed:
October 5, 2012
Date of Patent:
November 11, 2014
Assignee:
Analog Devices, Inc.
Inventors:
Krishna S. A. Jandhyam, Aravind K. Navada
Abstract: A switching regulator IC contains both switching regulator circuitry and an inductor and a capacitor connected in parallel to form a resonant circuit having an associated notch filter frequency response arranged such that, when connected to receive the regulated output voltage, the resonant circuit attenuates the ripple component. This is accomplished by matching the resonant notch to the ripple's fundamental frequency, either manually or automatically. In addition, the resonant circuit's inductor and capacitor can act in concert with decoupling capacitors coupled to the load to form a low pass filter which attenuates harmonics of the ripple's fundamental frequency.
Type:
Grant
Filed:
May 31, 2012
Date of Patent:
November 11, 2014
Assignee:
Analog Devices, Inc.
Inventors:
Patrick J. Meehan, Thomas Conway, Aldrick Limjoco, Donal G. O'Sullivan
Abstract: A pre-distortion circuit that may introduce a pre-distortion signal in a communication channel by determining a harmonic signal of the signal to be output. One or more image correction signals of the signal to be output may be determined. The one or more image correction signals may be complex conjugate signal variations of the signal to be output. The harmonic signal, the one or more image correction signals and the signal to be output may be combined into a combined output signal. The combined output signal may be transmitted to a digital-to-analog converter. The predistortion circuit may be implemented in a FPGA, an ASIC, a digital-to-analog converter, and/or a separate IC package.
Abstract: A drive signal for a motor-driven mechanical system has zero (or near zero) energy at an expected resonant frequency of the mechanical system. These techniques not only generate a drive signal with substantially no energy at the expected resonant frequency, they provide a zero-energy “notch” of sufficient width to tolerate systems in which the actual resonant frequency differs from the expected resonant frequencies.
Type:
Grant
Filed:
June 21, 2012
Date of Patent:
November 11, 2014
Assignee:
Analog Devices, Inc.
Inventors:
Colin Lyden, Javier Calpe-Maravilla, Mark Murphy, Eoin English, Denis Martin O'Connor
Abstract: Techniques to develop negative impedance circuits that may operate to their power supply rails. The techniques may include generating currents in response to voltage signals presented at respective input terminals of a negative impedance circuit. The voltage signals may be differential signals. The generated currents may be driven through a common impedance within the negative impedance circuit. The currents flowing through the common impedance may be mirrored back to the input terminals of the negative impedance circuit. The negative impedance circuit may be controlled to operate about a common-mode voltage for the circuit.