Abstract: DC-DC converters adapted to provide two or more DC output voltages. More particularly, a multi-state or mode DC-DC converter circuit comprising first and second controllable switches configured for unidirectional conduction of charging current.

Abstract: A bi-directional switch circuit includes a pair of N-type MOS devices connected in series with a common source terminal, and a pair of P-type MOS devices connected in series with a common source terminal. The series connected N-type devices are connected in parallel with the series connected P-type devices in a configuration that includes a first input/output (I/O) point of the switch circuit being connected to a drain of a first one of the N-type devices and a drain of a first one of the P-type devices. The parallel configuration also includes a second I/O point of the switch circuit being connected to a drain of a second one of the N-type devices and a drain of a second one of the P-type devices.

Abstract: Techniques to compensate for sources of temperature and process dependent errors within an oscillator system for frequency control oscillator output clock signal. The oscillator system may include a controller and an oscillator circuit. The techniques may include generating a pair of voltages, a first of which is temperature variant, having (approximately) known temperature variations across process, and a second of which is (approximately) temperature invariant. Each voltage may be scaled by a corresponding trim factor. The scaled voltages may be combined to generate a reference voltage. The reference voltage may compensate for process and temperature dependent error sources within the oscillator system to set the oscillator output clock signal frequency.

Abstract: A system and method are provided for a more accurate bandgap voltage reference wherein the first and second order errors are corrected simultaneously. By using the components included in the correction of the first order error, the second order errors are corrected, advantageously providing less process variability.

Abstract: Apparatus and methods are disclosed related to phase synchronization in transmitters. One such apparatus includes a wireless transmitter with two or more separate and unrelated local oscillators. The apparatus can provide RF signals to multiple antenna elements, which can be implemented in systems such as beamforming systems or multiple input multiple output (MIMO) systems. A phase difference between local oscillators is determined using outputs of receivers. The phase difference can be used to adjust a phase of signals associated with one or more of the local oscillators, such that the phase of each signal provided to the multiple antenna elements can be aligned.

Abstract: A method according to an embodiment of a system for efficient resource management of a signal flow programmed digital signal processor code is provided and includes determining a connection sequence of a plurality of algorithm elements in a schematic of a signal flow for an electronic circuit, the connection sequence indicating connections between the algorithm elements and a sequence of processing the algorithm elements according to the connections, determining a buffer sequence indicating an order of using the plurality of memory buffers to process the plurality of algorithm elements according to the connection sequence, and reusing at least some of the plurality of memory buffers according to the buffer sequence.

Abstract: The present disclosure provides a memory interconnection architecture for a processor, such as a vector processor, that performs parallel operations. An example processor may include a compute array that includes processing elements; a memory that includes memory banks; and a memory interconnect network architecture that interconnects the compute array to the memory. In an example, the memory interconnect network architecture includes a switch-based interconnect network and a non-switch based interconnect network. The processor is configured to synchronously load a first data operand to each of the processing elements via the switch-based interconnect network and a second data operand to each of the processing elements via the non-switch-based interconnect network.

Abstract: A redundancy switch includes at least three data ports and a control input. Each data port includes a data input and a data output. The redundancy switch operates in one of at least three states. In a first state, a first data port is communicatively coupled with a second data port. In a second state, the first data port is communicatively coupled with a third data port. In a third state, the second data port is communicatively coupled with the third data port. The state of the redundancy switch can be controlled based on a signal received at the control input. The redundancy switch can further include transconductance switching elements that convert a voltage input to a current output.

Abstract: A delay locked loop (DLL) includes a delay line that delays a clock signal to generate a delayed clock signal, a phase frequency detector (PFD) for detecting a phase and/or frequency difference between the clock signal and the delayed clock signal, and a charge pump having an adjustable bias current for converting the phase and/or frequency difference taking into account a bias current adjustment into a control voltage, in which the control voltage controls an amount of delay in the delayed clock signal.

Abstract: The transduction scale factor for a MEMS gyroscope is calibrated without moving the MEMS device based on measurements of the resonator resonance frequency and the accelerometer resonance frequency as well as a distance value that may be a fixed distance value or a measured distance value. The measured distance value may be obtained by measuring the quality factor of the resonator or accelerometer and deriving the measured distance value from the quality factor measurement.

Abstract: A substrate for an inertial sensor system includes a plurality of electrode arrangements, each electrode arrangement including an acceleration sensor electrode and a pair of quadrature adjusting electrodes on opposite sides of the acceleration sensor electrode, where each electrode arrangement is capable of being overlaid by a corresponding plate of a shuttle such that the plate completely overlays the acceleration sensor electrode and partially overlays the pair of quadrature adjusting electrodes on opposite sides of the acceleration sensor electrode such that capacitive coupling between the plate and each of the quadrature adjusting electrodes is dependent upon the rotational position of the at least one shuttle while capacitive coupling between the plate and the acceleration sensor electrodes is substantially independent of the rotational position of the at least one shuttle.

Abstract: An amplifier includes a bootstrap circuit for improving a linearity of the amplifier and a feed-forward circuit for modifying a voltage of the bootstrap circuit in response to a change in an input signal. Modifying the voltage using the feed-forward circuit prevents a phase-inversion condition of the amplifier.

Abstract: A system and method provide for calibrating the frequency response of an electronic filter. The system and method include a radio transmitter with both in-phase and quadrature baseband paths. Each baseband path includes a numerically controlled oscillator (“NCO”), a digital signal path, a digital-to-analog converter (“DAC”), and an analog filter. A low frequency tone is applied from the NCO from one of the baseband path, while a high frequency tone is applied from the NCO in the other baseband path. An analog peak detector at output determines which analog filter has the largest amplitude at the output. The peak detector offset between the two analog filters is offset by stimulating the in-phase and quadrature baseband paths with the respective NCOs to find an amplitude difference between the output signals from the NCOs that makes the output of the analog filters the same.

Abstract: A circuit for providing a DC output equal to the RMS value of a time-varying input signal, the circuit including: (i) an RMS-to-DC converter for producing the DC output and (ii) a high-order low-pass filter comprising at least first and second low-pass filters connected in series to cooperatively reduce at least one of ripple in the DC output, ripple in an denominator feedback loop, or DC error in the DC output.

Abstract: In general, in one embodiment, low-light noise is removed from an image by separately filtering luma and chroma components of the image, by adaptively filtering the image based at least in part on a Gaussian distribution of the image, and/or by dividing the image into separate regions and filtering each region separately.

Abstract: Apparatus and methods are disclosed related to trimming an input offset current of an amplifier. One such apparatus can include auxiliary bipolar transistors connected in parallel with bases of respective bipolar transistors of an input stage of an amplifier. The auxiliary bipolar transistors can be biased such that the base currents of the auxiliary bipolar transistors compensate for a mismatch in base currents of the bipolar transistors of the input stage of an amplifier. The offset current at an input of an amplifier can be reduced independent of an offset voltage at the input of the amplifier.

Abstract: Methods of forming a thin film are disclosed. One such method can include sputtering a target material to form a first thin film resistor and adjusting a parameter of deposition to modulate a property of a subsequently formed second thin film resistor. For instance, a substrate bias and/or a substrate temperature can be adjusted to modulate a property of the second thin film resistor. A temperature coefficient of resistance (TCR) and/or another property of the second thin film resistor can be modulated by adjusting the parameter of deposition. The target material sputtered onto the substrate can include, for example, a Cr alloy, a Ni alloy, SiCr, NiCr, or the like. A relationship can be established between the substrate bias and/or substrate temperature and the thin film resistor property, and the relationship can be used in selecting deposition conditions for a desired property value.

Abstract: As provided herein, in some embodiments, monolithic oscillators with low phase noise, large swing voltages, wide tuning, and high frequency characteristics are obtained by a monolithic integrated circuit having an oscillator core configured to generate a first output signal, and one or more tuning units operatively coupled to the oscillator core. In some embodiments, the oscillator core is a push-push oscillator core having a bipolar junction transistor, and each of the tuning units uses a FET transistor to present a selectable capacitance. In some embodiments, the tuning units have high-voltage and high-frequency capabilities. In some embodiments, the tuning units use MEMS switches to selectively connect capacitances to the oscillator core. In some embodiments, the oscillator core generates a second signal that has twice the frequency of the first frequency.

Abstract: A transconductance circuit that improves linearity and output current over a wider range of input voltages than prior designs. The transconductance circuit may include first and second sets of paired differential transistors. In each set, emitters of the paired transistors may be commonly coupled to corresponding nodes of a common impedance, and collectors may be coupled to output terminals of the transconductance circuit. The circuit may further include first and second sets of doublet differential transistor pairs, each doublet pair having transistors of different sizes. Each doublet pair may have current sources coupled between commonly coupled emitters and a source potential. Respective collectors for each doublet pair may be coupled to the output terminals of the transconductance circuit. A pair of voltage followers may be provided to replicate corresponding input voltages across corresponding bases of the differential transistor pairs and the doublet transistor pairs.

Abstract: A MEMS package includes a substrate having an L-shaped cross-section. The substrate includes a vertical portion having a front surface and a back surface, and a horizontal portion protruding from a lower part of the front surface of the vertical portion, wherein the front surface of the vertical portion includes a mounting region. A MEMS die is mounted on the mounting region such that the MEMS die is oriented substantially parallel to the front surface; a lid attached to the front surface of the substrate while covering the MEMS die; and a plurality of leads formed on a bottom surface of the substrate. The leads can extend substantially parallel to one another, and substantially perpendicular to the front surface. The MEMS die can be oriented substantially perpendicular to a PCB substrate on which the package is mounted.