Abstract: An ideal diode circuit is described which uses an NMOS transistor as a low-loss ideal diode. The control circuit for the transistor is referenced to the anode voltage and not to ground, so the control circuitry may be low voltage circuitry, even if the input voltage is very high, referenced to earth ground. A capacitor is clamped to about 10-20 V, referenced to the anode voltage. The clamped voltage powers a differential amplifier for the detecting if the anode voltage is greater than the cathode voltage. The capacitor is charged to the clamped voltage during normal operation of the ideal diode by controlling the conductivity of a second transistor coupled between the cathode and the capacitor, enabling the circuit to be used with a wide range of frequencies and voltages. All voltages applied to the differential amplifier are equal to or less than the clamped voltage.

Abstract: A matrix multiplication circuit comprises a memory storage device, processing circuitry, a parallel multiply circuit, and buffer circuits. The parallel multiply circuit simultaneously performs a count of multiplies in a parallel multiplication operation. The buffer circuits include prefetch buffer circuits each having a storage array dimension corresponding to the count of multiplies in the parallel multiplication operation. The processing circuitry loads a first prefetch buffer circuit with values from the first matrix; fetches a value of the second matrix and, in parallel with the fetch, preload the second prefetch buffer circuit with another value from the first matrix; initiates a parallel multiply of the fetched value of the second matrix and the values in the first prefetch buffer circuit; and stores partial product results of the parallel multiply, including adding a current partial product result to a previously stored partial product result.

Abstract: Disclosed herein are transconductance circuits, as well as related methods and devices. In some embodiments, a transconductance circuit may include an amplifier having a first input coupled to a voltage input of the transconductance circuit, and a switch coupled between an output of the amplifier and a second input of the amplifier.

Abstract: Disclosed are embodiments that provide digital data communication between a single-pair Ethernet and a multi-pair Ethernet. Some embodiments include a single-pair Ethernet interface that is configured to operate in at least two modes. In a first mode, the single-pair Ethernet interface operates in a conventional manner. In a second mode, alternate pin configurations are employed to provide a low-cost interoperability between a single-pair Ethernet interface and a multi-pair Ethernet interface. For example, in the second mode, the single-pair Ethernet receives, via a first receive data pin, from a first transmit data pin of the multi-pair Ethernet interface, a data signal, and receives, via a second receive data pin, from a second transmit data pin of the multi-pair Ethernet interface, a second data signal.

Abstract: Mechanisms for evaluating amplitude for current pulses provided to a transimpedance amplifier (TIA) for current levels beyond the linear range of the TIA where clipping circuit(s) may limit the input voltage of the TIA are disclosed. In one aspect, an example TIA arrangement includes a clipping arrangement that includes multiple clipping circuits. Each clipping circuit can be biased by different bias voltages such that the different clipping circuits are activated at different input current amplitudes. Different clipping circuits can have different impedances, which can result in different recovery time characteristics. With the multiple clipping circuits in clipping arrangements discussed herein, a saturated dynamic range of a TIA can be divided into sub-regions and different pulse widening characteristics for each region may be defined, which may enable determination of amplitude for current pulses provided to the TIA even for current levels beyond the linear range of the TIA.

Abstract: A modified structure of an n-channel lateral double-diffused metal oxide semiconductor (LDMOS) transistor is provided to suppress the rupturing of the gate-oxide which can occur during the operation of the LDMOS transistor. The LDMOS transistor comprises a dielectric isolation structure which physically isolates the region comprising a parasitic NPN transistor from the region generating a hole current due to weak-impact ionization, e.g., the extended drain region of the LDMOS transistor. According to an embodiment of the disclosure, this can be achieved using a vertical trench between the two regions. Further embodiments are also proposed to enable a reduction in the gain of the parasitic NPN transistor and in the backgate resistance in order to further improve the robustness of the LDMOS transistor.

Abstract: The present disclosure provides a feedback control system and method for a bidirectional VCM. The system employs an analog core that is common to both the PWM and linear modes of operation. The analog core includes a feedback mechanism that determines the error in the current flowing through the motor. The feedback mechanism produces an error voltage that corresponds to the current error, and applies the voltage to a control driver. The control driver then controls the motor, based on the error voltage, in either a PWM or linear mode. By sharing a common core, the switching time between modes is improved. Furthermore, the output current error between modes is reduced.

Abstract: Delay calibration for digital signal chains of SFCW systems is disclosed. An example calibration method includes receiving a burst with a test pulse, the burst having a duration of L clock cycles; receiving a trigger indicative of a time when the burst was transmitted; generating a digital signal indicative of the received burst; for each of L clock cycles, computing a moving average of a subset of digital samples and an amplitude for each average; identifying one moving average for which the computed amplitude is closest to an expected amplitude; identifying the clock cycle of the identified moving average; and updating at least one delay to be applied in digital signal processing of received bursts based on a difference between the trigger and the identified clock cycle. The delay may be used for selecting digital samples of the received signal that contain valid data for performing further data processing.

Abstract: The present disclosure provides techniques for predicting failure of power switches and taking action based on the predictions. In an example, a method can include controlling the at least two parallel-connected power switches via a first driver and a second driver, the first a second driver responsive to a single command signal, measuring a failure characteristic of a first power switch, and disabling a first driver of the first power switch when the first failure characteristic exceeds a failure precursor threshold.

Abstract: Laser driver designs that aim to reduce or eliminate the problem of fault laser firing are disclosed. Various laser driver designs presented herein are based on providing a current dissipation path that is configured to start providing a resistance for dissipating at least a portion, but preferably substantially all, of the negative current from the laser diode. Dissipating at least a portion of the negative current may decrease the unintentional increase of the voltage at the input to the laser diode and, therefore, reduce the likelihood that fault laser firing will occur. A control logic may be used to control the timing of when the current dissipation path is activated (i.e., provides the resistance to dissipate the negative current from the laser diode) and when it is deactivated.

Abstract: Systems, devices, and methods related to low-noise, high-accuracy single-ended continuous-time sigma-delta (CTSD) analog-to-digital converter (ADC) are provided. An example single-ended CTSD ADC includes a pair of input nodes to receive a single-ended input signal and input circuitry. The input circuitry includes a pair of switches, each coupled to one of the pair of input nodes; and an amplifier to provide a common mode signal at a pair of first nodes, each before one of the pair of switches. The single-ended CTSD ADC further includes digital-to-analog converter (DAC) circuitry; and integrator circuitry coupled to the input circuitry and the DAC circuitry via a pair of second nodes.

Abstract: Low-frequency Noise Cancellation Method for Optical Measurement Systems. The present disclosure provides a low frequency noise cancellation method for optical measurement system, An optical measurement system has a transmitter to drive an LED and a receiver connected to a photodiode. The LED driver will generate a pulse signal to drive the LED and act as the radiation source for the optical measurement. Consequently, the receiver will convert the received photo-diode current to a voltage signal. The signal will then be digitized by an ADC for further processing. A current DAC circuit IDAC is added at the front of the receiver and has the same timing control with the LED driver to cancel the DC portion of the received current.

Abstract: A source stochastic signal is deconstructed into its intrinsic components using a decomposition process. The intrinsic components are transformed, and a set of machine learning models are defined and trained to operate with individual ones of the transformed components. The source stochastic signal is thus empirically broken down into underlying components which are then used as learning datasets for the set of machine learning models to predict target components. The target components are then individually predicted and combined to reconstruct a predicted target stochastic signal. The source stochastic signal and the target stochastic signals can be biological signals having a related or common origin, such as photoplethysmogram signals and arterial blood pressure waveforms.

Abstract: Apparatuses and methods related to digital mobile radio (DMR) with enhanced transceiver are disclosed herein. The transceiver detects waveforms of signals received by a digital mobile station radio (MS). By detecting whether the waveforms of the signals, the transceiver allows a digital baseband processor of the MS to remain in a sleep state while the signals are being detected by the DMR, thereby reducing an amount of power used while the signals are being detected.

Abstract: Electrochemical sensors include a housing within which an electrolyte is provided over the electrodes. The housing includes an active region, which is the area around the electrodes in which the electrolyte must be positioned to ensure correct operation of the device. The inner walls, base and ceiling of the housing are coated in either hydrophobic or hydrophilic materials, or both, so as to encourage the electrolyte to take a position over the active region, which is defined by the position of the electrodes. In some electrochemical sensors, a combination of hydrophobic and hydrophilic materials is used and the materials can be arranged in a pattern, which encourages the electrolyte to take a position over the active region.

Abstract: A transfer printing method is described that can be used for a wide variety of materials, such as to allow for circuits formed of different materials to be integrated together on a single integrated circuit. A tether (18) is formed on dice regions (16) of a first wafer (30), followed by attachment of a second wafer (32) to the tethers. The dice regions (16) are processed so as to be separated, followed by transfer printing of the dice regions to a third wafer (34).

Abstract: Rotary traveling wave oscillator-based (RTWO-based) frequency multipliers are provided herein. In certain embodiments, an RTWO-based frequency multiplier includes an RTWO that generates a plurality of clock signal phases of a first frequency, and an edge combiner that processes the clock signal phases to generate an output clock signal having a second frequency that is a multiple of the first frequency. The edge combiner can be implemented as a logic-based combining circuit that combines the clock signal phases from the RTWO. For example, the edge combiner can include parallel stacks of transistors operating on different clock signal phases, with the stacks selectively activating based on timing of the clock signal phases to generate the output clock signal of multiplied frequency.

Abstract: Digital isolator devices, and many other devices, have a maximum device junction temperature, which, if exceeded, may cause device failure and the integrity of the isolation is no longer guaranteed. The use of an electronic fuse, eFuse, arranged in series with the digital isolator, provides a protection scheme for the digital isolator in which current is limited by the eFuse when it is determined that the supply current of the digital isolator exceeds a predetermined threshold that would the cause junction temperature to increase above an absolute maximum rating. As such, the integrity of the digital isolator is preserved in the event of a system fault.

Abstract: Some embodiments herein describe a radio frequency power semiconductor device that include a first non-linear filter network for compensating for lower frequency noise of a power amplifier. The first non-linear filter network can include a plurality of infinite impulse response filters and corresponding corrective elements to correct for a non-linear portion of the power amplifier. The radio frequency power semiconductor device can further include a second non-linear filter network for compensating for broadband distortion. The second non-linear filter network can be connected in parallel to the first non-linear filter network. The broadband distortion can include digital predistortion and the narrowband distortion can include charge trapping effects. The first non-linear filter network can comprise Laguerre filters. The second non-linear filter network can comprise general memory polynomial filters.

Abstract: Rotary traveling wave oscillators (RTWOs) with distributed stubs are provided. In certain embodiments, an RTWO includes segments that are implemented using distributed stubs to mitigate flicker noise upconversion arising from transmission line dispersion. For example, a distance between the distributed stubs can be selected to intentionally generate a phase difference between transmission line modes, thereby cancelling out phase shifts due to transmission line dispersion. In particular, each segment is subdivided into multiple transmission line sections with a maintaining amplifier electrically connected to one of the sections and a tuning capacitor array connected to adjacent transmission line sections.