Abstract: A bipolar junction transistor is provided with a multilayer collector structure. The layers of the collector are individually grown in separate epitaxial growth stages. For a PNP transistor, each layer, after it is grown, is doped with a p-type dopant in a dedicated implant stage. By providing separate epitaxial growth stages and separate dopant implant stages for each layer of the collector, the dopant concentration profile in the collector region can be better controlled to optimize the speed and breakdown voltage of a bipolar junction transistor.

Abstract: Devices and methods that aim to improve flicker noise rejection in switched-capacitor (SC) integrators are disclosed. An example SC integrator includes a first and a second sampling capacitors, an amplifier, an integrating capacitor, coupled at least to an output of the amplifier, and a switching arrangement. By adding (i.e., integrating in the integrating capacitor) sign-inverted samples of a flicker noise of the amplifier at every clock cycle of a master clock and by keeping the time distance/delay between those samples relatively small regardless of the master clock frequency, such a SC integrator may provide improvements in terms of rejecting the flicker noise of the amplifier.

Abstract: Embodiments may relate to an electronic device that includes a processor communicatively coupled with a hardware accelerator. The processor may be configured to identify, based on an indication of a priority level in a task control block (TCB), a location at which the TCB should be inserted in a queue of TCBs. The hardware accelerator may perform jobs related to the queue of TCBs in an order related to the order of TCBs within the queue. Other embodiments may be described or claimed.

Abstract: A radio timing controller equipped with one or more sequence controllers is disclosed. Sequence controllers enable high degree of programmability of the radio timing controller, e.g., in terms of the number of general purpose input/outputs (GPIOs), mapping of GPIOs to specific radio controls, setting of the radio control output states, timing to sequence events at radio symbol boundaries, etc.

Abstract: A Power over Data Lines (PoDL) system provides a DC voltage and differential data signals on the same wire pair. A Powered Device (PD) load is coupled to the wire pair, via a gyrator, for being powered by the DC voltage. The gyrator emulates the DC-coupling properties of inductors using active components. The gyrator includes transistors that are controlled to act as a full-bridge rectifier for ensuring a correct polarity DC voltage is applied to the PD load. Since the transistors operate in saturation and are coupled to be insensitive to differential data signals on the wire pair, the current supplied to the PD load is substantially unaffected by the differential data signals. Negative feedback circuits in the gyrator reduce fluctuations in current through the gyrator due to differential data signals on the wire pair. No inductors are required in the gyrator. A PHY is AC-coupled to the wire pair via capacitors.

Abstract: The present disclosure relates to configuring at least one pair of devices in a physical unclonable function (PUF) apparatus and reading out at least one pair of devices for determining a persistent random PUF output. The pair of devices may be readout by measuring a physical difference between the devices/components caused by random manufacturing differences, which may then be used to determine a persistence random PUF output. Configuring the pair of devices includes measuring the random manufacturing difference and, based on that measurement, setting a readout condition for the pair of devices, which dictates aspects of the readout process that should be used for that pair of devices. Each time the pair of devices is readout in the future, it may be readout in accordance with the condition that was set at configuration.

Abstract: A voltage generator circuit can be structured to provide an output voltage having a substantially flat temperature coefficient by use of a circuit loop having transistors and a resistor arranged such that, in operation, current through the resistor has a signed temperature coefficient. The current behavior can be controlled by an output transistor coupled to another transistor, which is coupled to the circuit loop, with this other transistor sized such that, in operation, a voltage of this other transistor has a signed temperature coefficient that is opposite in sign to the signed temperature coefficient of the current through the resistor. Embodiments of voltage generator circuits can also include additional components to trim output voltage, to provide unconditional stability, or other features for the respective voltage generator circuit. In various embodiments, a voltage generator circuit can be implemented as a low drop-out (LDO) voltage regulator.

Abstract: A gain stage, such as an amplifier, e.g., an instrumentation amplifier, can receive an input signal and adjust the level of the input signal, e.g., amplify or attenuate. An output voltage of the gain stage can be applied to a subsequent circuit. Using various techniques, a second stage of an instrumentation amplifier, which can include a transconductance stage that converts a current to a voltage that can be applied to an output node of the instrumentation amplifier, can be removed. Removal of such a second stage can allow an output current from the gain stage to be applied directly from a current output node to an input node of a subsequent circuit.

Abstract: Embodiments of the present disclosure relate to various methods and example systems for carrying out analog-to-digital conversion of data acquired by arrays of nanogap sensors. The nanogap sensors described herein may operate as molecular sensors to help identify chemical species through electrical measurements using at least a pair of electrodes separated by a nanogap. In general, the methods and systems proposed herein rely on digitizing the signal as the signal is being integrated, and then integrating the digitized results. With such methods, the higher sample rate used in the digitizer reduces the charge per quantization and, therefore, the size of sampling capacitors used. Consequently, sampling capacitors may be made factors of magnitude smaller, requiring less valuable space on a chip compared to sampling capacitors used in conventional nanogap sensor arrays.

Abstract: Isolators having a back-to-back configuration for providing electrical isolation between two circuits are described, in which multiple isolators formed on a single monolithic substrate are connect in series to achieve a higher amount of electrical isolation for a single substrate than for one of the isolators alone. A pair of isolators in the back-to-back configuration have top and bottom isolator components where the top isolator components are connected together and electrically isolated from the underlying substrate, resulting in floating top isolator components. The back-to-back isolator may provide one or more communication channels for transfer of information and/or power between different circuits.

Abstract: High voltage tolerant electrical overstress protection with low leakage current and low capacitance is provided. In one embodiment, a semiconductor die includes a signal pad, an internal circuit electrically connected to the signal pad, a power clamp electrically connected to an isolated node, and one or more isolation blocking voltage devices electrically connected between the signal pad and the isolated node. The one or more isolation blocking voltage devices are operable to isolate the signal pad from a capacitance of the power clamp. In another embodiment, a semiconductor die includes a signal pad, a ground pad, a high voltage/high speed internal circuit electrically connected to the signal pad, and a first thyristor and a second thyristor between the signal pad and the ground pad.

Abstract: The disclosed technology relates generally to semiconductor devices, and more particularly to power semiconductor devices in which effects of charge trapping are compensated. A radio frequency (RF) power transmitter system comprises a RF power semiconductor device that outputs a time-varying gain characteristic from a RF signal input waveform originating from a digital input, wherein the time-varying gain characteristic includes a gain error associated with charge-trapping events having a memory effect on the RF power semiconductor device lasting longer than 1 microsecond. The RF power transmitter system further comprises circuitry configured to apply an analog gate bias waveform to the RF power semiconductor device based on the time-varying gain characteristic to reduce the gain error.

Abstract: A laser emitter circuit comprises a laser diode; a driver circuit configured to generate a drive signal; and a resonant circuit coupled to the driver circuit and the laser diode, wherein the resonant circuit is configured to use the drive signal of the driver circuit to generate a continuous wave sinusoidal drive signal to drive the laser diode.

Abstract: Apparatus and method for establishing a stable operating point of a H-bridge with a center shunt switch. The stable operating point lets a circuit connected to the H-bridge outputs work in a more ideal condition. As such, an H-bridge with a stable operating point will yield a higher performance and/or save power. Since common mode is one of the biggest sources of electromagnetic interference, a stable operating point in an H-bridge also suppresses EMI.

Abstract: Systems and methods are provided for architectures for an analog feedback class D modulator that increase the power efficiency of the class D modulator. In particular, systems and methods are provided for an analog feedback class D modulator having a digital feed-forward loop. The digital feed-forward loop allows for removal of signal content from an input to an analog-to-digital converter, such that the ADC processes just noise and/or error. Using the techniques discussed herein, the loop filter is low power as it processes error content but not signal content.

Abstract: Systems and methods of monitoring electrodermal activity (EDA) in human subjects suitable for use in wearable electronic devices. An EDA monitoring system can include first and second dry electrodes, an alternating current (AC) excitation signal source, a trans-impedance amplifier, an analog-to-digital (A-to-D) converter, a discrete Fourier transform (DFT) processor, and a microprocessor. The AC excitation signal source can produce an AC excitation signal having a predetermined excitation frequency, such as about 100 or 120 Hertz (Hz). The analog-to-digital (A-to-D) converter can include a sample-and-hold circuit that operates at a predetermined sampling frequency, such as about four times (4×) the predetermined excitation frequency of 100 or 120 Hz. The DFT processor can generate complex frequency domain representations of digitized, sampled voltage level sequences provided by the A-to-D converter for use in obtaining measures of a user's skin impedance or skin conductance.

Abstract: Differential switching output stage for audio, power and digital data transmission can cause a common mode error due to asymmetric transition between positive and negative outputs. Systems and methods are provided for common mode error correction. In particular, summing nodes, novel error amps an edge switching can be used for common-mode feedback (CMFB) in differential signaling and other applications.

Abstract: A transmitter that reduces 3rd order harmonic (HD3) and inter modulation distortion (IMD3) for a gm stage of a mixer while reducing flicker noise is disclosed. The transmitter may include a balanced mixer, a transconductance stage connected to the mixer, and a bias circuit. The bias circuit may include a programmable current source configured to provide a reference current. Further, the bias circuit may include a replica circuit configured to replicate a DC signal of the transconductance stage. The bias circuit may also include a bias transistor configured to level shift a bias signal obtained from a signal source based on the reference current and the DC signal of the transconductance stage as determined from the replica circuit.

Abstract: A system current sensor module can accurately sense or measure system current flowing through a sense current resistor by shunting current through a gain-setting resistor and using an amplifier to measure a resulting voltage, with an output transistor controlled by the amplifier controlling current through the gain setting resistor in a manner that tends to keep the amplifier inputs at the same voltage. The resistors can be thermally coupled to maintain similar temperatures when a system current is flowing. The thermal coupling can include conducting heat from a first resistor layer carrying the current sense resistor to a thermal cage layer located beyond a second resistor layer carrying the gain-setting resistor. This preserves accuracy, including during aging.

Abstract: A transceiver that may be implemented in low-voltage differential signaling (LVDS) transmission system or a multipoint LVDS transmission system, and corresponding systems are disclosed herein. The transceiver can filter a common-mode component of a differential input signal input into the transceiver while maintaining a high impedance for a differential-mode component of the differential input signal. The transceiver utilizes teeter-totter circuitry to maintain the high impedance for the differential-mode component of the differential input signal.