Abstract: The oscillation circuit includes an output current mirror, a P-N complementary current mirror, a P-type current mirror and an N-type current mirror. The P-N complementary current mirror has the same structure as the output current mirror but has current that is only 1/k times the current of the output current mirror, wherein k is greater than 1. The P-type current mirror connects to the P-N complementary current mirror, and has current that is m times the current of the P-N complementary current mirror, where m is greater than 1. The N-type current mirror has one end connected to the P-type current mirror and another end connected to the output current mirror. The N-type current mirror has current that is n times the current of the P-type current mirror, where m × n k ? 1 , and n is greater than 1.

Abstract: The image sticking erasing circuit includes a detection circuit and a switching circuit connected to the detection circuit. The detection circuit is for use in detecting a first voltage signal, which closely follows the variation of the voltage source, and a reference voltage, which loosely follows the variation of the voltage source. When the detection circuit determines that the first voltage signal is lower than a first threshold value, the switching circuit switches the gate of a driving transistor to a second voltage signal, which loosely follows the voltage source. When the detection circuit determines that the reference voltage signal is lower than a second threshold value, the switching circuit switches the gate of a driving transistor to a low voltage state.

Abstract: The low voltage circuit for starting up a synchronous step-up DC/DC converter, which connects to a voltage source through an inductor, includes a P-type power transistor, an N-type power transistor and a controller. The P-type power transistor includes a body diode, and one end of the P-type power transistor acts as a power source of an oscillator. The N-type power transistor connects the P-type power transistor in series, and both of the power transistors are not enabled at the same time. The oscillator electrically connects to the controller, which enables the P-type power transistor at initialization time, and enables the N-type power transistor a period after the initialization time.

Abstract: The aid design system for analog ICs includes an analog IC database, a peripheral component database, an input module, a computing simulation module, a selection module and an output module. The analog IC database includes parameters of a plurality of analog ICs. The peripheral component database includes parameters of the peripheral components cooperating with the analog ICs. The input module is for use in inputting a desirable parameter specification or specific IC according to the user's discretion. The computing simulation module includes transfer functions of the analog ICs. The selection module is for use in picking out suggested peripheral components based on the computing result of the computing simulation module. The output module is for use in displaying the suggested peripheral components or analog ICs.

Abstract: The switching method between pulse frequency modulation and pulse width modulation signals is first based on an output voltage of a power transistor to generate a corresponding pulse frequency modulation signal. Next, it is determined whether the corresponding pulse frequency modulation signal has reached its maximal frequency. If so, the initial pulse width modulation signal is adjusted to have the same width as the pulse frequency modulation signal. Thereafter, the adjusted pulse width modulation signal is outputted.

Abstract: The power transistor circuit with high-voltage endurance includes a first power transistor, a second power transistor and an enabling circuit. The first power transistor includes a first voltage endurance and a first inner resistance, while the second power transistor includes a second voltage endurance and a second inner resistance. The first voltage endurance and the first inner resistance are smaller than the second voltage endurance and the second inner resistance, respectively. The drain of the second power transistor is connected to the drain of the first power transistor and the enabling circuit. The enabling circuit enables the second power transistor first, and when the drain voltage of the first power transistor is smaller than the first endurance, the enabling circuit then enables the first power transistor.

Abstract: The circuit for detecting the maximal frequency of the pulse frequency modulation includes an oscillator-controlling unit, a delay circuit and a master-slave register. The oscillator-controlling unit is connected to an oscillator, which generates the pulse frequency modulation signals, and includes a first-half pulse-generating module and a second-half pulse-generating module. The delay circuit is connected to the second-half pulse-generating module. The master-slave register includes a clock, an input end and an output end, wherein the input end is connected to the oscillator-controlling unit, and the clock is connected to the delay circuit.

Abstract: A dimming method for light emitting diodes (LEDs), which is applied in a pulse width modulation boost circuit system, includes the following steps: (a) equally dividing a cycle into a plurality of intervals; (b) providing a plurality of control signals having the cycle and a pulse duration, wherein the pulse duration of each of the control signals is sequentially generated in the cycle; and (c) using the plurality of control signals to control a plurality of corresponding switches for dimming the LEDs connected to the switches.

Abstract: A negative voltage detector includes a first n-channel transistor having a coupled gate node and drain node, a second n-channel transistor having a gate coupled to the gate of the first n-channel transistor, a first current source coupled to a drain of the first n-channel transistor, a second current source coupled to a drain of the second n-channel transistor, an output terminal coupled to the drain of the second n-channel transistor, and an input terminal coupled to a source of the first n-channel transistor. The gate voltage of the first n-channel transistor, i.e., the gate voltage of the second n-channel transistor, depends on its source voltage (the voltage of the input terminal), and the switching operation of the second n-channel transistor can be performed by controlling the voltage of the input terminal to change the output voltage of the output terminal.

Abstract: A PWM (pulse width modulation) boost system includes a boost circuit, a voltage dividing circuit, a comparator, a PWM circuit, a pre-oscillator, and a current limit circuit. A start-up method of the PWM boost system includes (1) providing an error voltage; (2) generating a PWM signal according to the error voltage; (3) controlling a switch in a boost circuit with the PWM signal, so as to control an inductor current flowing through a boost inductor in the boost circuit; (4) charging a capacitor in the boost circuit with the inductor current, wherein charges stored in the capacitor define a DC output voltage; and (5) providing a feedback voltage according to the DC output voltage to adjust the error voltage.

Abstract: A feedback signal sensing method includes the steps of: providing a pulse width modulation (PWM) signal having a period; charging a capacitor by a current source during a pulse duration of the period, so as to form an equivalent slope compensation ramp signal; conducting an inductor current flowing from a boost inductor to flow through an equivalent resistor during the pulse duration of the period, so as to form an equivalent inductor current signal; and using a coupling characteristic of the capacitor together with the equivalent slope compensation ramp signal and the equivalent inductor current signal to form a feedback signal.

Abstract: A PWM (pulse width modulation) boost system includes a boost circuit, a voltage dividing circuit, a comparator, a PWM circuit, a pre-oscillator, and a current limit circuit. A start-up method of the PWM boost system includes (1) providing an error voltage; (2) generating a PWM signal according to the error voltage; (3) controlling a switch in a boost circuit with the PWM signal, so as to control an inductor current flowing through a boost inductor in the boost circuit; (4) charging a capacitor in the boost circuit with the inductor current, wherein charges stored in the capacitor define a DC output voltage; and (5) providing a feedback voltage according to the DC output voltage to adjust the error voltage.

Abstract: A high voltage device includes a semiconductor substrate and a gate. The semiconductor substrate includes a first doped region having a first conductive type, a second doped region having a second conductive type, a third doped region having the second conductive type, a fourth doped region surrounding the third doped region and having the second conductive type, and a fifth doped region surrounding the third doped region and having the second conductive type. The gate is disposed between two spacers to separate the second doped region from the third doped region, so as to control the conduction of the second doped region and the third doped region. In the high voltage device, the fifth doped region surrounds the third doped region, so as to strengthen the coverage for the third doped region and improve the ion concentration uniformity on the bottom of the third doped region to reduce leakage current.

Abstract: A low voltage triggering silicon controlled rectifier (LVTSCR) is disclosed. The LVTSCR utilizes an added resistor disposed in a second doped region between the anode of the LVTSCR and the emitter of the parasitical bipolar PNP transistor to increase the holding voltage thereof when the LVTSCR is triggered. The LVTSCR includes a semiconductor substrate with a first conductive type and a gate. The semiconductor substrate includes a first doped region with a second conductive type, a second doped region with the first conductive type, a third doped region with the second conductive type, a fourth doped region with the second conductive type and a fifth doped region with the first conductive type. The gate is applied with a lower triggering voltage to trigger the LVTSCR.

Abstract: The present invention discloses a DC-to-DC step-up converter to which a logic control unit is added in order to reduce the ripples of a DC output voltage and improve the power quality. The converter of the present invention comprises a step-up circuit, a ring oscillator, a divider circuit, a PFM (pulse frequency modulation) comparator and a logic control unit. The step-up circuit is used to step up a source voltage to generate a DC output voltage. The ring oscillator is used to generate an oscillator output signal. The divider circuit receives the DC output voltage to generate a feedback voltage. The PFM comparator compares the feedback voltage with a reference voltage to generate a comparator output signal to control outputting of the oscillator output signal.

Abstract: A semiconductor wafer includes a wafer body, a plurality of analog IC dies spacedly and alignedly formed on the wafer body to define a scribe line as a margin formed between each two dies wherein each of the dies has an internal circuit formed therewithin and at least a terminal pad formed along the scribe line, and a conductive arrangement including at least a conductive element formed on the wafer body to electrically connect the terminal pad with the internal circuit of the die in such a manner that when the die is cut off from the wafer body along the scribe line, the terminal pad is cut off from the die so as to keep the internal circuit in the die.

Abstract: A pulse width modulation (PWM) circuit has a PWM output signal that features accurate timing even in the face of interference imposed upon the control signal representative of the desired PWM duty cycle. The PWM circuit includes or has a first or switching section and a second or analog section. The second section has an operational amplifier with a summing circuit that sums two input signals, namely a triangular wave signal and the control input signal, and then amplifies the summed signal to produce a trapezoidal waveform output delivered to the second section. The first section features a two-input comparator that produces a PWM signal output with a fast transition in response to trapezoidal output fed as an input and compared to a stable reference signal. Due to the speed of the op amp, timing errors on the PWM output signal due to interference on the control signal are minimized.

Abstract: An H bridge regulating system for driving an electric load includes a linear output stage and switch mode output stage connected to opposite ends of the load. The linear output stage has a linear mode amplifier and a feedback circuit, and its amplifier generates a first output signal tied to one end of the load. This output voltage is passed through a conditioning resistor to an inverting input of the linear mode amplifier. The switch mode output stage has a switch mode amplifier and a feedback circuit, and its amplifier generates a second output signal tied to the other end of the load. Its voltage signal is passed through a second conditioning resistor to an inverting input of the switch mode amplifier. Other feedback circuit elements are also provided to create three distinct regions of operations for each of the amplifiers.

Abstract: A laser-based optical inspection system is provided for detecting and measuring surface imperfections and warpage conditions in an optical information storage disk either during its manufacture or afterwards. The optical inspection system includes a light source, a rotatable mirror for directing a source beam from the light source along a radial line on the surface of the disk, a convex lens positioned between the mirror and the disk for focusing the source beam at the surface of said disk, and a photodetector for registering a beam being reflected from the surface of said disk, such that the reflected beam is indicative of surface imperfections in said disk. In addition, an electronic processor and controller are connected to the photodetector for processing its registered beam signals and for determining if the disk surface imperfections exceeds specified tolerances.

Abstract: A portable closable container has individually closable cells under a main lid. The container has a base with which the main lid defines an internal space. The internal space is partially filled by a plurality of side-by-side, top-to-bottom individual cells. Each of the cells is fitted with a removable cover which is hingedly mounted to the cell. The removable cover of the cell includes a tab for manipulation by the user's finger. A space is provided for a label on the cover of the cell. The components of the container are preferably composed of a polymerized material, such as polypropylene. There are two slots on the main lid which match the two feet on the base. These slots and the feet allow one container of the same kind to be stacked on the top of another without one shifting with respect to the other away from each other.