Patents Assigned to Anobit Technologies
  • Patent number: 8208304
    Abstract: A method for data storage includes accepting data for storage in a memory that includes multiple analog memory cells and supports a set of built-in programming commands. Each of the programming commands programs a respective page, selected from a group of N pages, in a subset of the memory cells. The subset of the memory cells is programmed to store M pages of the data, M>N, by performing a sequence of the programming commands drawn only from the set.
    Type: Grant
    Filed: November 15, 2009
    Date of Patent: June 26, 2012
    Assignee: Anobit Technologies Ltd.
    Inventors: Ofir Shalvi, Naftali Sommer, Uri Perlmutter, Dotan Sokolov
  • Patent number: 8209588
    Abstract: A method includes storing data in a group of analog memory cells by writing first storage values to the cells. After storing the data, second storage values are read from the cells using one or more first read thresholds. Third storage values that potentially cause cross-coupling interference in the second storage values are identified, and the third storage values are processed, to identify a subset of the second storage values as severely-interfered values. Fourth storage values are selectively re-read from the cells holding the severely-interfered values using one or more second read thresholds, different from the first read thresholds. The cross-coupling interference in the severely-interfered storage values is canceled using the re-read fourth storage values. The second storage values, including the severely-interfered values in which the cross-coupling interference has been canceled, are processed so as to reconstruct the data stored in the cell group.
    Type: Grant
    Filed: December 11, 2008
    Date of Patent: June 26, 2012
    Assignee: Anobit Technologies Ltd.
    Inventors: Uri Perlmutter, Yoav Kasorla, Oren Golov
  • Patent number: 8174905
    Abstract: A method for data storage includes predefining an order of programming a plurality of analog memory cells that are arranged in rows. The order specifies that for a given row having neighboring rows on first and second sides, the memory cells in the given row are programmed only while the memory cells in the neighboring rows on at least one of the sides are in an erased state, and that the memory cells in the given row are programmed to assume a highest programming level, which corresponds to a largest analog value among the programming levels of the cells, only after programming all the memory cells in the given row to assume the programming levels other than the highest level. Data is stored in the memory cells by programming the memory cells in accordance with the predefined order.
    Type: Grant
    Filed: March 11, 2010
    Date of Patent: May 8, 2012
    Assignee: Anobit Technologies Ltd.
    Inventors: Ofir Shalvi, Eyal Gurgi, Uri Perlmutter, Oren Golov
  • Patent number: 8174857
    Abstract: A method for data readout includes storing two or more candidate sets of read thresholds for reading from a memory device that includes a plurality of analog memory cells. A group of the memory cells from which data is to be read is identified. An order is defined among the candidate sets of the read thresholds responsively to a criterion defined over the group of the memory cells. Data readout from the group of the memory cells is attempted by iterating over the candidate sets according to the order, until the data is read successfully.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: May 8, 2012
    Assignee: Anobit Technologies Ltd.
    Inventors: Naftali Sommer, Uri Perlmutter
  • Patent number: 8169825
    Abstract: A method for data storage in a non-volatile memory includes storing data in the non-volatile memory using a first storage configuration while the non-volatile memory is supplied with electrical power. After storing the data, an indication is accepted, indicating that shut-off of the electrical power is imminent. Responsively to the indication and before the shut-off, at least some of the data is re-programmed in the non-volatile memory using a second storage configuration.
    Type: Grant
    Filed: September 1, 2009
    Date of Patent: May 1, 2012
    Assignee: Anobit Technologies Ltd.
    Inventors: Ofir Shalvi, Naftali Sommer, Barak Rotbard, Oren Golov, Micha Anholt, Uri Perlmutter
  • Patent number: 8156403
    Abstract: A method for operating a memory device (24) includes encoding data using an Error Correction Code (ECC) and storing the encoded data as first analog values in respective analog memory cells (32) of the memory device. After storing the encoded data, second analog values are read from the respective memory cells of the memory device in which the encoded data were stored. At least some of the second analog values differ from the respective first analog values. A distortion that is present in the second analog values is estimated. Error correction metrics are computed with respect to the second analog values responsively to the estimated distortion. The second analog values are processed using the error correction metrics in an ECC decoding process, so as to reconstruct the data.
    Type: Grant
    Filed: May 10, 2007
    Date of Patent: April 10, 2012
    Assignee: Anobit Technologies Ltd.
    Inventors: Ofir Shalvi, Naftali Sommer, Ariel Maislos, Dotan Sokolov
  • Patent number: 8156398
    Abstract: A method for operating a memory, which includes analog memory cells, includes encoding data with an Error Correction Code (ECC) that is representable by a plurality of equations. The encoded data is stored in a group of the analog memory cells by writing respective input storage values to the memory cells in the group. Multiple sets of output storage values are read from the memory cells in the group using one or more different, respective read parameters for each set. Numbers of the equations, which are satisfied by the respective sets of the output storage values, are determined. A preferred setting of the read parameters is identified responsively to the respective numbers of the satisfied equations. The memory is operated on using the preferred setting of the read parameters.
    Type: Grant
    Filed: February 3, 2009
    Date of Patent: April 10, 2012
    Assignee: Anobit Technologies Ltd.
    Inventor: Naftali Sommer
  • Patent number: 8151166
    Abstract: A method for operating a memory that includes multiple analog memory cells includes storing data in the memory by writing first storage values to the cells, so as to cause the cells to hold respective electrical charge levels. After storing the data, second storage values are read from at least some of the cells, including at least one interfered cell that belongs to a group of cells. A Back Pattern Dependency (BPD) distortion caused by the electrical charge levels of one or more interfering cells in the group to at least one of the second storage values read from the at least one interfered cell is detected and canceled. The second storage values, including the at least one of the second storage values in which the BPD distortion was canceled, are processed so as to reconstruct the data.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: April 3, 2012
    Assignee: Anobit Technologies Ltd.
    Inventors: Ofir Shalvi, Zeev Cohen
  • Patent number: 8151163
    Abstract: A method for storing data in a memory (28) that includes analog memory cells (32) includes identifying one or more defective memory cells in a group of the analog memory cells. An Error Correction Code (ECC) is selected responsively to a characteristic of the identified defective memory cells. The data is encoded using the selected ECC and the encoded data is stored in the group of the analog memory cells. In an alternative method, an identification of one or more defective memory cells among the analog memory cells is generated. Analog values are read from the analog memory cells in which the encoded data were stored, including at least one of the defective memory cells. The analog values are processed using an ECC decoding process responsively to the identification of the at least one of the defective memory cells, so as to reconstruct the data.
    Type: Grant
    Filed: December 3, 2007
    Date of Patent: April 3, 2012
    Assignee: Anobit Technologies Ltd.
    Inventors: Ofir Shalvi, Dotan Sokolov
  • Patent number: 8145984
    Abstract: A method for operating a memory (28) includes storing data, which is encoded with an Error Correction Code (ECC), in analog memory cells (32) of the memory by writing respective analog input values selected from a set of nominal values to the analog memory cells. The stored data is read by performing multiple read operations that compare analog output values of the analog memory cells to different, respective read thresholds so as to produce multiple comparison results for each of the analog memory cells. At least two of the read thresholds are positioned between a pair of the nominal values that are adjacent to one another in the set of the nominal values. Soft metrics are computed responsively to the multiple comparison results. The ECC is decoded using the soft metrics, so as to extract the data stored in the analog memory cells.
    Type: Grant
    Filed: May 24, 2011
    Date of Patent: March 27, 2012
    Assignee: Anobit Technologies Ltd.
    Inventors: Naftali Sommer, Ofir Shalvi, Dotan Sokolov
  • Patent number: 8085586
    Abstract: A method for operating a memory includes applying at least one pulse to a group of analog memory cells, so as to cause the memory cells in the group to assume respective storage values. After applying the pulse, the respective storage values are read from the memory cells in the group. One or more statistical properties of the read storage values are computed. A wear level of the group of the memory cells is estimated responsively to the statistical properties.
    Type: Grant
    Filed: December 25, 2008
    Date of Patent: December 27, 2011
    Assignee: Anobit Technologies Ltd.
    Inventors: Oren Golov, Eyal Gurgi, Dotan Sokolov, Yoav Kasoria, Shai Winter
  • Patent number: 8068360
    Abstract: A method for data storage includes storing data in a memory that includes multi-bit analog memory cells, each of which stores at least first and second data bits by assuming one of a predefined plurality of programming levels associated with respective storage values. The memory has at least a first built-in command for reading the first data bits of the memory cells by comparing the storage values of the memory cells to a first number of first thresholds, and a second built-in command for reading the second data bits of the memory cells by comparing the storage values of the memory cells to a second number of second thresholds, such that the first number is less than the second number. After storing the data, the first data bits are read from the memory cells by executing at least the second built-in command.
    Type: Grant
    Filed: July 23, 2008
    Date of Patent: November 29, 2011
    Assignee: Anobit Technologies Ltd.
    Inventor: Micha Anholt
  • Patent number: 8060806
    Abstract: A method for operating a memory (24) includes storing data in analog memory cells (32) of the memory by writing respective analog values to the analog memory cells. A set of the analog memory cells is identified, including an interfered cell having a distortion that is statistically correlated with the respective analog values of the analog memory cells in the set. A mapping is determined between combinations of possible analog values of the analog memory cells in the set and statistical characteristics of composite distortion levels present in the interfered memory cell. The mapping is applied so as to compensate for the distortion in the interfered memory cell.
    Type: Grant
    Filed: August 27, 2007
    Date of Patent: November 15, 2011
    Assignee: Anobit Technologies Ltd.
    Inventors: Ofir Shalvi, Naftali Sommer, Eyal Gurgi, Oren Golov, Dotan Sokolov
  • Patent number: 8059457
    Abstract: A method for data storage includes defining at least first and second read commands for reading storage values from analog memory cells. The first read command reads the storage values at a first accuracy, and the second read command reads the storage values at a second accuracy, which is finer than the first accuracy. A condition is evaluated with respect to a read operation that is to be performed over a given group of the memory cells. One of the first and second read commands is selected responsively to the evaluated condition. The storage values are read from the given group of the memory cells using the selected read command.
    Type: Grant
    Filed: March 17, 2009
    Date of Patent: November 15, 2011
    Assignee: Anobit Technologies Ltd.
    Inventors: Uri Perlmutter, Ofir Shalvi, Yoav Kasorla, Naftali Sommer, Dotan Sokolov
  • Patent number: 8050086
    Abstract: A method for operating a memory (28) includes storing data in a group of analog memory cells (32) of the memory as respective first voltage levels. After storing the data, second voltage levels are read from the respective analog memory cells. The second voltage levels are affected by cross-coupling interference causing the second voltage levels to differ from the respective first voltage levels. Cross-coupling coefficients, which quantify the cross-coupling interference among the analog memory cells, are estimated by processing the second voltage levels. The data stored in the group of analog memory cells is reconstructed from the read second voltage levels using the estimated cross-coupling coefficients.
    Type: Grant
    Filed: May 10, 2007
    Date of Patent: November 1, 2011
    Assignee: Anobit Technologies Ltd.
    Inventors: Ofir Shalvi, Naftali Sommer, Eyal Gurgi, Ariel Maislos
  • Patent number: 8001320
    Abstract: A method for operating a memory device that includes a plurality of analog memory cells includes accepting at an input of the memory device a self-contained command to perform a memory access operation on at least one of the memory cells. The command includes an instruction specifying the memory access operation and one or more parameters that are indicative of analog settings to be applied to the at least one of the memory cells when performing the memory access operation. The self-contained command is executed in the memory device by extracting the parameters, applying the analog settings to the at least one of the memory cells responsively to the extracted parameters, and performing the specified memory access operation in accordance with the instruction on the at least one of the memory cells using the settings.
    Type: Grant
    Filed: March 10, 2008
    Date of Patent: August 16, 2011
    Assignee: Anobit Technologies Ltd.
    Inventors: Dotan Sokolov, Naftali Sommer
  • Patent number: 8000141
    Abstract: A method for data storage includes storing data in a group of analog memory cells by writing respective first storage values into the memory cells. After storing the data, respective second storage values are read from the memory cells. A subset of the memory cells, in which the respective second storage values have drifted below a minimum readable value, is identified. The memory cells in the subset are operated on, so as to cause the second storage values of at least one of the memory cells in the subset to exceed the minimum readable value. At least the modified second storage values are re-read so as to reconstruct the stored data.
    Type: Grant
    Filed: October 15, 2008
    Date of Patent: August 16, 2011
    Assignee: Anobit Technologies Ltd.
    Inventors: Ofir Shalvi, Naftali Sommer
  • Patent number: 8000135
    Abstract: A method for data storage includes storing data in a group of analog memory cells by writing into the memory cells in the group respective storage values, which program each of the analog memory cells to a respective programming state selected from a predefined set of programming states. The programming states include at least first and second programming states, which are applied respectively to first and second subsets of the memory cells, whereby the storage values held in the memory cells in the first and second subsets are distributed in accordance with respective first and second distributions. Respective first and second medians of the first and second distributions are estimated, and a read threshold is calculated based on the first and second medians. The data is retrieved from the analog memory cells in the group by reading the storage values using the calculated read threshold.
    Type: Grant
    Filed: September 13, 2009
    Date of Patent: August 16, 2011
    Assignee: Anobit Technologies Ltd.
    Inventors: Uri Perlmutter, Shai Winter, Eyal Gurgi, Oren Golov, Micha Anholt
  • Patent number: 7995388
    Abstract: A method for data storage includes storing data in a target analog memory cell, which is one of a group of analog memory cells that are connected in series with one another, by writing an input storage value into the target memory cell. A first read operation, which reads a first output storage value from the target memory cell while biasing the other memory cells with respective first pass voltages, is applied to the target memory cell. A second read operation, which reads a second output storage value from the target memory cell while biasing the other memory cells with respective second pass voltages, is applied to the target memory cell. At least one of the second pass voltages is different from a respective first pass voltage. The data is reconstructed responsively to the first and second output storage values.
    Type: Grant
    Filed: August 4, 2009
    Date of Patent: August 9, 2011
    Assignee: Anobit Technologies Ltd.
    Inventors: Shai Winter, Ofir Shalvi
  • Patent number: 7975192
    Abstract: A method for operating a memory (28) includes storing data, which is encoded with an Error Correction Code (ECC), in analog memory cells (32) of the memory by writing respective analog input values selected from a set of nominal values to the analog memory cells. The stored data is read by performing multiple read operations that compare analog output values of the analog memory cells to different, respective read thresholds so as to produce multiple comparison results for each of the analog memory cells. At least two of the read thresholds are positioned between a pair of the nominal values that are adjacent to one another in the set of the nominal values. Soft metrics are computed responsively to the multiple comparison results. The ECC is decoded using the soft metrics, so as to extract the data stored in the analog memory cells.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: July 5, 2011
    Assignee: Anobit Technologies Ltd.
    Inventors: Naftali Sommer, Ofir Shalvi, Dotan Sokolov