Patents Assigned to Anobit Technologies
  • Patent number: 7924648
    Abstract: A method for storage includes collecting information regarding respective performance characteristics of a plurality of memory units in a memory array, each memory unit including one or more cells of the memory array. When data are received for storage in the memory array, a memory unit is selected responsively to the respective performance characteristics, and the received data are stored in the selected memory unit.
    Type: Grant
    Filed: November 27, 2007
    Date of Patent: April 12, 2011
    Assignee: Anobit Technologies Ltd.
    Inventors: Dotan Sokolov, Ofir Shalvi
  • Patent number: 7924613
    Abstract: A method for data storage includes storing first data in analog memory cells using a first programming operation, which writes to the memory cells respective analog values representing respective bit values of the first data. Second data is stored in the analog memory cells in addition to the first data using a second programming operation, which modifies the respective analog values of the memory cells so as to represent bit value combinations of the first and second data. The first and second programming operations are defined such that, at all times during the second programming operation, the analog value of each memory cell remains unambiguously indicative of the respective bit value of the first data stored in that memory cell.
    Type: Grant
    Filed: July 6, 2009
    Date of Patent: April 12, 2011
    Assignee: Anobit Technologies Ltd.
    Inventors: Naftali Sommer, Shai Winter, Ofir Shalvi
  • Patent number: 7925936
    Abstract: A method for storing data in a memory, which includes a plurality of analog memory cells, includes defining programming levels that represent respective combinations of at least first and second bits and are represented by respective nominal storage values. The data is stored by mapping the data to storage values selected from among the nominal storage values and writing the storage values to the memory cells. A condition is defined over two or more bit-specific error rates applicable respectively to at least the first and second bits. The bit-specific error rates include a first bit-specific error rate computed over the data stored by the first bits and a second bit-specific error rate computed, separately from the first bit-specific error rate, over the data stored by the second bits. The nominal storage values are set based on the bit-specific error rates so as to meet the condition.
    Type: Grant
    Filed: July 11, 2008
    Date of Patent: April 12, 2011
    Assignee: Anobit Technologies Ltd.
    Inventor: Naftali Sommer
  • Patent number: 7924587
    Abstract: A method for data storage in analog memory cells includes defining multiple programming states for storing data in the analog memory cells. The programming states represent respective combinations of more than one bit and correspond to respective, different levels of a physical quantity stored in the memory cells. The data is stored in the memory cells by applying to the memory cells programming pulses that cause the levels of the physical quantity stored in the memory cells to transition between the programming states, such that a given transition is caused by only a single programming pulse.
    Type: Grant
    Filed: February 19, 2009
    Date of Patent: April 12, 2011
    Assignee: Anobit Technologies Ltd.
    Inventors: Uri Perlmutter, Shai Winter, Ofir Shalvi, Eyal Gurgi, Naftali Sommer, Oren Golov
  • Patent number: 7900102
    Abstract: A method for operating a memory that includes a plurality of analog memory cells includes storing data in a first group of the memory cells by writing respective first cell values to the memory cells in the first group. After storing the data, respective second cell values are read from the memory cells in the first group, and differences are found between the respective first and second cell values for each of one or more of the memory cells in the first group. The differences are processed to produce error information, and the error information is stored in a second group of the memory cells.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: March 1, 2011
    Assignee: Anobit Technologies Ltd.
    Inventors: Dotan Sokolov, Ofir Shalvi
  • Patent number: 7881107
    Abstract: A method for data storage in a memory that includes a plurality of analog memory cells includes storing data in the memory by writing first storage values to the cells. One or more read reference levels are defined for reading the cells, such that at least one of the read reference levels is negative. After storing the data, second storage values are read from the cells using the read reference levels, so as to reconstruct the stored data. In another disclosed method, data is stored in the memory by mapping the data to first storage values selected from a set of the nominal storage values, and writing the first storage values to the cells. The set of nominal storage values is defined such that at least one of the nominal storage values is negative.
    Type: Grant
    Filed: April 12, 2010
    Date of Patent: February 1, 2011
    Assignee: Anobit Technologies Ltd.
    Inventor: Ofir Shalvi
  • Patent number: 7864573
    Abstract: A method includes defining a nominal level of a physical quantity to be stored in analog memory cells for representing a given data value. The given data value is written to the cells in first and second groups of the cells, which have respective first and second programming responsiveness such that the second responsiveness is different from the first responsiveness, by applying to the cells in the first and second groups respective, different first and second patterns of programming pulses that are selected so as to cause the cells in the first and second groups to store respective levels of the physical quantity that fall respectively in first and second ranges, such that the first range is higher than and the second range is lower than the nominal level. The given data value is read from the cells at a later time.
    Type: Grant
    Filed: February 23, 2009
    Date of Patent: January 4, 2011
    Assignee: Anobit Technologies Ltd.
    Inventors: Uri Perlmutter, Ofir Shalvi
  • Patent number: 7821826
    Abstract: A method for operating a memory (20) includes storing analog values in an array of analog memory cells (22), so that each of the analog memory cells holds an analog value corresponding to at least first and second respective bits. A first indication of the analog value stored in a given analog memory cell is obtained using a first set of sampling parameters. A second indication of the analog value stored in the given analog memory cell is obtained using a second set of sampling parameters, which is dependent upon the first indication. The first and second respective bits are read out from the given analog memory cell responsively to the first and second indications.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: October 26, 2010
    Assignee: Anobit Technologies, Ltd.
    Inventors: Ofir Shalvi, Naftali Sommer
  • Patent number: 7773413
    Abstract: A method for data storage includes programming a first group of analog memory cells at a first time at a known first temperature, so as to cause the analog memory cells in the first group to assume respective first analog storage values. Respective second analog storage values are read from the analog memory cells in the first group at a second time at which the analog memory cells are at a second temperature. A shift is estimated between the first analog storage values and the second analog storage values, and a memory access parameter is adjusted responsively to the estimated shift. A second group of the analog memory cells is accessed at the second temperature using the adjusted memory access parameter.
    Type: Grant
    Filed: October 5, 2008
    Date of Patent: August 10, 2010
    Assignee: Anobit Technologies Ltd.
    Inventor: Ofir Shalvi
  • Patent number: 7751240
    Abstract: A method for data storage in a memory that includes a plurality of analog memory cells includes storing data in the memory by writing first storage values to the cells. One or more read reference levels are defined for reading the cells, such that at least one of the read reference levels is negative. After storing the data, second storage values are read from the cells using the read reference levels, so as to reconstruct the stored data. In another disclosed method, data is stored in the memory by mapping the data to first storage values selected from a set of the nominal storage values, and writing the first storage values to the cells. The set of nominal storage values is defined such that at least one of the nominal storage values is negative.
    Type: Grant
    Filed: January 24, 2008
    Date of Patent: July 6, 2010
    Assignee: Anobit Technologies Ltd.
    Inventor: Ofir Shalvi
  • Publication number: 20100131826
    Abstract: A method for operating a memory (24) includes storing data in analog memory cells (32) of the memory by writing respective analog values to the analog memory cells. A set of the analog memory cells is identified, including an interfered cell having a distortion that is statistically correlated with the respective analog values of the analog memory cells in the set. A mapping is determined between combinations of possible analog values of the analog memory cells in the set and statistical characteristics of composite distortion levels present in the interfered memory cell. The mapping is applied so as to compensate for the distortion in the interfered memory cell.
    Type: Application
    Filed: August 27, 2007
    Publication date: May 27, 2010
    Applicant: Anobit Technologies Ltd.
    Inventors: Ofir Shalvi, Naftali Sommer, Eyal Gurgi, Oren Golov, Dotan Sokolov
  • Publication number: 20100115376
    Abstract: A method for storing data in a memory (28) that includes analog memory cells (32) includes identifying one or more defective memory cells in a group of the analog memory cells. An Error Correction Code (ECC) is selected responsively to a characteristic of the identified defective memory cells. The data is encoded using the selected ECC and the encoded data is stored in the group of the analog memory cells. In an alternative method, an identification of one or more defective memory cells among the analog memory cells is generated. Analog values are read from the analog memory cells in which the encoded data were stored, including at least one of the defective memory cells. The analog values are processed using an ECC decoding process responsively to the identification of the at least one of the defective memory cells, so as to reconstruct the data.
    Type: Application
    Filed: December 3, 2007
    Publication date: May 6, 2010
    Applicant: Anobit Technologies Ltd.
    Inventors: Ofir Shalvi, Dotan Sokolov
  • Publication number: 20100110787
    Abstract: A method for operating a memory (20) includes storing analog values in an array of analog memory cells (22), so that each of the analog memory cells holds an analog value corresponding to at least first and second respective bits. A first indication of the analog value stored in a given analog memory cell is obtained using a first set of sampling parameters. A second indication of the analog value stored in the given analog memory cell is obtained using a second set of sampling parameters, which is dependent upon the first indication. The first and second respective bits are read out from the given analog memory cell responsively to the first and second indications.
    Type: Application
    Filed: October 30, 2007
    Publication date: May 6, 2010
    Applicant: Anobit Technologies Ltd.
    Inventors: Ofir Shalvi, Naftali Sommer
  • Patent number: 7706182
    Abstract: A method for storing data in a memory that includes a plurality of analog memory cells includes mapping the data to programming values, which are selected from a set of nominal programming values. The set of nominal programming values includes at least a first nominal programming value and a second nominal programming value, which is higher than the first nominal programming value. A part of the data is stored in the analog memory cells by programming at least a first group of the cells using the first nominal programming value. A statistical characteristic of the first group of the cells is measured after programming the first group of the cells using the first nominal programming value. The second nominal programming value is modified responsively to the statistical characteristic, and at least a second group of the cells is programmed using the modified second nominal programming value.
    Type: Grant
    Filed: December 3, 2007
    Date of Patent: April 27, 2010
    Assignee: Anobit Technologies Ltd.
    Inventors: Ofir Shalvi, Zeev Cohen, Dotan Sokolov
  • Patent number: 7697326
    Abstract: A method for storing data in an array (28) of analog memory cells (32) includes defining a constellation of voltage levels (90A, 90B, 90C, 90D) to be used in storing the data. A part of the data is written to a first analog memory cell in the array by applying to the analog memory cell a first voltage level selected from the constellation. After writing the part of the data to the first analog memory cell, a second voltage level that does not belong to the constellation is read from the first analog memory cell. A modification to be made in writing to one or more of the analog memory cells in the array is determined responsively to the second voltage level, and data are written to the one or more of the analog memory cells subject to the modification.
    Type: Grant
    Filed: May 10, 2007
    Date of Patent: April 13, 2010
    Assignee: Anobit Technologies Ltd.
    Inventors: Naftali Sommer, Ofir Shalvi
  • Patent number: 7593263
    Abstract: A method for data storage includes providing a memory, which includes first memory cells having a first reading latency and second memory cells having a second reading latency that is higher than the first reading latency. An item of data intended for storage in the memory is divided into first and second parts. The first part is stored in the first memory cells and the second part is stored in the second memory cells. In response to a request to retrieve the item of data from the memory, the first part is read from the first memory cells and provided as output. The second part is read from the second memory cells, and provided as output subsequently to outputting the first part.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: September 22, 2009
    Assignee: Anobit Technologies Ltd.
    Inventors: Dotan Sokolov, Gil Semo, Ofir Shalvi
  • Publication number: 20090168524
    Abstract: A method for operating a memory includes applying at least one pulse to a group of analog memory cells, so as to cause the memory cells in the group to assume respective storage values. After applying the pulse, the respective storage values are read from the memory cells in the group. One or more statistical properties of the read storage values are computed. A wear level of the group of the memory cells is estimated responsively to the statistical properties.
    Type: Application
    Filed: December 25, 2008
    Publication date: July 2, 2009
    Applicant: Anobit Technologies Ltd.
    Inventors: Oren Golov, Eyal Gurgi, Dotan Sokolov, Yoav Kasorla, Shai Winter
  • Publication number: 20090103358
    Abstract: A method for storing data in an array (28) of analog memory cells (32) includes defining a constellation of voltage levels (90A, 90B, 90C, 90D) to be used in storing the data. A part of the data is written to a first analog memory cell in the array by applying to the analog memory cell a first voltage level selected from the constellation. After writing the part of the data to the first analog memory cell, a second voltage level that does not belong to the constellation is read from the first analog memory cell. A modification to be made in writing to one or more of the analog memory cells in the array is determined responsively to the second voltage level, and data are written to the one or more of the analog memory cells subject to the modification.
    Type: Application
    Filed: May 10, 2007
    Publication date: April 23, 2009
    Applicant: Anobit Technologies Ltd.
    Inventors: Naftali Sommer, Ofir Shalvi
  • Publication number: 20090043951
    Abstract: A method for data storage includes storing first data bits in a set of multi-bit analog memory cells at a first time by programming the memory cells to assume respective first programming levels. Second data bits are stored in the set of memory cells at a second time that is later than the first time by programming the memory cells to assume respective second programming levels that depend on the first programming levels and on the second data bits. A storage strategy is selected responsively to a difference between the first and second times. The storage strategy is applied to at least one group of the data bits, selected from among the first data bits and the second data bits.
    Type: Application
    Filed: August 6, 2008
    Publication date: February 12, 2009
    Applicant: Anobit Technologies Ltd.
    Inventors: Ofir Shalvi, Naftali Sommer, Dotan Sokolov, Yoav Kasorla
  • Publication number: 20090024905
    Abstract: A method for operating a memory device (24) includes encoding data using an Error Correction Code (ECC) and storing the encoded data as first analog values in respective analog memory cells (32) of the memory device. After storing the encoded data, second analog values are read from the respective memory cells of the memory device in which the encoded data were stored. At least some of the second analog values differ from the respective first analog values. A distortion that is present in the second analog values is estimated. Error correction metrics are computed with respect to the second analog values responsively to the estimated distortion. The second analog values are processed using the error correction metrics in an ECC decoding process, so as to reconstruct the data.
    Type: Application
    Filed: May 10, 2007
    Publication date: January 22, 2009
    Applicant: Anobit Technologies Ltd.
    Inventors: Ofir Shalvi, Naftali Sommer, Ariel Maislos, Dotan Sokolov