Abstract: A heat sink and spring clip assembly for removing heat from an electronic module and for holding the heat sink and electronic module to a circuit board, with the heat sink having a finned top surface, and a flat bottom surface larger than the electronic module for holding the electronic module between the bottom surface and the circuit board, with the bottom surface also having a downward extending leg at each corner, each leg ending with a foot for resting on the circuit board and holding the heat sink a fixed distance above the circuit board, and the spring clip for holding the heat sink to the circuit board having a substantially rectangular frame with two opposing torsion bar sides and two opposing leaf spring sides, the sides connected at four corners, and each corner having a downward extending leg with a latching notch for latching into a latching hole in the circuit board when the spring clip is pressed down over the heat sink and the leaf spring sides are compressed.

Abstract: A data structure is disclosed in which stored objects in a computer system can be extended. The data structure contains a header containing encapsulation information related to the stored object, data describing the essential elements of the object, and at least one subobject extending the description of the object. Header information includes metafile identification, version and revision numbers, endian code information as to the ordering significance of the stored data and a table of contents. Encapsulation information describes the size and type of the individual objects. Essential elements and extensibility data permit additional attribute information to be used and shared among applications which utilize the object.

Abstract: The invention is a method and apparatus for conditionally nullifying a current instruction based on a first test value where the first test value can be set in one or more prior instructions and where the execution of the current instruction can set a second test value without affecting the first test value. The one or more prior instructions which set the first test value need not immediately precede the current instruction. In a preferred embodiment, a test value comprises multiple bits, each bit capable of representing a unique state. A mask is provided to select the bits which are being tested. Also, means are provided for specifying an logical operation to be performed on the test values. The invention permits multiple status test results to be saved and concurrently tested in a single branch instruction.

Abstract: An improved ring oscillator in which frequency drift is controlled to provide reasonable accuracy is disclosed. The improved ring oscillator eliminates the frequency drift due processing variances. The ring oscillator provided by the invention incurs substantially less frequency drift than a conventional ring oscillator, but the frequency of the ring oscillator is still dependent on temperature and voltage changes. The improved ring oscillator according to the invention is particularly suited for operating as a localized oscillator that is used to facilitate periodic refreshing of DRAM within a computer.

Abstract: An address bus arbiter is implemented using a state machine. A first through third states of the state machine grant the address bus to a respective first through third bus masters, each having a different priority associated therewith. Idle states are interposed between states. The idle state may be reached from one the bus grant states when a cache controller initiates a tag invalidation cycle or a cache allocation cycle. The idle state may also be reached when a first bus master commences a transaction cycle with a second bus master.

Abstract: The present invention provides an interrupt register for handling interrupt requests received from external devices at a common interrupt terminal of a CPU. The invention provides inputs, outputs, and storage means as part of the interrupt register. The interrupt register inputs and outputs are used for communication with both the external devices and CPU to prevent mishandling of the interrupt requests.

Abstract: The present invention is directed to improving the time with which information transfer signals can be generated in response to an initiating signal. Exemplary embodiments are described in the context of a small computer system interface, wherein enhanced operation is achieved by producing a response signal, such as an acknowledge signal, in close proximity to receipt of an initiating signal, such as a request signal. Further, exemplary embodiments achieve such improved operation without the use of complex circuitry; rather, relatively simple latching circuitry is provided in accordance with the present invention to substantially increase overall operating efficiency.

Abstract: A method for improved recursive pitch prediction includes providing a search window for pitch estimates based upon a previously computed pitch, computing pitch estimates for the search window, and determining an optimal pitch from the pitch estimates within the search window for a first predetermined number of frames. The method further includes expanding the search window to a full pitch window after the first predetermined number of frames, and calculating pitch estimates for the full pitch window for a second predetermined number of frames.A system for improved recursive pitch prediction includes a speech generator of speech signals, and a central processing unit coupled to the speech generator.

Abstract: Systems and methods which provide a minimized address tenure to create more efficient memory transactions where the address is not needed for longer than the initial clock cycle in which it is used are described. The exceptions, for example, wherein the address is needed later during the transaction to perform a cache operation, are handled by reasserting the address using the cache controller. In this way, memory transactions are made more efficient but without the use of external latches conventionally used to preserve the deasserted address.

Abstract: A personal computer includes an outer wall having plug receptacles adapted to receive the plug-in cables of peripheral equipment such as keyboards, modems, printers, etc. The outer wall carries a comb element which forms a row of slots into which respective cables can be inserted. The slots serve to organize the cables which otherwise would tend to lay haphazardly on the computer support surface. A cover is pivotably mounted on the outer wall to extend across the slots. A cover extension can be snapped onto the cover to cover the plug receptacles.

Abstract: A system for estimating block motion from a previous frame to a current frame, wherein motion vectors have been computed for blocks in the previous frame. The system comprises a P-checkerboard processor, an S-checkerboard processor and a block matching engine. The a P-checkerboard processor selects a first current block from a primary checkerboard pattern, retrieves motion vectors for reference blocks in the previous frame, and uses the retrieved motion vectors to generate a temporal search window. The block matching engine locates in the temporal search window a block which best matches the first current block, and determines the current motion vector from the best matching block to the first current block. Alternatively, the a P-checkerboard processor can use the retrieved motion vectors to interpolate the current motion vector. The S-checkerboard processor selects a second current block from a secondary checkerboard pattern, and uses the current motion vector to generate a spatial dynamic search window.

Abstract: An apparatus for and method of controlling data transfers in which the data is in a predefined format. The DMA controller with a status register cooperates with a counter capable of effecting a change in the contents of the status register to generate predefined leading sequences of pulses. The arrangement may also include a module which can detect a predefined trailing sequence and effect a change in the contents of the status register.

Abstract: A user interface provides, in a fixed screen display, for both decoupling head and body turning and for integrating them without the need for specialized equipment. Using successive synchronized viewport and contained display image movement steps, the present invention first cues the user that their body is facing in the same direction as their head. Then, by simulating the head-turn/body-turn process that humans follow when looking around for something, the invention cues the user to understand that when they look around, they are turning first their head and then their body.

Abstract: A document-centered user interface architecture for a computer system employs parts as the fundamental building blocks of all documents. All data is stored in the system as a part, which is comprised of contents and an associated editor. The contents and the functionality of the editor are available to the user wherever the part is located, whether in a document, on a desktop or in a folder. Parts function as containers for other parts, thereby facilitating the compilation and editing of multimedia or compound documents.

Abstract: An apparatus and method to accomodate a card designed to operate, with an alternate bus standard within a computer designed to operate with a primary bus standard, where the primary bus standard and the alternate bus standard are not directly compatible. The card is designed to fit within the computer in the available physical space and to connect to a card connector as required for the primary bus. However, the card is designed to be electrically compatible with the alternate bus standard. In a preferred embodiment the card draws power and any other signals, perhaps including clock, that are useful to both bus standards, but the address, data and control bus signals for the alternate bus are delivered to the card through an independent channel. This independent channel can be a separate connector to carry any signals needed for the alternate bus standard, which according to the application may or may not repeat signals already available through the primary bus.

Abstract: A multipiece housing is provided having a mid bucket, an aft bucket secured to the mid bucket, and a replaceable lid fastened to the aft bucket having a thermal vent. The replaceable lid includes a plurality of posts. The posts are inserted against an inner wall of the aft bucket to position and fasten the replaceable lid to the top of aft bucket during assembly. The replaceable lid also includes snap features that clip onto an edge of the mid bucket to further secure the replaceable lid to the bucket. If another replaceable lid having a thermal vent with a different ventilation capacity is desired, a different replaceable lid having a different thermal vent is simply fastened to the same monitor housing.

Abstract: A computer system comprises a plurality of nodes interconnected by point-to-point links and forms a serial bus. Upon system initialization, the bus is scanned and device-specific identification information is retrieved from command and status configuration ROMs associated with each of the plurality of nodes. In one embodiment, a search routine is used to retrieve the device specific information. The search routine begins with the definition of an iterator which is used as a place holder during the search. A simple search begins at the root directory of a hierarchical tree data structure and continues until all directories within the tree have been searched. In more complex embodiments, search relationships (i.e., direction) parameters are defined. Search criteria such as node spec.sub.-- ID and software version numbers are specified and the search is commenced. The search continues until all matching device specific information entries have been returned.

Abstract: A method for providing objects to a rendering circuit. The method comprises the steps of: generating an active list, the active including a first subset of the objects; accessing the first subset of objects from the first memory; storing the first subset of objects in a second memory, the second memory having a faster access time than the first memory, and providing the active list to the rendering circuit.

Abstract: A method and system eliminates visible quantizing artifacts in a digital image. The present invention eliminates visible artifacts by determining a function descriptive of a noise model for an input source of image data, utilizing a critical noise/quantizing factor in conjunction with the noise model function to determine a quantization function, and deriving optimum coding for the image data from the quantization function to produce digital image data lacking visible quantization artifacts. The critical noise/quantizing factor is a constant value found to be a value of 3/8. The present invention further includes deriving inverse coding for the optimum coding to allow processing of the digital image.

Abstract: Methods, apparatus and computer program products adjust display attributes of hierarchically arranged objects to simulate the user navigating through the objects in three dimensions. Objects in the same level of the hierarchy are displayed in a size different from objects on other levels of the hierarchy to simulate the objects on each level being on a different plane, one behind another. Each object's child objects are displayed clustered around the projection of the object into the plane of the child objects to graphically display the parent-child relationship. As the user navigates into the objects, the objects grow in size to simulate the user moving closer to them. The cluster of child objects spreads out from the projection of the parent at a different rate than the objects grow in size to allow for easier navigation among the objects and to allow additional objects that are descended from the child objects to be displayed clustered around their respective parent objects.