Abstract: The embedding of parts within one another, and synchronization of their various views, is implemented by means of a data structure consisting of two major components. One component, a display list, comprises a list of frames, or other container structures, in which a part of interest is displayed. The second component of the data structure is a proxy run, run identifies each part that is embedded in the part of interest. Together, these two data components define a matrix structure, in which there is a row for each embedded frame in a part, and a column for each frame within which the part is displayed, or vice versa. This structure provides a mechanism to keep the size and shape of corresponding embedded frames, which are displayed in different views, synchronized with one another.

Abstract: A method involving computer-mediated linguistic analysis of online technical documentation to extract and catalog from the documentation knowledge essential to, for example, creating a online help database useful in providing online assistance to users in performing a task. The method comprises stripping markup tags from the documentation, linguistically analyzing and annotating the text, including the steps of morphologically and lexically analyzing the text, disambiguating between possible parts-of-speech for each word, and syntactically analyzing and labeling each word.

Abstract: An intelligent communications coprocessor connects computer workstations to moderate-bandwidth (up to 2 megabits/second) digital communications services. In particular, such communications services include but are not limited to Integrated Services Digital Network (ISDN) or Private-Branch Exchange (PBX) communications facilities. The communications coprocessor takes advantage of certain host resources including, preferably, signal processing capabilities of the computer, the computer's power supply and a generalized, high-speed computer/ peripheral serial interface. System cost for digital communications over such communications facilities is therefore reduced. Furthermore, the communications coprocessor can be used to support the transmission of arbitrary real-time, synchronous data streams as encountered in voice and video transmission services. This capability is required for many applications including voice recognition, text-to-speech, and videoconferencing.

Abstract: A method and apparatus for marking audio data as it is recorded, and a user interface for the audio data in a computerized system, is disclosed. A recorder, such as a tape recorder, having a plurality of marker buttons is provided. The audio data is recorded on one channel of a magnetic tape. Any time one of the marker buttons is pressed, a distinct tone is recorded on another channel of the tape as a marker. The audio data and markers are then transferred to the computer system. The user interface provides a graphical display of the audio data, and provides graphical markers which correspond to the marker buttons on the recorder. The audio data can be accessed at any random point, including a point marked by a marker. Without changing modes, a user can access the data at any random point, stop play, select a new point to initiate playback and restart playback, and change the speed of playback.

Abstract: In a synthetic speech system intonation of a natural utterance is automatically applied to a synthesized utterance. The present invention applies the desired intonation of the natural utterance to the synthesized utterance by aligning voicing sections of the natural utterance to the synthesized utterance. The voicing sections are initially delineated by voiced versus unvoiced, based on default voicing specifications for the synthetic utterance and on pitch tracker analysis of the natural utterance, and an attempt is made to align individual sections thereby. If no initial alignment occurs then a further attempt is made by varying the default voicing specifications of the synthesized utterance. If alignment is still not achieved, then each of the utterances, natural and synthetic, is considered a single large voicing section, which thus forces alignment therebetween.

Abstract: A statistical classifier is trained in a manner to remove biasing due to unequal frequencies of unigram priors. The relative frequencies of all classes in a training set of sample patterns is determined. Training patterns are then selected from the set and skipped or repeated in dependence upon the relative frequency of the class to which they belong. In this manner, the presentation of samples is balanced across the classes.

Abstract: A system and method for maximizing the use of threads in a file server process for processing requests received from entities on a network. The file server process includes a first socket and a plurality of second sockets for receiving requests from entities on a network. The file server process comprises a first queue for storing requests received from the first socket, and a second queue for storing requests received from the plurality of second sockets. The file server processes the requests in the first queue with a first set of threads, and processes the requests in the second queue with a second set of threads.

Abstract: A method and apparatus for lossless compression and decompression of video image data. Video data is comprised of the RGB, YUV or gray scale (color) information for each pixel of each frame of the video data. Storage of such video data can require large amounts of data. The present invention provides for lossless compression and decompression of the individual frames of video image data. Each individual frame of video image data is processed in n.times.n pixel blocks. The combination of colors (called the color list) and the number of different colors in the pixel block is then determined. If the number of colors is above a predetermined threshold, no compression occurs. If the number of colors is below a predetermined threshold, searches for prior occurrences of the combination of colors is than performed. In some instances, a color list for contiguous pixel blocks will be the same. In this instance, a pixel map representing the positioning of the colors in the pixel block is output.

Abstract: An emulation system contains reorganized instruction code sequences for a computer, so that the native code which is used to emulate instructions that occur most frequently in a typical environment are grouped together, to thereby minimize instruction cache conflicts. A representative set of programs which operate with the emulated code are run, and statistics are recorded to determine the most frequently occurring emulated instructions. The native code which emulates these most frequently occurring instructions is then arranged so that the portions of the code are statically stored in main memory at consecutive memory locations. As a result, when the native code for a frequently occurring emulated instruction is loaded from the memory into the cache, the likelihood that the cache will contain the native code for subsequent emulated instructions is maximized, and the likelihood of cache conflicts is minimized.

Abstract: In a computer system an apparatus interconnects a first bus, a second bus and a frame buffer, wherein the first bus and the second bus are of incompatible bus architecture types. For example the first bus may be a loosely coupled bus having split-bus transaction capability, such as the ARBus, and the second bus may be a tightly ordered bus, such as the PCI local bus. The apparatus includes bridge hardware for converting access requests from the first bus into suitable requests for the second bus. Data paths within the apparatus allow data to be routed from one bus to another. The apparatus further includes a frame buffer controller that is accessible from either of the first or second buses for performing read or write operations from/to the frame buffer. Data path logic allows data to be routed from any of the first bus, second bus and frame buffer to any other one of these three locations.

Abstract: Method and system aspects for linear predictive speech encoding are disclosed. These aspects comprise the definition of an error function, the computation of an optimal vector of continuous pitch coefficients together with an optimal pitch, and the weighted vector quantization of the continuous pitch coefficients. The techniques allows the faster computation of the optimal combination pitch--continuous coefficient values without substantial loss of optimal results.

Abstract: A method for providing security in a networked multimedia computing system is provided wherein an administrative workstation is challenged by a network workstation when the administrative workstation is attempting to manipulate or query the network workstation. The administrative workstation responds in an automatic fashion to supply a series of logically acceptable password candidates to the challenging workstation in an attempt to validate itself to the challenging network workstation without interrupting a user. If none of the series of passwords is successful, an administrator, or user, operating the administrative workstation is prompted to manually enter a password. The system allows for an administrative workstation to automatically and transparently validate itself to a challenging network workstation, in most situations, without requiring input from the administrator.

Abstract: A character code conversion system that provides round trip fidelity, while ensuring that the resulting character codes are interchangeable with other platforms. The code conversion system is able to map a single source character or a sequence of characters to either a single target character or a sequence of target characters. With round trip fidelity, source text can be converted to target text and then back again to the original source text. The interchangability is ensured by maximizing the use of standard target characters, and by minimizing the use of private characters. The code conversion is particularly useful for converting to/from Unicode characters from/to other character sets.

Abstract: The present invention teaches a variety of methods, apparatus and data structures for providing data driven patching. According to one embodiment, patches are stored in a known format in a discernible location. In the described embodiment, each fragment code may have a corresponding patch library. This enables the patches to be located and analyzed in a quiescent state. In a method aspect of the present invention, the operating system, or a separate utility program, can evaluate and selectively add patches. Therefore, the present invention introduces a patch integrity validation layer into the patching process. In another method aspect, the invention teaches evaluating the patches in a quiescent state whereby the patches introduced by a program or a combination of programs may be exhaustively evaluated prior to execution.

Abstract: A method and apparatus for generating patching resources in an information processing system having operating instructions on a Read Only Memory Device. The present invention simplifies the patch generation and installation processes. A patch resource is generated and used by a patch installation process. Patch resources are generated for each ROM version by comparing previous ROM versions to the new ROM version. A patch resource is comprised of a plurality of entries, each of which defines a vector table address, an offset into the vector table and the routine to be inserted. By comparing routines between the ROM versions, routines which are different or new are identified. These routines will become patch resource entries. For patch installation, the ROM version number for the installed ROM is determined; the proper patching resource is retrieved, and the patch resource entries cause the patches to be installed.

Abstract: A method and apparatus for receiving infrared signals are provided. The circuit includes preamplifier that includes an integrator that charges based on light detected by a photodiode. The circuit includes a warning circuit that generates a warning flag when the charge on the integrator exceeds a predetermined level. To prevent the integrator from saturation, digital logic resets the preamplifier by dumping the charge on the integrator in response to the warning signal. The digital logic is also configured to reset the integrator at predetermined intervals. When the incoming signal is encoded using pulse position modulation, the interval at which the integrator is reset is the length of a single time slot in the pulse position modulation frame. A sample and hold circuit is provided to hold a previous output of the preamplifier. The difference between the previous output of the preamplifier and the current output of the preamplifier is compared with a threshold voltage to detect pulses on the incoming signal.

Abstract: A system and method for recovering from a power failure in a digital camera comprises a power manager for detecting power failures, an interrupt handler for responsively incrementing a counter device, service routines which register to receive notification of the power failure, and a processor for evaluating the counter and providing notification of the power failure to the service routines which then assist the digital camera to recover from the power failure.

Abstract: Data structure and methods associating an arbitrary list of properties with user interface items on a graphical user interface display. Each property has a tag with which an application program can reference it, and arbitrary data which can be written, read and modified by the application program. Property lists for each user interface item are stored in in-memory pools of property lists. Each pool includes a header region having a variable number of index slots, each slot which is currently being used pointing to a respective property list in a property list region of the pool. Unused slots are maintained on a linked list of index slots. When a property list is to be added or removed from a pool, the maintenance routines grow or shrink the pool only by fixed increments. Each property list includes a variable number of property entries each having a tag field and a data field.

Abstract: A system and method for increasing utilization of a system bus and frame buffer throughput in a graphic display system. The frame buffer is changed from cache inhibited mode to cached mode in order to take advantage of the burst mode of system bus in which a plurality of values are transferred to the frame buffer following one address. Data coherency is maintained between the cache and the frame buffer by invalidating a cache-line before writing to the cache-line, and by explicitly flushing the cache-line after the cache-line is filled with data.

Abstract: A method for compressing digital image of more than a first predetermined number into the first predetermined number of bits in a substantially lossless manner includes determining a plurality of ranges in which input image data falls and comparing current image data with the plurality of ranges. The method further includes preserving a second predetermined number of bits of the current image data based upon which of the plurality of ranges the current image data falls to encode the current image data as an image value comprising the first predetermined number of bits.A system includes means for determining a plurality of ranges in which input image data falls and means for comparing current image data with the plurality of ranges, the means for comparing coupled to the means for determining.