Patents Assigned to Applied Material
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Patent number: 7037854Abstract: A chemical-mechanical jet etching method rapidly removes large amounts of material in wafer thinning, or produces large-scale features on a silicon wafer, gallium arsenide substrate, or similar flat semiconductor workpiece, at etch rates in the range of 10–100 microns of workpiece thickness per minute. A nozzle or array of nozzles, optionally including a dual-orifice nozzle, delivers a high-pressure jet of machining etchant fluid to the surface of the workpiece. The machining etchant comprises a liquid or gas, carrying particulate material. The liquid may be a chemical etchant, or a solvent for a chemical etchant, if desired. The areas which are not to be etched may be shielded from the jet by a patterned mask, or the jet may be directed at areas from which material is to be removed, as in wafer thinning or direct writing, depending on the size of the desired feature or etched area.Type: GrantFiled: September 30, 2003Date of Patent: May 2, 2006Assignee: Applied Materials, Inc.Inventors: Robert Z. Bachrach, Jeffrey D. Chinn
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Patent number: 7039501Abstract: Generally, a method of determining a position of a robot is provided. In one embodiment, a method of determining a position of a robot comprises acquiring a first set of positional metrics, acquiring a second set of positional metrics and resolving the position of the robot due to thermal expansion using the first set and the second set of positional metrics. Acquiring the first and second set of positional metrics may occur at the same location within a processing system, or may occur at different locations. For example, in another embodiment, the method may comprise acquiring a first set of positional metrics at a first location proximate a processing chamber and acquiring a second set of positional metrics in another location. In another embodiment, substrate center information is corrected using the determined position of the robot.Type: GrantFiled: April 3, 2003Date of Patent: May 2, 2006Assignee: Applied Materials, Inc.Inventors: Marvin L. Freeman, Jeffrey C. Hudgens, Damon Keith Cox, Chris Holt Pencis, Michael Rice, David A. Van Gogh
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Patent number: 7037842Abstract: A method and apparatus for processing a wafer is described. According to the present invention a wafer is placed on a substrate support. A liquid is then fed through a conduit having an output opening over the wafer. A gas is dissolved in the liquid prior to the liquid reaching the output over the wafer by flowing a gas into the conduit through a venturi opening formed in the conduit. The liquid with dissolved gas is then fed through the opening and onto the wafer where it can be used to etch, clean, or rinse a wafer.Type: GrantFiled: August 7, 2003Date of Patent: May 2, 2006Assignee: Applied Materials, Inc.Inventors: Steven Verhaverbeke, J. Kelly Truman
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Patent number: 7037376Abstract: A processing chamber may be effectively cleaned by a remote plasma flowed through the chamber in a direction opposite to the direction of gas flowed during wafer processing. Specifically, the remotely generated plasma may be introduced directly into the chamber through a processing gas exhaust or other port, and then be exhausted from the chamber by traveling through the gas distribution shower head to the foreline. In one embodiment of the present invention, this reverse flow of remote cleaning plasma is maintained for the duration of the chamber cleaning step. In an alternative embodiment, the direction of flow of the remote cleaning plasma through the chamber is alternated between this reverse flow and a conventional forward flow.Type: GrantFiled: April 11, 2003Date of Patent: May 2, 2006Assignee: Applied Materials Inc.Inventors: Keith Harvey, Karthik Janakiraman, Kirby Floyd
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Patent number: 7034297Abstract: A method and apparatus for use in monitoring a sample with a charged particle beam are presented. A mechanical displacement between a plane defined by the sample's surface and an optical axis defined by a beam directing arrangement is provided so as to orient the sample at a certain non-right angle ?1 with respect to the optical axis. A primary charged particle beam propagating towards the sample is deflected so as to affect the trajectory of the primary charged particle beam to provide a certain non-zero angle ?2 between the primary beam propagation axis and said optical axis.Type: GrantFiled: March 5, 2003Date of Patent: April 25, 2006Assignee: Applied Materials, Israel, Ltd.Inventors: Igor Petrov, Zvika Rosenberg, Pavel Adamec, Igor Krayvitz
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Patent number: 7034963Abstract: An algorithm (method) for sizing (adjusting edges 01) grayscale or dose level pixel-maps (raster images) real time for input into radiant beam lithography systems or similar dose level grayscale image rendering systems to compensate for systemic distortions such as edge bias and/or loss of linearity (i) successively assembles one or more frame matrixes of grayscale values from a parent pixel-map having edges and corners where an edge is defined by gray pixels having values between 1, 2, . . .Type: GrantFiled: July 11, 2001Date of Patent: April 25, 2006Assignee: Applied Materials, Inc.Inventors: Asher Klatchko, Samuel C. Howells, Michael A. Ward
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Patent number: 7032614Abstract: A facilities connection box is provided to accommodate pre-plumbing of facilities lines required in connection with an installation of semiconductor device manufacturing equipment. The facilities connection box accommodates termination of double-containment facilities lines that are adapted to carry hazardous materials required for operation of the semiconductor device manufacturing equipment. Each double-containment facilities line is terminated in an isolation compartment of the facilities connection box. Each isolation compartment has an entry port adapted to couple to an incoming double-containment line and an exit port adapted to permit egress from the isolation compartment of a respective outgoing line.Type: GrantFiled: January 2, 2003Date of Patent: April 25, 2006Assignee: Applied Materials, Inc.Inventors: Alan Rick Lappen, Ronald V. Schauer
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Patent number: 7033447Abstract: We have discovered that the formation of particulate inclusions at the surface of an aluminum alloy article, which inclusions interfere with a smooth transition from the alloy surface to an overlying aluminum oxide protective film, can be controlled by maintaining the content of mobile and nonmobile impurities within a specific range and controlling the particulate size and distribution of the mobile and nonmobile impurities and compounds thereof; by heat-treating the aluminum alloy at a temperature less than about 330° C.; and by creating the aluminum oxide protective film by employing a particular electrolytic process. When these factors are taken into consideration, an improved aluminum oxide protective film is obtained.Type: GrantFiled: May 3, 2002Date of Patent: April 25, 2006Assignee: Applied Materials, Inc.Inventors: Yixing Lin, Brian T West, Shun Jackson Wu, Clifford C Stow, Senh Thach, Hong Wang, Jennifer Y Sun
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Patent number: 7033922Abstract: A method and system to reduce the resistance of refractory metal layers by controlling the presence of fluorine contained therein. The present invention is based upon the discovery that when employing ALD techniques to form refractory metal layers on a substrate, the carrier gas employed impacts the presence of fluorine in the resulting layer. As a result, the method features chemisorbing, onto the substrate, alternating monolayers of a first compound and a second compound, with the second compound having fluorine atoms associated therewith, with each of the first and second compounds being introduced into the processing chamber along with a carrier gas to control a quantity of the fluorine atoms associated with the monolayer of the second compound.Type: GrantFiled: September 29, 2004Date of Patent: April 25, 2006Assignee: Applied Materials. Inc.Inventors: Moris Kori, Alfred W. Mak, Jeong Soo Byun, Lawrence Chung-Lai Lei, Hua Chung, Ashok Sinha, Ming Xi
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Patent number: 7033945Abstract: A method of filling a gap formed between adjacent raised surfaces on a substrate. In one embodiment the method comprises depositing a boron-doped silica glass (BSG) layer over the substrate to partially fill the gap using a thermal CVD process; exposing the BSG layer to a steam ambient at a temperature above the BSG layer's Eutectic temperature; removing an upper portion of the BSG layer by exposing the layer to a fluorine-containing etchant; and depositing an undoped silica glass (USG) layer over the BSG layer to fill the remainder of the gap.Type: GrantFiled: June 1, 2004Date of Patent: April 25, 2006Assignee: Applied MaterialsInventors: Jeong Soo Byun, Zheng Yuan, Shankar Venkataraman, M. Ziaul Karim, Thanh N. Pham, Ellie Y. Yieh
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Patent number: 7034409Abstract: A method is provided for processing a substrate including treating a surface of a dielectric layer comprising silicon and carbon by exposing the dielectric layer comprising silicon and carbon to a plasma of an inert gas, and depositing a photoresist on the dielectric layer comprising silicon and carbon. The dielectric layer may comprise a first dielectric layer comprising silicon, carbon, and nitrogen, and a second layer of nitrogen-free silicon and carbon containing material in situ on the first dielectric layer, and a third dielectric layer comprising silicon, oxygen, and carbon on the second dielectric layer.Type: GrantFiled: November 21, 2003Date of Patent: April 25, 2006Assignee: Applied Materials Inc.Inventors: Ping Xu, Li-Qun Xia, Larry A. Dworkin, Mehul Naik
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Publication number: 20060085089Abstract: Embodiments of the present invention provide a novel method, system and computer program product for tracing die units during material transfer from, for example, one factory or lot to another (and efficiently maintaining correspondence between die data and an individual die during, e.g., a lot transfer process). One or more embodiments of the present invention are intended to improve the mechanism of die-level traceability by assigning individual die IDs to each die unit in, e.g., each lot, and associating a range of die IDs with a corresponding index string. When, for example, some dies are transferred from, e.g., a first lot to a second lot, the entire die information associated with the first lot is copied to the second lot, and a different index string is assigned to the second lot to indicate the actual dies or range of dies that have been transferred. The first lot's index string is then adjusted to indicate the dies remaining after the transfer.Type: ApplicationFiled: October 12, 2005Publication date: April 20, 2006Applicant: Applied Materials, Inc.Inventor: Horne Koh
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Patent number: 7029529Abstract: A system and method for processing large area substrates. In one embodiment, a system for processing large area substrates includes prep station, a stamping station and a stamp that is automatically moved between the stamping station and the prep station. The stamping station is adapted to retain a large area substrate thereon. The stamp has a patterned bottom surface that is adapted for microcontact printing. The prep station is for applying a precursor to the patterned bottom surface of the stamp. In one embodiment, a method for processing large area substrates includes the steps of disposing a large area substrate on a platen, inking a stamp adapted for microcontact printing, and automatically contacting a bottom of the stamp to the large area substrate supported on a platen.Type: GrantFiled: September 19, 2002Date of Patent: April 18, 2006Assignee: Applied Materials, Inc.Inventors: Kam S. Law, Robert Z. Bachrach, John M. White, Quanyuan Shang
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Patent number: 7029365Abstract: Embodiments of a pad assembly for processing a substrate are provided. The pad assembly includes a processing layer having a working surface adapted to process a substrate, a lower layer coupled to and disposed below the processing layer, and an electrode having an upper surface disposed above the lower layer and below the working surface of the processing layer. The upper surface of the electrode is at least partially exposed to the working surface to provide an electrolyte pathway between the upper surface of the electrode and the working surface.Type: GrantFiled: December 23, 2003Date of Patent: April 18, 2006Assignee: Applied Materials Inc.Inventors: Shou-Sung Chang, Stan D Tsai, Donald J. K. Olgado, Liang-Yuh Chen, Alain Duboust, Ralph M. Wadensweiler
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Patent number: 7030041Abstract: Methods are provided for processing a substrate for depositing an adhesion layer having a low dielectric constant between two low k dielectric layers. In one aspect, the invention provides a method for processing a substrate including introducing an organosilicon compound and an oxidizing gas at a first ratio of organosilicon compound to oxidizing gas into the processing chamber, generating a plasma of the oxidizing gas and the organosilicon compound to form an initiation layer on a barrier layer comprising at least silicon and carbon, introducing the organosilicon compound and the oxidizing gas at a second ratio of organosilicon compound to oxidizing gas greater than the first ratio into the processing chamber, and depositing a first dielectric layer adjacent the dielectric initiation layer.Type: GrantFiled: March 15, 2004Date of Patent: April 18, 2006Assignee: Applied Materials Inc.Inventors: Lihua Li, Tzu-Fang Huang, Jerry Sugiarto, legal representative, Li-Qun Xia, Peter Wai-Man Lee, Hichem M'Saad, Zhenjiang Cui, Sohyun Park, Dian Sugiarto, deceased
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Patent number: 7030335Abstract: A plasma reactor for processing a semiconductor workpiece, includes a reactor chamber having a chamber wall and containing a workpiece support for holding the semiconductor workpiece, an overhead electrode overlying said workpiece support, the electrode comprising a portion of said chamber wall, an RF power generator for supplying power at a frequency of said generator to said overhead electrode and capable of maintaining a plasma within said chamber at a desired plasma ion density level. The overhead electrode has a capacitance such that said overhead electrode and the plasma formed in said chamber at said desired plasma ion density resonate together at an electrode-plasma resonant frequency, said frequency of said generator being at least near said electrode-plasma resonant frequency.Type: GrantFiled: December 19, 2001Date of Patent: April 18, 2006Assignee: Applied Materials, Inc.Inventors: Daniel J. Hoffman, Gerald Zheyao Yin, Yan Ye, Dan Katz, Douglas A. Buchberger, Jr., Xiaoye Zhao, Kang-Lie Chiang, Robert B. Hagen, Matthew L. Miller
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Patent number: 7030978Abstract: A system and method for inspection of a substrate having a first refractive index, the method including the steps of: (i) defining an apodization scheme in response to a characteristic of the layer; (ii) applying an apodizer to apodize a beam of radiation in response to the apodization scheme; (iii) directing the apodized beam of radiation to impinge on the substrate, whereby a plurality of rays are reflected from the substrate; whereas the apodized beam of radiation propagates through an at least partially transparent medium having a third refractive index and an at least partially transparent layer having a second refractive index and is subsequently reflected from the substrate; whereas the second refractive index differs from the first refractive index and from the third refractive index; and (iv) detecting at least some of the plurality of reflected rays.Type: GrantFiled: April 25, 2003Date of Patent: April 18, 2006Assignee: Applied Materials, Israel, LTDInventors: Avishay Guetta, Haim Feldman, Ron Naftali, Doron Shoham
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Patent number: 7031600Abstract: A method and apparatus for depositing a dielectric material at a rate of at least 3000 Angstroms per minute on a large area substrate that has a surface area of at least about 0.35 square meters is provided. In one embodiment, the dielectric material is silicon oxide. Also provided is a large area substrate having a layer of dielectric material deposited by a process yielding a deposition rate in excess of about 3000 Angstroms per minute and a processing chamber for fabricating the same.Type: GrantFiled: April 7, 2003Date of Patent: April 18, 2006Assignee: Applied Materials, Inc.Inventors: Sanjay D. Yadav, Quanyuan Shang, Wendell T. Blonigan
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Publication number: 20060079007Abstract: A system, method and medium of detecting a transition interface between a first dielectric material and an adjacent second dielectric material in a semiconductor wafer during a chemical-mechanical polishing process includes impinging an incident light of a predetermined wavelength on the semiconductor wafer at a first time, detecting at least one first intensity of at least one first reflected light, impinging the incident light of the predetermined wavelength on the semiconductor wafer at a second time, detecting at least one second intensity of at least one second reflected light, and determining a difference between the at least one first intensity and the at least one second intensity. If the difference between the at least one first intensity and the at least one second intensity is above a predetermined threshold, the chemical-mechanical polishing process is terminated.Type: ApplicationFiled: October 8, 2004Publication date: April 13, 2006Applicant: Applied Materials, Inc.Inventors: Ajoy Zutshi, Rahul Surana, Girish Dixit
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Patent number: 7026175Abstract: Heat is applied to a conductive structure that includes one or more vias, and the temperature at or near the point of heat application is measured. The measured temperature indicates the integrity or the defectiveness of various features (e.g. vias and/or traces) in the conductive structure, near the point of heat application. Specifically, a higher temperature measurement (as compared to a measurement in a reference structure) indicates a reduced heat transfer from the point of heat application, and therefore indicates a defect. The reference structure can be in the same die as the conductive structure (e.g. to provide a baseline) or outside the die but in the same wafer (e.g. in a test structure) or outside the wafer (e.g. in a reference wafer), depending on the embodiment.Type: GrantFiled: March 29, 2004Date of Patent: April 11, 2006Assignee: Applied Materials, Inc.Inventors: Jiping Li, Peter G. Borden, Edgar B. Genio