Patents Assigned to Applied Materials
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Patent number: 12181801Abstract: A method and apparatus for performing post-exposure bake operations is described herein. The apparatus includes a plate stack and enables formation of a first high ion density plasma before the ion concentration within the first high ion density plasma is reduced using a diffuser to form a second low ion density plasma. The second low ion density plasma is an electron cloud or a dark plasma. An electric field is formed between a substrate support and the diffuser and through the second low ion density plasma during post-exposure bake of a substrate disposed on the substrate support. The second low ion density plasma electrically couples the substrate support and the diffuser during application of the electric field. The plate stack is equipped with power supplies and insulators to enable the formation or modification of a plasma within three regions of a process chamber.Type: GrantFiled: November 19, 2021Date of Patent: December 31, 2024Assignee: Applied Materials, Inc.Inventors: Dmitry Lubomirsky, Douglas A. Buchberger, Jr., Qiwei Liang, Hyunjun Kim, Ellie Y. Yieh
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Patent number: 12185433Abstract: A substrate support assembly includes a plate structure and an insulator structure. The plate structure includes an upper plate and a lower plate. The lower plate includes a lower plate structure surface. The insulator structure is disposed beneath the plate structure. The insulator structure includes a lower insulator structure surface and an upper insulator structure surface. A first portion of the upper insulator structure surface is recessed with respect to a second portion of the upper insulator structure surface. The first portion of the upper insulator structure surface forms an interior volume with the lower plate structure surface.Type: GrantFiled: May 15, 2023Date of Patent: December 31, 2024Assignee: Applied Materials, Inc.Inventors: Denis Martin Koosau, Suresh Gupta, Martin Perez-Guzman, Ashish Goel
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Patent number: 12185451Abstract: An apparatus may include a resonator chamber, arranged in a vacuum enclosure; an RF electrode assembly, arranged within the vacuum enclosure; and a resonator coil, disposed within the resonator chamber, the resonator coil having a high voltage end, directly connected to at least one RF electrode of the RF electrode assembly.Type: GrantFiled: November 4, 2022Date of Patent: December 31, 2024Assignee: Applied Materials, Inc.Inventors: Robert B. Vopat, Charles T. Carlson
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Patent number: 12183548Abstract: Embodiments disclosed herein include a processing tool. In an embodiment, the processing tool comprises a power supply, an impedance matching network coupled to the power supply, a cathode, wherein the power supply is configured to supply power through the impedance matching network to the cathode, and a processing module, wherein the processing module is communicatively coupled to the power supply and the impedance matching network.Type: GrantFiled: May 5, 2022Date of Patent: December 31, 2024Assignee: Applied Materials, Inc.Inventor: David Coumou
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Patent number: 12181054Abstract: A three-way valve is disclosed. The valve achieved constant flow rate as the valve transitions from 100% flow through the first path to 100% flow through the second path. The valve is linearly actuated, which allows a plurality of valves to be efficiently disposed in a manifold. The valve comprises a spool having two passageways therethrough which converge at the input. The spool is disposed in a housing. By linear movement of the spool within the housing, the amount of the incoming flow that passes through each of the two passageways can be controlled. In certain embodiments, the spool is in communication with an actuator to control its position within the housing. The three-way valve may be used as part of a manifold.Type: GrantFiled: July 23, 2021Date of Patent: December 31, 2024Assignee: Applied Materials, Inc.Inventor: Roger B. Fish
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Patent number: 12180611Abstract: Embodiments of the present disclosure generally relate to silicon carbide coated base substrates, silicon carbide substrates thereof, and methods for forming silicon carbide coated base substrates. In some embodiments, a method includes introducing a first silicon-containing precursor to a process chamber at a first temperature of about 800° C. to less than 1,000° C. to form a first silicon carbide layer on a base substrate. The method includes introducing a second silicon-containing precursor, that is the same or different than the first silicon-containing precursor, to the process chamber at a second temperature of about 1,000° C. to about 1,400° C. to form a second silicon carbide layer on the first silicon carbide layer.Type: GrantFiled: October 23, 2023Date of Patent: December 31, 2024Assignee: APPLIED MATERIALS, INC.Inventors: Yen Lin Leow, Xinning Luan, Hui Chen, Kirk Allen Fisher, Shawn Thomas
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Patent number: 12181736Abstract: Embodiments of metasurfaces having nanostructures with desired geometric profiles and configurations are provided in the present disclosure. In one embodiment, a metasurface includes a nanostructure formed on a substrate, wherein the nanostructure is cuboidal or cylindrical in shape. In another embodiment, a metasurface includes a plurality of nanostructures on a substrate, wherein each of the nanostructures has a gap greater than 35 nm spaced apart from each other. In yet another embodiment, a metasurface includes a plurality of nanostructures on a substrate, wherein the nanostructures are fabricated from at least one of TiO2, silicon nitride, or amorphous silicon, or GaN or aluminum zinc oxide or any material with refractive index greater than 1.8, and absorption coefficient smaller than 0.001, the substrate is transparent with absorption coefficient smaller than 0.001.Type: GrantFiled: October 31, 2022Date of Patent: December 31, 2024Assignee: Applied Materials, Inc.Inventors: Tapashree Roy, Wayne McMillan, Rutger Meyer Timmerman Thijssen
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Patent number: 12183578Abstract: In an embodiment, a method for forming features for semiconductor processing. A first mandrel and a second mandrel are formed on a substrate. A first spacer is formed along a first sidewall of the first mandrel, and a second spacer is formed along a second sidewall of the second mandrel. A gap is defined between the first spacer and the second spacer. The gap is filled by a gap-filling material. In some examples, the gap-filling material includes a doped silicon material. In some examples, the first spacer and the second spacer each include a doped silicon material.Type: GrantFiled: August 27, 2021Date of Patent: December 31, 2024Assignee: Applied Materials, Inc.Inventors: Takehito Koshizawa, Rui Cheng, Tejinder Singh, Hidetaka Oshio
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Patent number: 12183559Abstract: An adapter for a deposition chamber includes an adapter body extending longitudinally about a central axis between an upper side and lower side opposite the upper side. The adapter body has a central opening about the central axis. The adapter body has a radially outer portion having a connection surface on the lower side and a radially inner portion having a coolant channel and a stepped surface on the lower side. At least a portion of the coolant channel is spaced radially inwardly from a radially inner end of the connection surface. At least the portion of the coolant channel is disposed longitudinally below the connection surface between the connection surface and the stepped surface.Type: GrantFiled: October 22, 2021Date of Patent: December 31, 2024Assignee: APPLIED MATERIALS, INC.Inventors: Vishwas Kumar Pandey, Colin John Dickinson, Dinkesh Huderi Somanna, Ala Moradian, Kartik Bhupendra Shah
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Patent number: 12183798Abstract: A method of forming a gate stack structure includes forming a dipole metal layer on a high-? gate dielectric layer on a semiconductor structure formed on a substrate, annealing the dipole metal layer, and removing the dipole metal layer. The dipole metal layer comprises dopants in the high-? gate dielectric layer.Type: GrantFiled: November 17, 2021Date of Patent: December 31, 2024Assignee: Applied Materials, Inc.Inventors: Steven C. H. Hung, Benjamin Colombeau, Myungsun Kim, Srinivas Gandikota, Yixiong Yang, Jacqueline Samantha Wrench, Yong Yang
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Patent number: 12183605Abstract: Methods and systems for in-situ temperature control are provided. The method includes delivering a temperature-sensing disc into a processing region of a processing chamber without breaking vacuum. The temperature-sensing disc includes one or more cameras configured to perform IR-based imaging. The method further includes measuring a temperature of at least one region of at least one chamber surface in the processing region of the processing chamber by imaging the at least one surface using the temperature-sensing disc. The method further includes comparing the measured temperature to a desired temperature to determine a temperature difference. The method further includes adjusting a temperature of the at least one chamber surface to compensate for the temperature difference.Type: GrantFiled: September 17, 2021Date of Patent: December 31, 2024Assignee: Applied Materials, Inc.Inventors: Andrew Nguyen, Yogananda Sarode, Xue Chang, Kartik Ramaswamy
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Publication number: 20240431093Abstract: The present technology is generally directed to vertical dynamic random-access memory (DRAM) cells and arrays, and methods of forming such cells and arrays, that contain a shared word line between two adjacent channels. Cells include a bit line arranged in a first horizontal direction, a first channel, a second channel, and a shared word line arranged in a second horizontal direction between the first channel and the second channel. Cells include where the first channel and the second channel extend in a vertical direction that is orthogonal to the first horizontal direction and the second horizontal direction, such that the bit line intersects with a source/drain region of the first channel and the second channel, and the shared word line intersects with a gate region of both the first channel and the second channel.Type: ApplicationFiled: June 4, 2024Publication date: December 26, 2024Applicant: Applied Materials, Inc.Inventor: Fredrick Fishburn
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Publication number: 20240429048Abstract: A semiconductor device and a method for manufacturing thereof. A substrate is provided. At least one silicon layer is formed on top of the substrate. At least one silicon-germanium layer is formed on top of at least one silicon layer. At least one silicon-germanium layer includes at least one n-type dopant. The semiconductor device having at least one silicon layer and at least one silicon-germanium layer is formed.Type: ApplicationFiled: June 17, 2024Publication date: December 26, 2024Applicant: Applied Materials, Inc.Inventors: Ruiying HAO, Thomas KIRSCHENHEITER, Arvind KUMAR, Mahendra PAKALA, Roya BAGHI, Balasubramanian PRANATHARTHIHARAN, Fredrick FISHBURN
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Publication number: 20240424685Abstract: A substrate safety system that includes (i) a control unit that is configured to trigger a substrate recovery related procedure; (ii) a sensing unit that is configured to generate, during an execution of the substrate recovery related procedure, sensed information that is indicative of one or more regions that are associated with a substrate handling station of a substrate evaluation system; (iii) an AI processing unit that is configured to apply an AI process on the sensed information to determine a recovery related status of the substrate; and (iv) a response unit that is configured to respond to the recovery related status of the substrate.Type: ApplicationFiled: June 26, 2023Publication date: December 26, 2024Applicant: Applied Materials lsrael Ltd.Inventors: Binyamin Bejell, Itamar Orenbuch, Avi Aboodi
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Publication number: 20240429062Abstract: Exemplary methods of semiconductor processing may include providing a hydrogen-containing precursor and a fluorine-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed on a substrate support within the processing region. One or more layers of silicon-containing material may be disposed on the substrate. The methods may include forming plasma effluents of the hydrogen-containing precursor and the fluorine-containing precursor. The methods may include contacting one or more layers of silicon-containing material with plasma effluents of the hydrogen-containing precursor and the fluorine-containing precursor. The contacting may etch a portion of the one or more layers of silicon-containing material.Type: ApplicationFiled: June 21, 2023Publication date: December 26, 2024Applicant: Applied Materials, Inc.Inventors: Alok Ranjan, Anatoli Chlenov, Kenji Takeshita
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Publication number: 20240425536Abstract: Exemplary methods of semiconductor processing, such as methods of depositing a molybdenum-containing material on a substrate, may include providing a molybdenum-containing precursor to a processing region of a semiconductor processing chamber in which the substrate is located. The molybdenum-containing precursor may include a molybdenum complex according to Compound I: R may be methyl or ethyl, R? may be methyl or ethyl, R? may be methyl, ethyl, or propyl, and n may be equal to 1 or 2. Contacting the substrate with the molybdenum-containing precursor may deposit the molybdenum-containing material on the substrate.Type: ApplicationFiled: June 13, 2023Publication date: December 26, 2024Applicant: Applied Materials, Inc.Inventors: Feng Q. Liu, Mark J. Saly, David Thompson
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Publication number: 20240429105Abstract: Disclosed herein are approaches for measuring lateral dopant concentration and distribution in high aspect radio trench structures. In one approach, a method may include providing a substrate including a plurality of alternating vertical structures and trenches, and removing a portion of the substrate to expose a sidewall of the first vertical structure of the plurality of structures. The method may further include directing a spectrometry beam into the sidewall of the first vertical structure to determine a dopant characteristic of the first vertical structure, wherein the spectrometry beam is delivered perpendicular to a plane defined by the sidewall of the first vertical structure.Type: ApplicationFiled: June 20, 2023Publication date: December 26, 2024Applicant: Applied Materials, Inc.Inventors: Dimitry KOUZMINOV, Vikram M. BHOSLE, Arun Ramaswamy SRIVATSA, Ming Hong YANG
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Patent number: 12176205Abstract: Embodiments of the present disclosure generally relate to methods and apparatus for backside stress engineering of substrates to combat film stresses and bowing issues. In one embodiment, a method of depositing a film layer on a backside of a substrate is provided. The method includes flipping a substrate at a factory interface so that the backside of the substrate is facing up, and transferring the flipped substrate from the factory interface to a physical vapor deposition chamber to deposit a film layer on the backside of the substrate. In another embodiment, an apparatus for depositing a backside film layer on a backside of a substrate, which includes a substrate supporting surface configured to support the substrate at or near the periphery of the substrate supporting surface without contacting an active region on a front side of the substrate.Type: GrantFiled: June 19, 2023Date of Patent: December 24, 2024Assignee: Applied Materials, Inc.Inventors: Chunming Zhou, Jothilingam Ramalingam, Yong Cao, Kevin Vincent Moraes, Shane Lavan
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Patent number: 12176191Abstract: A magnet assembly for a magnetron of a processing chamber includes a support member. A plurality of magnetic tracks is mounted to the support member. Each magnetic track includes a pair of magnetic poles. A partial magnetic track is mounted to the support member. The partial magnetic track includes a single unpaired magnetic pole. The partial magnetic track is mounted proximal to a center of rotation of the support member.Type: GrantFiled: June 26, 2023Date of Patent: December 24, 2024Assignee: Applied Materials, Inc.Inventors: Cory Lafollett, Jie J. Zhang
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Patent number: 12172264Abstract: An apparatus comprises a flexible membrane for use with a carrier head of a substrate chemical mechanical polishing apparatus. The membrane comprises an outer surface providing a substrate receiving surface, wherein the outer surface has a central portion and an edge portion surrounding the central portion, wherein the central portion has a first surface roughness and the edge portion has a second surface roughness, the first surface roughness being greater than the second surface roughness.Type: GrantFiled: July 12, 2023Date of Patent: December 24, 2024Assignee: Applied Materials, Inc.Inventors: Young J. Paik, Ashish Bhatnagar, Kadthala Ramaya Narendrnath
