Abstract: The present disclosure relates to heating a substrate in a rapid thermal processing (RTP) chamber. The chamber may contain a rotatable assembly configured to accommodate and rotate the substrate while a heat source inside the RTP chamber applies heat to the substrate. The rotatable assembly is partially disposed outside the RTP chamber. A seal may formed around the rotatable assembly and maintain a vacuum inside the RTP chamber while the rotatable assembly rotates. The rotatable assembly may configured to accommodate various-sized substrates.

Abstract: A method for gray level ratio inspection comprising: obtaining an electron image that comprises region of interest (ROI) pixels of a ROI of the sample and reference pixels of a reference region of the sample, where the ROI pixels are obtained by illuminating the ROI with the electron beam and the reference pixels are obtained without illuminating the reference region with an electron beam; calculating a reference dark level value based on values of at least some of the reference pixels; calculating, responsive to the reference dark level value, a gray level ratio between a first gray level value related to a first sub-set of the ROI pixels and a second gray level value related to a second sub-set of the ROI pixels; determining whether the gray level ratio is indicative of a defect; and generating defect information following a determination that the gray level ratio is indicative of the defect.

Abstract: Methods, apparatuses and systems for detecting and managing arc events during a plasma chamber process include receiving impedance data measured during a plasma chamber process, analyzing the impedance data to determine if an arc event is occurring during the plasma chamber process, and if it is determined that an arc event is occurring, an action is taken to suppress an arc of the arc event. In some instances, a machine learning model that has been trained to recognize when an arc event is occurring from received measurement data is used to determine if an arc event is occurring.

Abstract: Methods of processing thin film by oxidation at high pressure are described. The methods are generally performed at pressures greater than 2 bar. The methods can be performed at lower temperatures and have shorter exposure times than similar methods performed at lower pressures. Some methods relate to oxidizing tungsten films to form self-aligned pillars.

Abstract: Embodiments disclosed herein include a diagnostic substrate. In an embodiment, the diagnostic substrate comprises a substrate, a circuit board on the substrate, and a spectrometer coupled to the circuit board. In an embodiment, the diagnostic substrate further comprises a processor on the circuit board and communicatively coupled to the spectrometer.

Abstract: A method of transferring micro-devices includes selectively treating a first adhesive layer to form a treated portion and an untreated portion while micro-devices are attached the first adhesive layer. A second adhesive layer on a second surface is placed to abut the micro-devices. The first adhesive layer is exposed to illumination in a region that overlaps at least some of the treated portion and at least some of the untreated portion. Exposing the first adhesive layer to illumination neutralizes the at least some of the untreated portion to create a neutralized portion that is less adhesive than an exposed area of the treated portion. The first surface is separated from the second surface such that micro-devices in the treated portion remain attached to the first surface and micro-devices in the neutralized portion are attached to the second surface and separate from the first surface.

Abstract: Exemplary semiconductor structures for neuromorphic applications may include a first layer overlying a substrate material. The first layer may be or include a first oxide material. The structures may include a second layer disposed adjacent the first layer. The second layer may be or include a second oxide material. The structures may also include an electrode material deposited overlying the second layer.

Abstract: A system includes a mounting panel having diffusion-bonded metal plates that form a reservoir to contain a process fluid, multiple channels through which to flow the process fluid, and vias through which to flow the process fluid to and from process fluid control components attached to the mounting panel. At least a pair of the multiple channels are connected with the reservoir. A temperature sensor is attached to a top of the mounting panel, the temperature sensor in fluid communication with the reservoir through one of the vias. A set of inlet ports are attached to the mounting panel, the set of inlet ports to receive the process fluid. At least one outlet port is attached to the mounting panel, the at least one outlet port to output the process fluid from the mounting panel.

Abstract: Methods of forming devices comprise forming a dielectric material on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom. The methods include passivating a metal material at a bottom of the gap with an alkyl reactant to form a passivation layer on the metal material, the gap defined by the bottom and sidewalls comprising the dielectric material with having a barrier layer thereon. A metal liner is selectively deposited on the barrier layer on the sidewall over the passivation layer on the bottom.

Abstract: Exemplary processing methods may include providing a treatment precursor to a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region. The substrate may include a layer of a silicon-containing material. The methods may include forming inductively-coupled plasma effluents of the treatment precursor. The methods may include contacting the layer of the silicon-containing material with the inductively-coupled plasma effluents of the treatment precursor to produce a treated layer of the silicon-containing material. The contacting may reduce a dielectric constant of the layer of the silicon-containing material.

Abstract: Embodiments of the disclosure relate to methods of etching a copper material. In some embodiments, the copper material is exposed to a halide reactant to form a copper halide species. The substrate is then heated to remove the copper halide species. In some embodiments, the etching methods are performed at relatively low temperatures. Additional embodiments of the disclosure relate to methods of copper gapfill. In some embodiments, a copper material within a substrate feature is exposed to a halide reactant to form a copper halide species. The copper halide species is then heated and flowed to fill at least a portion of the substrate feature. The reflow methods are performed at lower temperatures than similar reflow methods without formation of the copper halide species.

Abstract: Semiconductor processing methods are described that include providing a substrate to a reaction chamber, where the substrate includes substrate trenches that have a top surface and a bottom surface. A deposition gas that includes a carbon-containing gas and a nitrogen-containing gas flows into a plasma excitation region of the reaction chamber. A deposition plasma having an electron temperature less than or about 4 eV is generated from the deposition gas. The methods further include depositing a carbon-containing layer on the top surface and the bottom surface of the substrate trenches, where the as-deposited carbon-containing layer has a top surface-to-bottom surface thickness ratio of greater than or about 3:1. Also described are semiconductor structures that include an as-deposited carbon-containing layer on the top and bottom surface of at least a first and second trench, where the carbon-containing layer has a top surface-to-bottom surface thickness ratio of greater than or about 3:1.

Abstract: Cooling flanges and semiconductor manufacturing processing chamber comprising the cooling flanges are disclosed. The cooling flanges comprise a flange body with a gas channel extending through the length thereof. The gas channel has an inlet funnel, a middle channel and an outlet funnel with a purge gas inlet in a side of the flange body. The purge gas inlet connects to the middle channel of the gas channel.

Abstract: Embodiments of the present disclosure are directed to selective etching processes. The processes include an etching chemistry (a plasma of a fluorine-containing precursor and a first gas mixture), and a passivating chemistry (a plasma of a sulfur-containing precursor and a second gas mixture). In some embodiments, the sulfur-containing precursor and the second gas mixture are present in a ratio of sulfur-containing precursor to second gas mixture in a range of from 0.01 to 5. The methods include etching a substrate having a plurality of alternating layers of silicon oxide and silicon nitride thereon and a trench formed through the plurality of alternating layers. The silicon nitride layers are selectively etched relative to the silicon oxide layers at an etch selectivity of greater than or equal to 500:1.

Abstract: Exemplary methods of semiconductor processing may include methods for nonconformally building up silicon-and-oxygen-containing material where the top of the feature preferentially fills at a slower rate as compared to the bottom of the feature. Such methods may include iterative nonconformal etching operations and/or iterative nonconformal inhibition operations. For example, after building up a layer comprising silicon-and-oxygen-containing material, the layer may be nonconformally etched before building up another layer comprising silicon-and-oxygen-containing material. In another example, in the building up of the layer, an inhibitor may be introduced preferentially at and near the top of the features to provide nonconformal buildup of the silicon-and-oxygen-containing material.

Abstract: Substrate support assembly and methods of making such substrate support assemblies are provided. Substrate support assemblies include an electrostatic chuck body defining a substrate support surface, a support stem coupled with the electrostatic chuck body, and an electrode embedded within the electrostatic chuck body. Substrate support surfaces exhibit a resistivity of 1×108 ?-cm to 1×1011 ?-cm at a temperature of greater than 650° C. Substrate support surfaces can include a composite ceramic material having a base dielectric material and a second dielectric material having an electrical resistivity at least about two times higher than an electrical resistivity of the base dielectric material at a temperature of greater than 650° C.

Abstract: Exemplary processing methods may include i) providing one or more deposition precursors to a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region. The substrate may include one or more features defining one or more sidewalls. The methods may include ii) forming plasma effluents of the one or more deposition precursors. The methods may include iii) contacting the substrate with the plasma effluents of the one or more deposition precursors. The contacting may deposit a doped silicon-and-oxygen-containing material on the substrate. A first portion of the doped silicon-and-oxygen-containing material deposited on the one or more sidewalls of the one or more features may be characterized by a poorer film quality than a second portion of the doped silicon-and-oxygen-containing material deposited on a lower portion of the one or more features.

Abstract: Exemplary methods of semiconductor processing may include iteratively repeating a deposition cycle several times on a substrate disposed within a processing region of a semiconductor processing chamber. Each deposition cycle may include depositing a silicon-containing material on the substrate and exposing the silicon-containing material to a first oxygen plasma to convert the silicon-containing material to a silicon-and-oxygen-containing material. After the iterative repeating of the deposition cycle, the method may include performing a densification operation by exposing the silicon-and-oxygen-containing material to a second oxygen plasma to produce a densified silicon-and-oxygen-containing material where the quality of the densified silicon-and-oxygen-containing material is greater than the silicon-and-oxygen-containing material. The method may further include iteratively repeating the iteratively repeated deposition cycles and the densification operation several times.

Abstract: A system for discharging a region of a sample, the system includes (i) illumination optics that is configured to discharge the region by illuminating the region of the sample with a laser pulse during an illumination iteration; and (ii) a timing circuit that is configured to trigger the illumination iteration to occur at a timing that is based on one or more timing constraints associated with a scanning of the region by an electron beam.