Patents Assigned to Applied Materials
  • Patent number: 11024522
    Abstract: The present disclosure relate to methods and apparatus for temperature sensing and control during substrate processing. Substrate temperatures during processing, which are difficult to measure directly, may be determined by examination of deposited film properties or by measuring changes in power output over time of the substrate heating apparatus. Temperatures are determined for many substrates during processing, showing how substrate temperatures change over time, and the temperature changes are then used to build models via machine learning techniques. The models are used to adjust heating apparatus setpoints for future processing operations.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: June 1, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Hemant Mungekar, Uwe P. Haller, Ganesh Balasubramanian
  • Patent number: 11022877
    Abstract: Embodiments include wafer and photomask processing equipment. An etch processing system including an endpoint detection system having a light source and a photodetector is described. In an example, the light source emits light toward an alignment region over a substrate support member of an etch chamber, and the photodetector receives a reflection of the light from the alignment region. The reflection is monitored for endpoint and process control. A second light source emits light toward the alignment region, and a camera receives the light to image the alignment region. The image can be used to align the light emitted by the endpoint detection system to a spot location within the alignment region, e.g., within an alignment opening of a substrate mounted on the substrate support member.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: June 1, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Michael N. Grimbergen, Khiem K. Nguyen
  • Publication number: 20210159048
    Abstract: A plasma processing system is described. The system may include a showerhead. The system may further include a first RF generator in electrical communication with the showerhead. The first RF generator may be configured to deliver a first voltage at a first frequency to the showerhead. Additionally, the system may include a second RF generator in electrical communication with a pedestal. The second RF generator may be configured to deliver a second voltage at a second frequency to the pedestal. The second frequency may be less than the first frequency. The system may also include a terminator in electrical communication with the showerhead. The terminator may provide a path to ground for the second voltage. Methods of depositing material using the plasma processing system are described. A method of seasoning a chamber by depositing silicon oxide and silicon nitride on the wall of the chamber is also described.
    Type: Application
    Filed: November 25, 2019
    Publication date: May 27, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Venkata Sharat Chandra Parimi, Xiaoquan Min, Zheng John Ye, Prashant Kumar Kulshreshtha, Vinay K. Prabhakar, Lu Xu, Kwangduk Douglas Lee
  • Publication number: 20210159070
    Abstract: Methods for pre-cleaning substrates having metal and dielectric surfaces are described. A substrate comprising a surface structure with a metal bottom, dielectric sidewalls, and a field of dielectric is exposed to a dual plasma treatment in a processing chamber to remove chemical residual and/or impurities from the metal bottom, the dielectric sidewalls, and/or the field of the dielectric and/or repair surface defects in the dielectric sidewalls and/or the field of the dielectric. The dual plasma treatment comprises a direct plasma and a remote plasma.
    Type: Application
    Filed: November 23, 2020
    Publication date: May 27, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Yi Xu, Yufei Hu, Kazuya Daito, Yu Lei, Dien-Yeh Wu, Jallepally Ravi
  • Publication number: 20210156028
    Abstract: Exemplary semiconductor processing chambers may include a gasbox. The chambers may include a substrate support. The chambers may include a blocker plate positioned between the gasbox and the substrate support. The blocker plate may define a plurality of apertures through the plate. The chambers may include a faceplate positioned between the blocker plate and substrate support. The faceplate may be characterized by a first surface facing the blocker plate and a second surface opposite the first surface. The second surface of the faceplate and the substrate support may at least partially define a processing region within the semiconductor processing chamber. The faceplate may be characterized by a central axis, and the faceplate may define a plurality of apertures through the faceplate. The faceplate may define a central recess about the central axis extending from the second surface of the faceplate to a depth less than a thickness of the faceplate.
    Type: Application
    Filed: November 27, 2019
    Publication date: May 27, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Fang Ruan, Prashant Kumar Kulshreshtha, Jiheng Zhao, Diwakar Kedlaya
  • Publication number: 20210159118
    Abstract: Described are methods for controlling the doping of metal nitride films such as TaN, TiN and MnN. The temperature during deposition of the metal nitride film may be controlled to provide a film density that permits a desired amount of doping. Dopants may include Ru, Cu, Co, Mn, Mo, Al, Mg, Cr, Nb, Ta, Ti and V. The metal nitride film may optionally be exposed to plasma treatment after doping.
    Type: Application
    Filed: January 7, 2021
    Publication date: May 27, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Annamalai Lakshmanan, Ben-Li Sheu, Guodan Wei, Nicole Lundy, Paul F. Ma
  • Publication number: 20210159073
    Abstract: Exemplary deposition methods may include forming a plasma of an oxygen-containing precursor within a processing region of a semiconductor processing chamber. The processing region may house a semiconductor substrate on a substrate support. The methods may include, while maintaining the plasma of the oxygen-containing precursor, flowing a silicon-containing precursor into the processing region of the semiconductor processing chamber at a first flow rate. The methods may include ramping the first flow rate of the silicon-containing precursor over a period of time to a second flow rate greater than the first flow rate. The methods may include depositing a silicon-containing material on the semiconductor substrate.
    Type: Application
    Filed: November 27, 2019
    Publication date: May 27, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Madhu Santosh Kumar Mutyala, Sanjay Kamath, Deenesh Padhi
  • Publication number: 20210159052
    Abstract: Provided is a processing chamber configured to contain a semiconductor substrate in a processing region of the chamber. The processing chamber includes a remote plasma unit and a direct plasma unit, wherein one of the remote plasma unit or the direct plasma unit generates a remote plasma and the other of the remote plasma unit or the direct plasma unit generates a direct plasma. The combination of a remote plasma unit and a direct plasma unit is used to remove, etch, clean, or treat residue on a substrate from previous processing and/or from native oxide formation. The combination of a remote plasma unit and direct plasma unit is used to deposit thin films on a substrate.
    Type: Application
    Filed: November 23, 2020
    Publication date: May 27, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Kazuya Daito, Yi Xu, Yu Lei, Takashi Kuratomi, Jallepally Ravi, Pingyan Lei, Dien-Yeh Wu
  • Publication number: 20210155646
    Abstract: Halide ligand free rhenium complexes are described as well as methods for depositing rhenium-containing films. Some embodiments provide a rhenium complex with a general formula of O3ReO-M-R1R2R3, where M is a group IV element, R1 is selected from H, alkyl, alkenyl, alkynyl, an aromatic ring, or alkoxy, and R2 and R3 are each independently selected from H, alkyl, alkenyl, alkynyl, an aromatic ring, or alkoxy, or R2 and R3 join together to form a ring structure or an oxo group. Some embodiments provide a rhenium complex with a general formula of Re(NR?)3(NHR?), where R? and R? are independently selected from H, alkyl, alkenyl, alkynyl, or an aromatic ring.
    Type: Application
    Filed: November 20, 2020
    Publication date: May 27, 2021
    Applicants: Applied Materials, Inc., Wayne State University
    Inventors: Thomas Knisley, Keenan N. Woods, Mark Saly, Charles H. Winter, Stefan Cwik
  • Publication number: 20210159043
    Abstract: An apparatus is provided. The apparatus may include a main chamber, an entrance tunnel, the entrance tunnel having an entrance axis extending into the main chamber; an exit tunnel, connected to the main chamber and defining an exit axis, wherein the entrance tunnel and the exit tunnel define a beam bend of less than 25 degrees therebetween, and an electrode assembly, disposed in the main chamber, and defining a beam path between the entrance tunnel and the exit tunnel. The electrode assembly may include an upper electrode, disposed on a first side of the beam path, and a plurality of lower electrodes, disposed on a second side of the beam path, the plurality of lower electrodes comprising at least three electrodes.
    Type: Application
    Filed: February 4, 2021
    Publication date: May 27, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Alexandre Likhanskii, Frank Sinclair, Shengwu Chang
  • Publication number: 20210159107
    Abstract: Embodiments of the present technology may include an electrostatic chuck. The chuck may include a top surface, defining a recessed portion of the chuck. The recessed portion of the chuck may be configured to support a substrate. The chuck may further include a first electrode and a second electrode. The first electrode and the second electrode may be disposed within the chuck. The first electrode and the second electrode may be substantially coplanar. In addition, the chuck may include a third electrode. The third electrode may be disposed within the chuck. Furthermore, the third electrode may have an annular shape. The third electrode may be separated from the first electrode and the second electrode. In addition, the third electrode may be substantially parallel to the first electrode and the second electrode. Systems and methods including the electrostatic chuck are also described.
    Type: Application
    Filed: November 21, 2019
    Publication date: May 27, 2021
    Applicant: Applied Materials, Inc.
    Inventor: Hyung Je Woo
  • Publication number: 20210159053
    Abstract: Exemplary semiconductor processing chambers may include a gasbox characterized by a first surface and a second surface opposite the first surface. The gasbox may define a central aperture. The gasbox may define an annular channel extending about the central aperture. The annular channel may be fluidly accessible from the first surface of the gasbox. The gasbox may further define a plurality of outlet apertures extending from the annular channel through the second surface of the gasbox.
    Type: Application
    Filed: November 27, 2019
    Publication date: May 27, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Mingle Tong, Li-Qun Xia, Daemian Raj Benjamin Raj
  • Publication number: 20210159408
    Abstract: A selector device for a memory cell in a memory array includes a first electrode, a second electrode, and a separator between the first electrode and the second electrode. The separator includes a mixed ionic-electronic conduction material with first ions having a first charge such that the first ions respond to a voltage applied between the first electrode and the second electrode by moving away from the first electrode. The separator is doped near the second electrode with second ions having a second charge that opposes the first charge.
    Type: Application
    Filed: November 21, 2019
    Publication date: May 27, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Milan Pe{hacek over (s)}ic, Luca Larcher, Bastien Beltrando
  • Patent number: 11018036
    Abstract: Methods, apparatus, and assemblies are provided for a substrate carrier adapter insert including an adapter frame including a support rail adapted to support one or more substrates in a substrate carrier, a frame extension coupled to, or integral with, the adapter frame, and a mapping feature formed on the frame extension and disposed to be detected by a sensor for determining whether an adapter insert is present or absent in a substrate carrier. Numerous additional features are disclosed.
    Type: Grant
    Filed: August 13, 2018
    Date of Patent: May 25, 2021
    Assignee: Applied Materials, Inc.
    Inventors: John J. Mazzocco, Edward Ng, Douglas MacLeod, David Phillips, Ayan Majumdar, Jeffrey C. Hudgens
  • Patent number: 11017524
    Abstract: A metrology system for obtaining a measurement representative of a thickness of a layer on a substrate includes a camera positioned to capture a color image of at least a portion of the substrate. A controller is configured to receive the color image from the camera, store a predetermined path in a coordinate space of at least two dimension including a first color channel and a second color channel, store a function that provides a value representative of a thickness as a function of a position on the predetermined path, determine a coordinate of a pixel in the coordinate space from color data in the color image for the pixel, determine a position of a point on the predetermined path that is closest to the coordinate of the pixel, and calculate a value representative of a thickness from the function and the position of the point on the predetermined path.
    Type: Grant
    Filed: June 7, 2019
    Date of Patent: May 25, 2021
    Assignee: Applied Materials, Inc.
    Inventor: Dominic J. Benvegnu
  • Patent number: 11017984
    Abstract: Implementations of the present disclosure include methods and apparatuses utilized to reduce particle generation within a processing chamber. In one implementation, a lid for a substrate processing chamber is provided. The lid includes a cover member having a first surface and a second surface opposite the first surface, a central opening through the cover member, wherein an inner profile of the central opening includes a first section having a first diameter, a second section having a second diameter, and a third section having a third diameter, wherein the second diameter is between the first diameter and the third diameter, and the first diameter increases from the second section toward the first surface of the cover member, and a trench formed along a closed path in the first surface and having a recess formed in an inner surface of the trench.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: May 25, 2021
    Assignee: Applied Materials, Inc.
    Inventor: Bernard L. Hwang
  • Patent number: 11016736
    Abstract: Embodiments presented herein provide techniques for executing a block-based (BB) workflow to solve a constraint programming (CP) model related to a semiconductor manufacturing environment. Embodiments include receiving at least one BB workflow comprising a plurality of blocks. The plurality of blocks may specify a set of operations. Embodiments include accessing a plurality of block definitions corresponding to the plurality of blocks. Embodiments include executing the at least one BB workflow by performing the set of operations based on the plurality of block definitions, including extracting data from the semiconductor manufacturing environment, the data comprising both static data and dynamic data related to equipment in the manufacturing environment, creating the CP model based on the data and at least one constraint defined in the BB workflow, using a solver to determine a solution to the CP model; and publishing the solution to at least one component in the semiconductor manufacturing environment.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: May 25, 2021
    Assignee: Applied Materials, Inc.
    Inventor: David Everton Norman
  • Patent number: 11018223
    Abstract: The present disclosure provide methods for forming nanowire structures with desired materials horizontal gate-all-around (hGAA) structures field effect transistor (FET) for semiconductor chips. In one example, a method of forming nanowire structures on a substrate includes forming a multi-material layer on a bottom structure on a substrate, wherein the multi-material layer includes repeating pairs of a first layer and a second layer, selectively removing the second layer from the multi-material layer from the substrate, and selectively oxidizing the bottom structure on the substrate after removing the second layer from the multi-material layer.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: May 25, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Shiyu Sun, Nam Sung Kim, John O. Dukovic
  • Patent number: 11017986
    Abstract: Disclosed embodiments generally relate to a processing chamber that includes a perforated lid, a gas blocker disposed on the perforated lid, and a substrate support disposed below the perforated lid. The gas blocker includes a gas manifold, a central gas channel formed in the gas manifold, a first gas distribution plate that includes inner and outer trenches surrounding the central gas channel, and a first and second gas channels formed in the gas manifold. The first gas channel is in fluid communication with a first gas source and the inner trench, and the second gas channel is in fluid communication with the first gas source and the outer trench and a second gas distribution plate The first gas channel is in further fluid communication with a third gas distribution plate that is disposed below the second gas distribution plate, and a plurality of pass-through channels that are disposed between the second gas distribution plate and the third gas distribution plate.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: May 25, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Sanjeev Baluja, Yi Yang, Truong Nguyen, Nattaworn Boss Nunta, Joseph F. Aubuchon, Tuan Anh Nguyen, Karthik Janakiraman
  • Patent number: 11017207
    Abstract: Certain aspects of the present disclosure provide techniques for automatically detecting and classifying tumor regions in a tissue slide. The method generally includes obtaining a digitized tissue slide from a tissue slide database and determining, based on output from a tissue classification module, a type of tissue of shown in the digitized tissue slide. The method further includes determining, based on output from a tumor classification model for the type of tissue, a region of interest (ROI) of the digitized tissue slide and generating a classified slide showing the ROI of the digitized tissue slide and an estimated diameter of the ROI. The method further includes displaying on an image display unit, the classified slide and user interface (UI) elements enabling a pathologist to enter input related to the classified slide.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: May 25, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Parijat Prakash Prabhudesai, Ganesh Kumar Mohanur Raghunathan, Sumit Kumar Jha, Aditya Sista, Narasimha Murthy Chandan