Patents Assigned to Applied Materials
  • Publication number: 20210130176
    Abstract: A colloidal silica solution which includes two or more colloidal silica compositions or suspensions having differing particle sizes and specific surface areas, the compositions or suspensions resulting in a multimodal particle size distribution in which the solution or suspension can be bimodal in nature and composed of, but not limited to, particles with a mode of 4 nm and 20 nm or composed of particles 7 nm and 12 nm. The solution or suspension can also be trimodal and composed of, but not limited to, 4 nm, 7 nm and 15 nm or 3 nm, 5 nm, and 20 nm. The solution or suspension can also include other multimodal systems which would give superior water drainage and fiber and ash retention on paper machines. The colloidal silica solution is a drainage and retention aid in the making of paper.
    Type: Application
    Filed: October 5, 2020
    Publication date: May 6, 2021
    Applicant: Applied Material Solutions, Inc.
    Inventors: Thomas Rebernak, Robert Ellis Wilson, Michael Timothy Jennings
  • Publication number: 20210130174
    Abstract: Deposition methods may prevent or reduce crystallization of silicon in a deposited amorphous silicon film that may occur after annealing at high temperatures. The crystallization of silicon may be prevented by doping the silicon with an element. The element may be boron, carbon, or phosphorous. Doping above a certain concentration for the element prevents substantial crystallization at high temperatures and for durations at or greater than 30 minutes. Methods and devices are described.
    Type: Application
    Filed: October 27, 2020
    Publication date: May 6, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Aykut Aydin, Krishna Nittala, Karthik Janakiraman, Yi Yang, Gautam K. Hemani
  • Publication number: 20210134592
    Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and a carrier precursor to a processing region of a semiconductor processing chamber. The methods may include forming a plasma of the silicon-containing precursor and the carrier precursor within the processing region of the semiconductor processing chamber. The methods may include depositing a first amount of a silicon-containing material on a substrate disposed within the processing region of the semiconductor processing chamber. The depositing may occur at a first chamber pressure. The methods may include adjusting the first chamber pressure to a second chamber pressure less than the first chamber pressure. The methods may include depositing a second amount of the silicon-containing material on the first amount of the silicon-containing material.
    Type: Application
    Filed: October 27, 2020
    Publication date: May 6, 2021
    Applicant: Applied Materials, inc.
    Inventors: Madhu Santosh Kumar Mutyala, Sanjay Kamath, Deenesh Padhi
  • Publication number: 20210130960
    Abstract: Exemplary temperature modulation methods may include delivering a gas through a purge line extending within a substrate support. The gas may be directed to a backside surface of the substrate support opposite a substrate support surface. The purge line may extend along a central axis of a shaft, the shaft being hermetically sealed with the substrate support. The substrate support may be characterized by a center and a circumferential edge. A first end of the purge line may be fixed at a first distance from the backside surface of the substrate support. The methods may include flowing the gas at a first flow rate via a flow pathway to remove heat from the substrate support to achieve a desired substrate support temperature profile.
    Type: Application
    Filed: October 30, 2020
    Publication date: May 6, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Zubin Huang, Rui Cheng, Jian Li
  • Patent number: 10996572
    Abstract: The present disclosure generally relates to photolithography systems, and methods for correcting positional errors in photolithography systems. When a photolithography system is first started, the system enters a stabilization period. During the stabilization period, positional readings and data, such as temperature, pressure, and humidity data, are collected as the system prints or exposes a substrate. A model is created based on the collected data and the positional readings. The model is then used to estimate errors in subsequent stabilization periods, and the estimated errors are dynamically corrected during the subsequent stabilization periods.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: May 4, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Tamer Coskun, Muhammet Poyraz, Qin Zhong, Pacha Mongkolwongrojn
  • Patent number: 10998195
    Abstract: Embodiments described herein relate to methods and materials for fabricating semiconductor device structures. In one example, a metal film stack includes a plurality of metal containing films and a plurality of metal derived films arranged in an alternating manner. In another example, a metal film stack includes a plurality of metal containing films which are modified into metal derived films. In certain embodiments, the metal film stacks are used in oxide/metal/oxide/metal (OMOM) structures for memory devices.
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: May 4, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Susmit Singha Roy, Yingli Rao, Srinivas Gandikota
  • Patent number: 10994389
    Abstract: A method of polishing a layer on the substrate at a polishing station includes the actions of monitoring the layer during polishing at the polishing station with an in-situ monitoring system to generate a plurality of measured signals for a plurality of different locations on the layer; generating, for each location of the plurality of different locations, an estimated measure of thickness of the location, the generating including processing the plurality of measured signals through a neural network; and at least one of detecting a polishing endpoint or modifying a polishing parameter based on each estimated measure of thickness.
    Type: Grant
    Filed: April 13, 2018
    Date of Patent: May 4, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Kun Xu, Hassan G. Iravani, Denis Ivanov, Boguslaw A. Swedek, Shih-Haur Shen, Harry Q. Lee, Benjamin Cherian
  • Patent number: 10995419
    Abstract: Embodiment disclosed herein include a liner assembly, comprising an injector plate liner, a gas injector liner coupled to the injector plate liner, an upper process gas liner coupled to the gas injector liner, a lower process gas liner coupled to the upper process gas liner, and an injector plate positioned between the injector plate liner and the upper process gas liner, wherein a cooling fluid channel is formed in the injector plate adjacent to the gas injector liner.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: May 4, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Brian H. Burrows, Ala Moradian, Kartik Shah, Shu-Kwan Lau
  • Patent number: 10994991
    Abstract: Methods are provided for manufacturing well-controlled, solid-state nanopores and arrays of well-controlled, solid-state nanopores by a cyclic process including atomic layer deposition (ALD), or chemical vapor deposition (CVD), and etching. One or more features are formed in a thin film deposited on a topside of a substrate. A dielectric material is deposited over the substrate having the one or more features in the thin film. An etching process is then used to etch a portion of the dielectric material deposited over the substrate having the one or more features in the thin film. The dielectric material deposition and etching processes are optionally repeated to reduce the size of the features until a well-controlled nanopore is formed through the thin film on the substrate.
    Type: Grant
    Filed: February 17, 2020
    Date of Patent: May 4, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Joseph R. Johnson, Kenichi Ohno
  • Patent number: 10998200
    Abstract: The present disclosure provides methods for performing an annealing process on a metal containing layer in TFT display applications, semiconductor or memory applications. In one example, a method of forming a metal containing layer on a substrate includes supplying an oxygen containing gas mixture on a substrate in a processing chamber, the substrate comprising a metal containing layer disposed on an optically transparent substrate, maintaining the oxygen containing gas mixture in the processing chamber at a process pressure between about 2 bar and about 50 bar, and thermally annealing the metal containing layer in the presence of the oxygen containing gas mixture.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: May 4, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Kaushal K. Singh, Mei-Yee Shek, Srinivas D. Nemani, Ellie Y. Yieh
  • Publication number: 20210123136
    Abstract: The use of a cyclic 1,4-diene reducing agent with a metal precursor and a reactant to form metal-containing films are described. Methods of forming the metal-containing film comprises exposing a substrate surface to a metal precursor, a reducing agent and a reactant either simultaneously, partially simultaneously or separately and sequentially to form the metal-containing film.
    Type: Application
    Filed: October 29, 2020
    Publication date: April 29, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Lakmal C. Kalutarage, Liqi Wu, Pratham Jain, Jeffrey W. Anthis, Mark Saly, Mei Chang, David Thompson
  • Publication number: 20210125820
    Abstract: Methods of depositing a film using a plasma enhanced process are described. The method comprises providing continuous power from a power source connected to a microwave plasma source in a process chamber and a dummy load, the continuous power split into pulses having a first time and a second time defining a duty cycle of a pulse. The continuous power is directed to the microwave plasma source during the first time, and the continuous power is directed to the dummy load during the second time.
    Type: Application
    Filed: October 21, 2020
    Publication date: April 29, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Farhad Moghadam, Hari Ponnekanti, Dmitry A. Dzilno
  • Publication number: 20210124256
    Abstract: Extreme ultraviolet (EUV) mask blanks, methods for their manufacture and production systems therefor are disclosed. The EUV mask blanks comprise a an absorber layer on the capping layer, the absorber layer made from an alloy of at least two absorber materials.
    Type: Application
    Filed: December 24, 2020
    Publication date: April 29, 2021
    Applicant: Applied Materials, Inc.
    Inventor: Vibhu Jindal
  • Publication number: 20210124252
    Abstract: Methods for the manufacture of extreme ultraviolet (EUV) mask blanks and production systems therefor are disclosed. A method for forming an EUV mask blank comprises forming a bilayer on a portion of a multi-cathode PVD chamber interior and then forming a multilayer stack of Si/Mo on a substrate in the multi-cathode PVD chamber.
    Type: Application
    Filed: October 22, 2020
    Publication date: April 29, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Wen Xiao, Sanjay Bhat, Shiyu Liu, Binni Varghese, Vibhu Jindal, Azeddine Zerrade
  • Publication number: 20210124253
    Abstract: Extreme ultraviolet (EUV) mask blanks, methods for their manufacture, and production systems therefor are disclosed. A method for forming an EUV mask blank comprises placing a substrate in a multi-cathode physical vapor deposition chamber, depositing a multilayer stack, removing the substrate from the chamber and passivating the PVD chamber.
    Type: Application
    Filed: October 22, 2020
    Publication date: April 29, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Herng Yau Yoong, Wen Xiao, Vibhu Jindal, Shuwei Liu, Sanjay Bhat, Azeddine Zerrade
  • Patent number: 10991547
    Abstract: A carrier proximity mask and methods of assembling and using the carrier proximity mask may include providing a first carrier body, second carrier body, and set of one or more clamps. The first carrier body may have one or more openings formed as proximity masks to form structures on a first side of a substrate. The first and second carrier bodies may have one or more contact areas to align with one or more contact areas on a first and second sides of the substrate. The set of one or more clamps may clamp the substrate between the first carrier body and the second carrier body at contact areas to suspend work areas of the substrate between the first and second carrier bodies. The openings to define edges to convolve beams to form structures on the substrate.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: April 27, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Morgan Evans, Charles T. Carlson, Rutger Meyer Timmerman Thijssen, Ross Bandy, Ryan Magee
  • Patent number: 10991546
    Abstract: A monitoring circuit that includes a pickup loop to monitor a voltage applied to a cavity of a linear accelerator is disclosed. The monitoring circuit is electrically isolated from the linear accelerator and is also electrically isolated from the controller that receives input from the circuit and controls the linear accelerator. In certain embodiments, the monitoring circuit also includes an energy harvester so as to capture energy without any physical connection to the controller. This may be achieved using light energy or electromagnetic energy, for example. In certain embodiments, the monitoring circuit includes an analog-to-digital converter to convert the signals received from the pickup loop to digital values. In other embodiments, the monitoring circuit passes analog voltages to the controller. The outputs from the monitoring circuit may include the amplitude and phase of the voltage being applied to the respective cavity.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: April 27, 2021
    Assignee: Applied Materials, Inc.
    Inventor: Keith E. Kowal
  • Patent number: 10988843
    Abstract: A system for determining when a cleaning process has completed is disclosed. This system relies on an increase in the amount of gas in the processing chamber that occurs when the cleaning is complete. This increase in the amount of gas may be detected in several ways. In one embodiment, a downstream pendulum valve is used to maintain the pressure within the processing chamber at a predetermined value. An increase in the size of the opening in the pendulum valve is indicative of the amount of gas in the system. In another embodiment, a sensor may be used to monitor the pressure within the processing chamber, while the incoming and outgoing flow rates are held constant. An increase in the pressure is indicative of an increase in the amount of gas in the processing chamber. This increase in the amount of gas is used to terminate the cleaning process.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: April 27, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Il-Woong Koo, Cuiyang Wang, Peter G. Ryan, Jr., Jun Seok Lee
  • Patent number: 10991552
    Abstract: Embodiments of the invention generally provide a cooling mechanism utilized in a plasma reactor that may provide efficient temperature control during a plasma process. In one embodiment, a cooling mechanism disposed in a plasma processing apparatus includes a coil antenna enclosure formed in a processing chamber, a coil antenna assembly disposed in the coil antenna enclosure, a plurality of air circulating elements disposed in the coil antenna enclosure adjacent to the coil antenna assembly, and a baffle plate disposed in the coil antenna enclosure below and adjacent to the coil antenna assembly.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: April 27, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Aniruddha Pal, Victor Calderon, Martin Jeffrey Salinas, Valentin N. Todorow
  • Publication number: 20210119021
    Abstract: Electronic devices and methods of forming electronic devices with gate-all-around non-I/O devices and finlike structures for I/O devices are described. A plurality of dummy gates is etched to expose a fin comprising alternating layers of a first material and a second material. The second material layers are removed to create openings and the first material layers remaining are epitaxially grown to form a finlike structure.
    Type: Application
    Filed: October 22, 2020
    Publication date: April 22, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Benjamin Colombeau, Matthias Bauer, Naved Ahmed Siddiqui, Phillip Stout