Abstract: Rejecting radio frequency (RF) interference in a communication system. In one aspect, rejecting RF interference includes receiving a signal on a signal path of a receiver from a communication channel, the signal including one or more received signal components having a frequency within a predetermined subset range of frequencies within an operating signal bandwidth of the receiver. The received signal components are attenuated using a notch filter to reduce RF interference obtained during transmission of the signal over the communication channel. In some embodiments, the one or more signal components have been boosted in power at a link partner transmitter connected to the communication channel.

Abstract: A method of operation in a high-speed Ethernet transceiver is disclosed. The method includes engaging in an autonegotiation process with a link partner transceiver to indicate whether one or more sub-rate modes of operation are supported. Each sub-rate mode of operation corresponds to a sub-data rate that is less than a maximum data rate. The autonegotiation process is terminated. The transceiver then participates in a training process. The training process includes receiving a first training sequence corresponding to a first sub-data rate that is less than the maximum data rate. A signal quality parameter for the received first training sequence is measured. The training sequence is terminated based on the measured signal quality parameter failing a predetermined criteria. A second training sequence is then initiated that corresponds to a second sub-data rate that is less than the first sub-data rate without starting a second autonegotiation process.

Abstract: Methods and apparatus for transmitting Ethernet data along an Ethernet link with a BASE-T transceiver are disclosed. One exemplary BASE-T Ethernet transceiver includes an Ethernet data framing module having an input interface to receive Ethernet block data bits at a first data rate. Logic associates the Ethernet block data bits with an auxiliary bit and a number of zero bits. An error encoder is coupled to the logic to encode all of the data bits, auxiliary bit and zero bits into an error encoded transport frame having plural error check bits. A symbol mapper receives the error encoded transport frame and transforms the error encoded transport frame into multiple symbols. A transmitter coupled to the symbol mapper transmits the multiple symbols over an Ethernet link at one of a selection of symbol rates. The data rate of data transmitted over the Ethernet link is based on the number of zero bits.

Abstract: Methods and apparatus for transferring data along a link with a 10GBASE-T transceiver at a variable data rate are disclosed. One exemplary method includes detecting a link quality metric; and selecting a symbol transmission rate and a data modulation scheme based on the detected link quality metric. In many implementations, for a selected symbol transmission rate, if the detected link quality metric is less than a link quality threshold, then the selecting of the data modulation scheme is performed such that a data bit per symbol value represented by the selected data modulation scheme is decreased by at least ½ data bit per symbol. The selected symbol transmission rate and the selected modulation together represent a selectable data rate from a selection of data rates.

Abstract: A 10GBASE-T circuit is disclosed. The circuit includes a physical (PHY) integrated circuit and a media access control (MAC) integrated circuit. The PHY couples to a data transfer medium and carries out data transfers at a PHY data rate. The MAC integrated circuit controls access to the date transfer medium and couples to the PHY via a bidirectional link operating at a MAC data rate. Rate control logic detects the PHY data rate, and adjusts the MAC data rate to the PHY data rate. Changes to the PHY and MAC data rates may be made at rates higher than 1 Gbps.

Abstract: Embodiments of methods and apparatus for reducing electromagnetic interference of a received signal are disclosed. One method includes receiving a signal over at least two conductors, extracting a common-mode signal from the at least two conductors, processing the common-mode signal, and reducing electromagnetic interference of the received signal by summing the processed common-mode signal with the received signal.

Abstract: In a first embodiment of the present invention, a clock recovery system is provided comprising: a phase comparator; an integrator coupled to the phase comparator; a numerically controlled oscillator coupled to the integrator; and a mixer coupled to the numerically controlled oscillator and to the phase comparator.

Abstract: A voltage mode transceiver having an input/output (I/O) node for coupling to a bidirectional signaling link is disclosed. The transceiver includes a transmit circuit having an output coupled to the node and a receive circuit. The transmit circuit includes a transmit digital-to-analog converter (DAC) circuit having a transmit impedance network and a hybrid impedance network. The transmit impedance network generates an analog transmit version of a digital data signal while the hybrid impedance network couples to the transmit impedance network to generate an analog mirror version of the digital data signal. The receive circuit has a first input coupled to the I/O node and a second input coupled to receive the analog mirror version of the digital data signal.

Abstract: Methods and apparatus for transferring data along a link with a 10GBASE-T transceiver at a variable data rate are disclosed. One exemplary method includes detecting a link quality metric; and selecting a symbol transmission rate and a data modulation scheme based on the detected link quality metric. In many implementations, for a selected symbol transmission rate, if the detected link quality metric is less than a link quality threshold, then the selecting of the data modulation scheme is performed such that a data bit per symbol value represented by the selected data modulation scheme is decreased by at least ½ data bit per symbol. The selected symbol transmission rate and the selected modulation together represent a selectable data rate from a selection of data rates.

Abstract: A method is disclosed for correcting bit errors in a block-coded data frame. The method includes receiving a plurality of block-coded symbols, each symbol including at least one unencoded bit; detecting a bit error in one of the plurality of symbols associated with the unencoded bits, the detecting carried out in accordance with an error detection algorithm; identifying the symbol having the bit error from among the plurality of symbols based on the error detection algorithm; and correcting the bit error in the identified symbol.

Abstract: A circuit for a wireline system is disclosed. In an embodiment, the circuit includes a twisted pair channel. The twisted pair channel delivers a differential signal that includes a converter mode component. The circuit includes at least one transformer coupled to the twisted pair channel and a transceiver coupled to the at least one transformer. The circuit further includes a common mode detection coupled to the transceiver for detecting a common mode component. In an embodiment, the circuit detects the common mode component. Accordingly, with common mode component detection capability, the common mode component of the differential can be analyzed for characterization purposes as well as for potential improvement in the system performance signal.

Abstract: An Ethernet cable connection system is disclosed. The system includes a magnetic package having a line interface to couple to a plurality of Ethernet line conductors, and a PHY interface to couple to a plurality of transceiver circuits corresponding to the line conductors. The magnetic package is operable to isolate the line conductors from the corresponding transceiver circuits. The system also includes a termination impedance network and a common-mode detection circuit. The termination impedance network is coupled to the magnetic package line interface. The common-mode detection circuit includes a sense impedance coupled to the termination impedance network that is operable to detect a common-mode signal associated with at least one of the plurality of Ethernet line conductors. A bypass path feeds the detected common-mode signal to the plurality of transceiver circuits without isolation by the magnetic package.

Abstract: An integrated circuit device is disclosed. The integrated circuit device includes a differential driver to generate a differential signal having true and complement signal components that exhibit a relative timing relationship. A transmission port provides an interface for delivering the differential signal to a transmission medium. A common mode detection circuit detects a common mode signal associated with the differential signal. Control circuitry generates a control signal based on the detected common mode signal. Timing circuitry adjusts the relative timing between the true and the complement signal components based on the control signal.

Abstract: A method of operating a transceiver integrated circuit is disclosed. The method comprises generating test signals directed to testing one or more transceiver parameters. The test signals are transmitted from a digital domain to an analog domain along a transmit path, and looped-back from the transmit path to a receive path. Echo canceller circuitry coupled between the transmit path and the receive path is trained and generates a filtered output representing a metric indicative of the one or more transceiver parameters.

Abstract: An apparatus and method of controlling activation of electronic circuitry of data ports of a communication system is disclosed. One method includes a first data port detecting a lack of data for transmission to a second data port. At least one of the first data port and a second data port deactivate electronic circuitry of at least one of the first and second data ports upon detection of the lack of data. The first and second data ports maintain synchronization with each other while the electronic circuitry is deactivated by periodically exchanging synchronization test patterns. At least one of the first data port and the second data port transmit an alert to the other of the first and second data port when data for communication is detected. The other of the first data port and the second data port activate electronic circuitry upon receiving the alert. At least one of the first data port and the second data port transmit data.

Abstract: An apparatus and method of interfacing physical layer (PHY) control with media access control (MAC) is disclosed. One method includes signaling to the PHY control to operate in a low-power mode when the MAC is detected to be transmitting idle patterns. The MAC transitioning from transmitting the idle patterns to transmitting data can be detected. When the transition is detected, the PHY control is signaled to transition to a wake up mode. Data from the MAC is buffered while the PHY control is in the wake up mode. The buffered data is provided to the PHY control after the PHY control has completed the wake up mode.

Abstract: Compensation of transmit baseline wander in data transmission on a network. In one aspect, compensating for baseline wander includes receiving a signal to be transmitted by a transmitter, where the transmitter is operable with a higher-speed transmission standard requiring magnetics a first open circuit inductance. The signal is processed to compensate for a transmit baseline wander in the signal, the transmit baseline wander associated with a lower-speed transmission standard that requires magnetics with a second open circuit inductance that is higher than the first open circuit inductance. The processed signal is to be provided for transmission on a twisted pair cable of the network.