Abstract: Techniques in electronic systems, such as in systems including a processing chip and one or more external memory chips, provide improvements in one or more of system security, performance, cost, and efficiency. For example, the processing chip includes one or more CPUs and circuitry enabling the CPUs to securely boot from an external, non-volatile memory chip containing encrypted, executable code. The circuitry comprises immutable hardware to hold the CPUs in a reset state while performing a serial presence detect on external interfaces of the processing chip and generating an address map according to results of the serial presence detect. In response to an initial instruction fetch of an initial one of the CPUs, the circuitry is able to return one or more instructions via the address map associating an address of the initial instruction fetch with one of the external memory chips.

Abstract: In embodiments, a Wearable Cardiac Defibrillator (WCD) system is configured to be worn by an ambulatory patient. The WCD system includes a main user interface (UI) output device that can output an image, sound or vibration as a main message about a condition of the patient or the WCD system. The patient may further carry a peripheral device that can also output an image, sound or vibration as a peripheral message about the condition. The peripheral message may mirror the main message at least in part, amplify it, and so on. The availability of the peripheral message provides the patient with the opportunity to better perceive the main message, and the flexibility to receive and react to it discreetly, learn more about the condition, and so on.

Abstract: Techniques in electronic systems, such as in systems including a processing chip and one or more external memory chips, provide improvements in one or more of system security (such as intrusion and/or virus/malware prevention), performance, cost, and efficiency. For example, the processing chip includes at least one CPU and circuitry enabling the at least one CPU to securely boot from an external, non-volatile memory chip containing encrypted, executable code. The circuitry comprises immutable hardware to copy the executable code from the non-volatile memory to another external memory from which the at least one CPU is able to access it. The encryption uses a key created at a manufacturing time of and unique to the processing chip that is never CPU-accessible, forming a secure hardware association between the processing chip and the non-volatile memory chip.

Abstract: Various embodiments of the invention relate to attenuators with reduced temperature variation. By coordinating first-order resistance temperature (FORT) coefficients of resistors, embodiments of attenuator or attenuator cells are capable of achieving desired attenuation with reduced or minimized temperature variation. Such achievements in reducing temperature variation may be obtained without relying on resistors with large negative FORT coefficients. Attenuator cells may be configured as T-type attenuator cells, ?-type attenuator cells, bridged-T attenuator cells, or shunt attenuators with various FORT coefficient combinations for the resistors incorporated within the attenuator cells. Furthermore, various attenuator cells may be cascaded together into a digital step attenuator with the temperature variation of those cells compensating or offsetting each other for an overall minimum temperature variation.

Abstract: Techniques in electronic systems, such as in systems including a processing chip and one or more external memory chips, provide improvements in one or more of system security, performance, cost, and efficiency. In some embodiments, the processing chip includes immutable hardware that is enabled, without a use of any CPUs, to determine and/or confirm an expected configuration of one or more external memory chips (such as with a Serial Presence Detect operation), and/or to enable communication with the one or more external memory chips. The immutable hardware is further enabled to copy executable code from a non-volatile one of the one or more external memory chips to another of the one or more external memory chips so that a CPU of the processing chip is able to securely boot by fetching initial instructions from the copy of the executable code.

Abstract: Provided is a bill handling device including: a deposit opening into which bills are put; a withdrawal opening from which the bills are withdrawn; a shutter that is opened or closed to block or release an opening space of the withdrawal opening; and movable plates which are located on a lower side of the shutter in a closed state in which the shutter is closed, and are opened and closed with holding points set as fulcrums in an opened state in which the shutter is opened. The fulcrums as the holding points are located on a shutter side in the opened state in which the shutter is opened.

Abstract: Various embodiments of a system includes receiving a request to display a content and employing an antenna system to receive content data that is representative of the content. The antenna system includes a first antenna, a second antenna, and a third antenna. The system further utilizing at least three arrangements to collect the content, wherein a first arrangement includes receiving the content data broadcasted over the air to extract the content from the content data, a second arrangement includes establishing a wireless communication connection with a network node device operated by a first telecommunication service provider to collect the content data from a server, and a third arrangement includes connecting to a hot-spot having a connection to a second network node device operated by a second telecommunication service provider to collect the content data from the server. The system further transfers the content to the display component, which is collected utilizing the three arrangements.

Abstract: A semiconductor storing apparatus capable of shortening a ECC processing time of a readout operation is provided, including a flash memory includes: a memory cell array; a page buffer/sense circuit holding data read out from a selected page of the memory cell array; an error correcting code circuit receiving data from the page buffer/sense circuit and holding error address information of the data; an output circuit selecting data from the page buffer/sense circuit based on a column address, and outputting the selected data to a data bus; and an error correction part correcting data of the data bus based on the error address information.

Abstract: Robotic systems and methods include a robotic manipulator and a skin incision tool to be coupled to the robotic manipulator and being configured to create an incision in skin of a patient. A skin tracker is attached to the skin of the patient to track the skin of the patient. A robotic controller controls the robotic manipulator to move the skin incision tool relative to a determined location on the skin of the patient. The robotic controller controls the robotic manipulator to constrain movement of the skin incision tool with a haptic object defined relative to the determined location to guide the skin incision tool to the determined location for making the incision in the skin.

Abstract: A semiconductor storing apparatus capable of suppressing a peak current in a pre-charge operation and shortening a sense time is provided. A pre-charge method of a bit line of an NAND type flash memory includes: turning on a transistor (BLPRE) and supplying a pre-charge voltage to a sense node (SNS) at time (t1); turning on a transistor (BLCLAMP) connected to the sense node (SNS) and used for generating a clamp voltage and turning on a transistor (BLCN) connected to a node (BLS) at time (t2), turning on a transistor (BLSe/BLSo) connected between the node (BLS) and a bit line (GBLe/GBLo) at time (t3), and performing the pre-charge operation on the bit line.

Abstract: Disclosed are methods and devices for reducing the number of pathogens in a liquid. The methods or devices uses one or more of pressure, pressure drop, increased temperature, rate of temperature increase, and inert gas to kill pathogens. In one embodiment, inert gas is dissolved into a liquid at a pressure greater than ambient pressure. The pressure is later rapidly reduced, which causes inert gas to be released from the liquid. This reduces the number of pathogens in the liquid. Other method steps or processes that do not utilize inert gas are also disclosed.

Abstract: An information processing apparatus includes a processor configured to acquire profile information for introducing a person, the profile information including at least one profile item, acquire current, actual information of the person, and in response to a variance between the acquired current information and the acquired profile information satisfying a condition, perform a process for reducing the variance.

Abstract: The present invention relates to Tricyclic Heterocycle Compounds of Formula (I): (I) and pharmaceutically acceptable salts or prodrug thereof, where-in R1, R2, R3, R4, R5, R6 and n are as defined herein. The present invention also relates to compositions comprising at least one Tricyclic Heterocycle Compound, and methods of using the Tricyclic Heterocycle Compounds for treating or preventing HIV infection in a subject.

Abstract: Techniques in electronic systems, such as in systems including a processing chip and one or more external memory chips, provide improvements in one or more of system security, performance, cost, and efficiency. In some embodiments, the processing chip includes immutable hardware enabled to securely boot one or more CPUs of the processing chip to execute code stored encrypted in a non-volatile one of the memory chips. An encrypted update to the code is written to a portion of one of the memory chips and the immutable hardware copies the update to the non-volatile memory chip. The immutable hardware is then able to securely boot the one or more CPUs to execute the encrypted update stored in the non-volatile memory chip. In further embodiments, the non-volatile memory chip and/or the portion of one of the memory chips are not accessible by the one or more CPUs.

Abstract: Techniques in electronic systems, such as in systems including a processing chip and one or more external memory chips, provide improvements in one or more of system security, performance, cost, and efficiency. The processing chip includes autonomous hardware that enables the processing chip, without a use of any CPUs, to form an association between itself and a particular flash chip. Prior to an initial operational use of the processing chip, the autonomous hardware is able to generate a key unique to the processing chip using a physically unclonable function, and then to form the association by encrypting a stream of data using the key and writing the encrypted result to the flash chip. For example, the stream of data comprises a bootloader and an operating system, and the processing chip is able to begin the initial operational use by securely booting using data copied from the flash chip.

Abstract: A permeable material that allows air to easily pass through the interstices in any direction. The permeable material may be a cloth, a mesh, latex, rubber, or any polymer. The material is saturated with a water and/or alcohol based solution containing either a cationic or anionic agent, a disinfecting agent, and a biocide. The solvent on the permeable material is permitted to evaporate. What remains on the permeable material is the cationic or anionic agent and the biocide. This coated material is now surrounded by an electrostatic field. The electrostatically charged material attracts oppositely charged particles and repels similarly charged particles. The particles that contain living organisms are inactivated by the biocide. The formulations have been shown to have efficacy against rhinovirus causing colds, influenza and corona viruses causing diseases such as swine flu and COVID-19, as well as other harmful airborne microscopic and sub-microscopic particles.

Abstract: One aspect of the present disclosure is directed to a computer-implemented system for generating an automated outbound profile. The system may include may perform steps including: receiving data comprising a capacity of a fulfillment center (FC); receiving, a plurality of product identifiers associated with incoming products to the FC; periodically collecting and storing transactional logs for the products at the FC using the product identifier; determining a current inventory for the products stored at the FC using the product identifier; generating an outbound profile for the FC using at least one of the transactional logs and the current inventory using a machine learning algorithm; wherein the outbound profile comprises an expected percentage of outgoing products for a plurality of categories of products; and managing network outbound using the generated outbound profile of the FC by comparing the outbound profile to actual outbound capacity of the FC.

Abstract: Techniques in electronic systems, such as in systems including a processing chip and one or more external memory chips, provide improvements in one or more of system security (such as intrusion and/or virus/malware prevention), performance, cost, and efficiency. For example, the processing chip includes at least one CPU and circuitry enabling the at least one CPU to securely boot from an external, non-volatile memory chip containing encrypted, executable code, and does not expose un-encrypted data, including the executable code, on an external memory interface, including a DRAM interface. Further, only the specific processing chip that was used to initially write the encrypted executable code to the external non-volatile memory chip is able to decrypt the encrypted executable code. The decryption uses a key unique to the processing chip and created at manufacturing time that is never CPU-accessible, forming a secure hardware association between the two chips.

Abstract: The present invention provides a compound of Formula (I) or the pharmaceutically acceptable salts thereof, which are PRMT5 inhibitors.

Abstract: A method of forming a film comprises growing, using a deposition system, at least a portion of the film and analyzing, using a RHEED instrument, the at least a portion of the film. Using a computer, data is acquired from the RHEED instrument that is indicative of a stoichiometry of the at least a portion of the film. Using the computer, adjustments to one or more process parameters of the deposition system are calculated to control stoichiometry of the film during subsequent deposition. Using the computer, instructions are transmitted to the deposition system to execute the adjustments of the one or more process parameters. Using the deposition system, the one or more process parameters are adjusted.