Abstract: An electronic system and a security authority delegation method thereof are provided. The electronic system includes a first host device, a second host device, a first security device, and a second security device. The first security device is connected to the first host device. The second security device is connected to the second host device and the first security device. The first security device performs an attestation process on the second security device. If the second security device passes the attestation process, the first security device enables the second security device to verify executable images of the second host device. If the second security device does not pass the attestation process, the first security device disables a function of the second security device, and the function includes verifying the executable image of the second host device.

Abstract: The invention provides a communication method, including: generating a plurality of frames sequentially by a first device, determining a tag of each of the frames according to a rule, and sending the frames sequentially to a second device; establishing a valid receiving tag by the second device; calculating a difference between the tag of a first frame and the valid receiving tag when the second device receives the first frame; and determining to perform at least one of a plurality of operations according to the difference by the second device, wherein the operations include sending a reply frame to the first device, updating the valid receiving tag, and sending a resend frame to the first device.

Abstract: A System on a Chip (SoC), a test device for testing the SoC, and a test method for testing the SoC are provided. The SoC includes a function register, a one-time programmable (OTP) memory, and a processor. The function register includes functional bits. The SoC performs a test operation based on data of at least one of the functional bits. The OTP memory includes setting bits and operating bits. When a bit value of a first setting bit among the setting bits is a first value, the SoC writes data coming from a first operating bit among the operating bits to a first functional bit among the functional bits. When the bit value of the first setting bit is the second value, the SoC writes a first bit value of the test data to the first functional bit.

Abstract: A texture prefetching apparatus in a graphics processing system having a texture memory is disclosed, comprising a first FIFO memory, a second FIFO memory, a main rasterizer, an auxiliary rasterizer and a cache data memory. The cache data memory is coupled between the first FIFO memory and the texture memory. The main rasterizer converts destination coordinates of a first pixel in a primitive into a cache entry and a tag for a first integer texel according to texture coordinates and destination coordinates of multiple vertices of the primitive. The auxiliary rasterizer coupled to the second FIFO memory converts destination coordinates of N second pixels in the primitive into multiple cache entries, multiple tags and multiple memory addresses for multiple second integer texels according to the texture coordinates and the destination coordinates of the multiple vertices, where N is a multiple of 4.

Abstract: An event reporting method, a security management circuit, and a management system are provided. The management system includes first, second, and third security management circuits. The first security management circuit and the second security management are respectively located at a first layer and a second layer of a hierarchy structure. The third security management circuit is located at another layer of the hierarchy structure different from the first layer and the second layer. The first, second, and third security management circuits are respectively configured to determine an event occurring on a host connected to these security management circuits. A dedicated line is communicatively connected between the first and third security management circuits. According to a type of the event determined by the third security management circuit, the third security management circuit reports the event through the dedicated line. Accordingly, a reporting efficiency and system security are improved.

Abstract: A data security verification method and an electronic apparatus are provided. In the data security verification method, when the electronic apparatus is powered on, a verification circuit verifies integrity of an executable image in a storage device. If verification fails, the verification circuit stops a host processor from executing the executable image. If the verification is successful, the verification circuit releases a host reset, and a processor reads and executes the executable image. When the processor reads the executable image, the verification circuit re-verifies the executable image, and the processor executes the executable image according to a verification result.

Abstract: A method for adjusting exposure parameters of images to be spliced and an image analyzing device are provided. The method includes: obtaining N images to be spliced into a panoramic image; obtaining a first brightness value of a first overlapping area and a second brightness value of a second overlapping area of each of the N images, and accordingly determining a first brightness ratio value and a second brightness ratio value of each of the N images; and determining a brightness ratio difference of each of the N images based on the first brightness ratio value and the second brightness ratio value of each of the N images, and accordingly updating an exposure parameter corresponding to each of the N images.

Abstract: A video encoding apparatus for Bayer pattern images is disclosed, comprising: a quantizer, a variable-length coder and a predictor. The quantizer is configured to perform quantization over a difference value D between an input pixel and a current predicted pixel to generate a quantized value ? in a quantization sequence based on a quantization parameter Q and the following equation: ?=?(|D|+?Q/2?+1)×A/N?. The variable-length coder is configured to count a number ZR of consecutive zeros that either precede a following non-zero integer in the quantization sequence or are arranged in the end of the quantization sequence, to encode the number ZR of consecutive zeros into a first codeword by a first codeword set, and to encode the following non-zero integer into a second codeword by a second codeword set to produce an encoded bitstream.

Abstract: An object detection method, electronic apparatus and gesture detection system are provided. A processor is configured to implement the following steps, including: executing an object detection module to detect an original image, and obtaining a first position information, a second position information and a third position information related to the same human body object from the original image through the object detection module; setting a valid determination range based on at least one of the first position information and the second position information; obtaining a hand position in the original image based on the third position information; in response to the hand position being within the valid determination range, executing a gesture recognition module; and in response to the hand position not being within the valid determination range, not executing the gesture recognition module.

Abstract: A package structure includes a first circuit substrate, a control circuit chip, a memory chip, a second circuit substrate, a plurality of conductive elements, a molding compound, and a plurality of solder balls. The control circuit chip and the memory chip are respective disposed on a first side and a second side of the first circuit substrate and electrically connected to the first circuit substrate. The memory chip, the conductive elements, and the molding compound are located between the second side of the first circuit substrate and a third side of the second circuit substrate. The conductive elements are electrically connected to the first circuit substrate and the second circuit substrate, and the molding compound covers the memory chip and the conductive elements. The solder balls are disposed on a fourth side of the second circuit substrate and electrically connected to the second circuit substrate.

Abstract: An image processing device and an image processing method for rendering images are provided. The method includes: dividing a layout in layout information to obtain a first region of interest (ROI) corresponding to a first processing unit and a second ROI corresponding to a second processing unit; performing a first interpolation operation according to a first data structure using the first processing unit to generate a third data structure corresponding to a third vertex of the first ROI; performing a second interpolation operation according to a second data structure using the second processing unit to generate a fourth data structure corresponding to a fourth vertex of the second ROI; updating a vertex list according to the third data structure and the fourth data structure to generate a composed vertex list; and mapping an input image to the layout according to the composed vertex list to generate an output image.

Abstract: An image processing device and an image processing method of generating a layout including a plurality of images are provided. The method includes: partitioning the layout into a plurality of tiles; selecting a first tile located at a border of a first display region and a second display region, and cropping a first sub-block from the first tile; mapping the first sub-block to a calibration map to obtain a mapping region; in response to a third vertex in the mapping region corresponding to a first vertex and a second vertex, performing an interpolation operation on a first data structure and a second data structure to obtain a third data structure corresponding to the third vertex; generating a composed vertex list according to the third vertex and the third data structure; and generating an output image by mapping an input image to the layout according to the composed vertex list.

Abstract: A video encoding method and system, and a video decoding method and system are provided. A video is obtained, and the video includes multiple images. The first image of the images is reduced in size to generate a size-reduced image. Part or all of the first image is encoded to generate an original image encoded stream. The size-reduced image is encoded to generate a size-reduced image encoded stream. The original image encoded stream and the size-reduced image encoded stream are encapsulated into a video stream. Therefore, it could be applied to situations where the viewing angle changes.

Abstract: An inspection method and an inspection system are provided. The inspection method includes: obtaining relative position information between multiple imaging apparatuses; determining an inspection route that satisfies a target event based on the target event and the relative position information, wherein multiple imaging apparatuses included in the inspection route are configured as multiple inspection apparatuses; and controlling a real-time video signal of each inspection apparatus to be presented to a display apparatus based on the inspection route.

Abstract: A baseboard management control device is provided. The baseboard management control device includes an input and output device and a baseboard management controller. The input and output device includes a sensing device. The sensing device is coupled to multiple input pins and multiple output pins to sense and write the target data, respectively. The baseboard management controller includes a storage device and a main processor. The storage device is configured to pre-store the target data. The main processor is coupled to the storage device and reads the target data in the storage device according to a predetermined cycle. The baseboard management controller and the input and output device are respectively located on different circuit boards.

Abstract: A video content providing method and a video content providing device are provided. The method includes the following. A wide viewing angle image stream and a corresponding first audio content are obtained. A plurality of regions of interest in the wide viewing angle image stream are determined, and candidate regions in the regions of interest are integrated into a first frame. A designated region is selected from the candidate regions, and a corresponding first audio component are found from the first audio content. Each first audio component is suppressed to adjust the first audio content into a second audio content. The first frame and the second audio content are integrated into a specific video content, and the specific video content is provided.

Abstract: A testing device and a testing method for detecting a stitching defect of a panoramic camera are provided. The testing method includes: accessing the panoramic camera to obtain a stitched image, wherein the stitched image includes a chart image corresponding to a chart, wherein the chart includes multiple black stripes and multiple white stripes; generating a defect image marked with the stitching defect according to the chart image; and outputting the defect image.

Abstract: A baseboard management controller (BMC) and an operation method thereof are provided. The BMC includes a path switching circuit, a host interface circuit, a universal serial bus (USB) hub controller, a USB physical layer circuit, and a control circuit. The host interface circuit is adapted to be electrically connected to a host circuit outside the BMC. The USB physical layer circuit is adapted to be electrically connected to an external USB host or an external USB device outside the BMC. The control circuit controls the path switching circuit to selectively couple the host interface circuit to the USB hub controller, selectively couple the USB hub controller to the USB physical layer circuit, or selectively couple the host interface circuit to the USB physical layer circuit.

Abstract: An image enhancement method and an electronic device are disclosed. The image enhancement method includes the following steps. An original image is divided into multiple image blocks. A statistical data of each of the image blocks is calculated, and at least one index is obtained according to the statistical data of the each of the image blocks. A final tone mapping curve of the each of the image blocks is obtained based on multiple predefined tone mapping curves according to the at least one index of the each of the image blocks. Afterwards, the original image is adjusted according to the final tone mapping curve of the each of the image blocks to obtain an enhanced image.

Abstract: Embodiments of the disclosure provide a method for resetting a processor and a computer device. The method includes: obtaining an image file corresponding to a coprocessor by a first component of the computer device, and loading the image file into a reference space in a RAM by the first component; loading the image file stored in the reference space into a specific space corresponding to the coprocessor by a second component of the computer device and validating the image file stored in the specific space by the second component in response to determining that the coprocessor needs to be reset; and resetting the coprocessor by the second component based on the image file stored in the specific space in response to the second component determining that the image file stored in the specific space is valid.