Patents Assigned to AST (ADVANCED SENSOR TECHNOLOGIES) INTERNATIONAL ASSET GMBH
  • Patent number: 5319622
    Abstract: A system and method for recording on optical and electromagnetic disk media utilize a control disk for formatting and providing speed control of the recorded information. Optionally, the control disk may provide operating, diagnostic, and a wide variety of other information to the recording system or user. A recording disk and the control disk are rotated synchronously with each other while the control disk is scanned by a read head which derives formatting, speed control, and other information. A write head on the recording disk is then manipulated in a pattern determined by the formatting and speed control information. Typically, the read head and write head are mechanically coupled so that the write head is positioned as the read head follows a tracking information on a read surface of the control disk to write a tracking pattern to a write surface of the recording disk in a recordable region between a start-of-disk pattern and an end-of-disk pattern.
    Type: Grant
    Filed: September 14, 1992
    Date of Patent: June 7, 1994
    Assignee: AST Research, Inc.
    Inventor: Michael B. Martin
  • Patent number: 5301281
    Abstract: A method and apparatus for expanding a backplane interconnecting bus provides an architecture in which the width of a data bus can be expanded without new byte select control lines on the backplane bus. In the present invention, data lines and corresponding parity lines are added to the backplane bus, and control signal lines connect devices capable of utilizing the expanded bus capabilities. The control signal lines do not affect the operation of devices which are designed according to the narrower bus width, and therefore, these devices can be installed in the expanded bus backplane along with devices designed to utilize the expanded width data bus.
    Type: Grant
    Filed: June 26, 1991
    Date of Patent: April 5, 1994
    Assignee: AST Research, Inc.
    Inventor: Barry Kennedy
  • Patent number: 5300899
    Abstract: A shielded flexible cable includes a first shielding grid having conductive elements formed as squares. A second shielding grid is also formed as squares. The two shielding grids are positioned with respect to each other so that the vertices of the squares of the two grids are respectively offset from each other in each of two directions by one-half the diagonal distance between the vertices of the squares. Electrical signal conductors are positioned between the two grids along lines extending between the vertices of the squares to maintain a controlled impedance of the signal lines.
    Type: Grant
    Filed: February 2, 1993
    Date of Patent: April 5, 1994
    Assignee: AST Research, Inc.
    Inventor: Edward D. Suski
  • Patent number: 5297258
    Abstract: A data log for use with conventional hard disk subsystems or other data storage subsystems provides a system to minimize delays caused in a computer system due to the input/output systems, such as hard disks. The data log is preferably one or more hard disks, or any other non-volatile data storage device. Preferably, when the operating system requests a write to the hard disk subsystem, a hard disk controller directs the data to the data log rather than the hard disks. Then, when I/O requests are at a lull, the hard disk controller moves the data from the data log to the hard disk subsystem. Because the data is written to the data log sequentially, the hard disk controller completes the write operation quickly. This minimizes any bottleneck created while the system waits for the completion of the write operation.
    Type: Grant
    Filed: November 21, 1991
    Date of Patent: March 22, 1994
    Assignee: AST Research, Inc.
    Inventors: Robert P. Hale, Robert J. Beard
  • Patent number: 5280283
    Abstract: A memory mapped keyboard controller within a peripheral controller for use in an Industry Standard Architecture (ISA) computer provides a method and apparatus for efficiently monitoring and reading a keyboard switch matrix. In a first mode of operation, the controller activates all the columns and monitors all the rows in the switch matrix to detect when any one or more of the rows becomes active, indicating that at least one key on the keyboard has been pressed. When any row in the matrix is detected as active, then the keyboard controller enters a second mode wherein it selectively activates individual columns and monitors the rows in the switch matrix to detect which row and column contain the activated switch. When the switch location is determined, this location is interpreted by the keyboard controller into a scan code for the ISA computer.
    Type: Grant
    Filed: November 9, 1990
    Date of Patent: January 18, 1994
    Assignee: AST Research, Inc.
    Inventors: Charles F. Raasch, Jason S. M. Kim
  • Patent number: 5263668
    Abstract: A computer pedestal for stably supporting a computer component in an upright orientation can be nestably engaged with other like pedestals to permit side-by-side stowage of a plurality of computer components. The pedestal has a flat parallelepiped-shaped base, and at least one stabilizer extends outwardly from the base to provide lateral support to the base. Also, a channel is formed in the base opposite the stabilizer. The stabilizer is configured to closely conform to the channel, so that the stabilizer can nestably mate with the channel of another like pedestal when the two pedestals are positioned side-by-side. The components that are supported by the nested pedestals can accordingly be closely and stably disposed side-by-side.
    Type: Grant
    Filed: October 15, 1991
    Date of Patent: November 23, 1993
    Assignee: AST Research, Inc.
    Inventor: Victor R. Reiter
  • Patent number: 5261114
    Abstract: A method and apparatus for downloading instructions and other information to a peripheral controller for use in an Industry Standard Architecture (ISA) compatible computer provides a system which downloads instructions from the ISA compatible computer to an random access memory (RAM) accessible by the peripheral controller. The peripheral controller then executes these instructions to emulate the functions of conventional INTEL 8042 and 8742 series integrated circuits. The peripheral controller also provides other features not provided by the conventional 8042 or 8742 by executing other downloaded instructions located in the RAM.
    Type: Grant
    Filed: November 9, 1990
    Date of Patent: November 9, 1993
    Assignee: AST Research, Inc.
    Inventors: Charles F. Raasch, Jason S. M. Kim
  • Patent number: 5247642
    Abstract: A computer system includes an Intel 80486 microprocessor having an internal cache memory and a local memory tightly coupled to the microprocessor that can respond to memory accesses without requiring the microprocessor to execute a wait state. An external cache memory system is provided to provide additional cache storage to provide copy back capabilities so that data written to the external cache does not have to be automatically written to slower bulk memory. The computer system includes a conventional Industry Standard Architecture bus (ISA-bus) which may include memory on the bus. The computer system may also include an external math coprocessor. In order to preclude storing data from the math coprocessor and from the ISA-bus memory, the external cache memory system includes a cache determination circuit that selectively generates a cache enable signal to the microprocessor and to the external cache memory system so that only cacheable data is stored in the two caches.
    Type: Grant
    Filed: December 5, 1990
    Date of Patent: September 21, 1993
    Assignee: AST Research, Inc.
    Inventors: Kenneth A. Kadlec, Shmuel Shottan
  • Patent number: 5247643
    Abstract: A memory system for use with a copy back cache system includes a control circuit that reduces the amount of time to complete a copy back/line fill operation in which a first line of data from the cache is stored in the memory system and then a second line of data is retrieved from the memory system and transferred to the cache system. Unlike conventional memory systems where the line of data to be copied back is likely to be stored in the memory system at a row address that differs from the row address of the line of data to be retrieved from the memory system for the line fill, the memory system of the present invention assures that the copy back data and the line fill data are located at the same row address in the memory system. Thus, a single row address can be applied once at the beginning of the copy back/line fill operation, thereby saving the row address precharge time and the row address access time required to switch row addresses between the two portions of the operation.
    Type: Grant
    Filed: January 8, 1991
    Date of Patent: September 21, 1993
    Assignee: AST Research, Inc.
    Inventor: Shmuel Shottan
  • Patent number: 5237692
    Abstract: An interrupt driven peripheral controller for use in an Industry Standard Architecture (ISA) compatible computer provides a system to minimize power consumption as compared to conventional peripheral controllers. The peripheral controller utilizes an internal interrupt controller which responds to inputs from an ISA compatible microprocessor host, a keyboard, a mouse, and other devices connected to the I/O ports of the ISA compatible computer. The interrupt controller provides an interrupt register for the peripheral controller and generates an interrupt any time one or more of the devices controlled by the peripheral controller is activated. The peripheral controller enters a low power consumption mode if no interrupts are detected for a predetermined period of time. When the interrupt controller generates an interrupt, the peripheral controller is activated from it low power mode and services the device or devices which have caused the interrupt.
    Type: Grant
    Filed: November 9, 1990
    Date of Patent: August 17, 1993
    Assignee: AST Research Inc.
    Inventors: Charles F. Raasch, Jason S. M. Kim
  • Patent number: 5187425
    Abstract: A battery monitor system is disclosed comprising a microcontroller which monitors voltage inputs from a power adapter and a rechargeable battery. The power adapter includes a voltage source and a current source which outputs two current levels. A thermistor is thermally coupled to the battery, and the microcontroller receives voltage inputs from the battery and the thermistor. The microcontroller monitors and processes the voltage inputs to detect a predetermined voltage change corresponding to a change in the battery temperature and/or voltage level which indicates a fully charged battery. The level of the current which is provided to the battery from the current source is under the control of the microcontroller, such that the battery is maintained in a fully charged state.
    Type: Grant
    Filed: November 9, 1990
    Date of Patent: February 16, 1993
    Assignee: AST Research, Inc.
    Inventor: Roy K. Tanikawa
  • Patent number: D335868
    Type: Grant
    Filed: October 19, 1990
    Date of Patent: May 25, 1993
    Assignee: AST Research, Inc.
    Inventor: Peter K. Toedter
  • Patent number: D337317
    Type: Grant
    Filed: October 15, 1991
    Date of Patent: July 13, 1993
    Assignee: AST Research, Inc.
    Inventor: Victor R. Reiter
  • Patent number: D337318
    Type: Grant
    Filed: October 15, 1991
    Date of Patent: July 13, 1993
    Assignee: AST Research, Inc.
    Inventors: Victor R. Reiter, James M. Brech
  • Patent number: D338451
    Type: Grant
    Filed: October 4, 1990
    Date of Patent: August 17, 1993
    Assignee: AST Research, Inc.
    Inventor: Peter K. Toedter
  • Patent number: D338882
    Type: Grant
    Filed: October 15, 1991
    Date of Patent: August 31, 1993
    Assignee: AST Research, Inc.
    Inventor: Victor R. Reiter
  • Patent number: D338884
    Type: Grant
    Filed: October 5, 1990
    Date of Patent: August 31, 1993
    Assignee: AST Research, Inc.
    Inventor: Peter K. Toedter
  • Patent number: D344269
    Type: Grant
    Filed: August 18, 1992
    Date of Patent: February 15, 1994
    Assignee: AST Research, Inc.
    Inventors: Peter K. Toedter, Kevin D. Simmons, Charles S. Curbbun
  • Patent number: D344718
    Type: Grant
    Filed: July 2, 1992
    Date of Patent: March 1, 1994
    Assignee: AST Research, Inc.
    Inventor: Victor R. Reiter
  • Patent number: D345149
    Type: Grant
    Filed: August 18, 1992
    Date of Patent: March 15, 1994
    Assignee: AST Research, Inc.
    Inventors: Peter K. Toedter, Kevin D. Simmons, Charles S. Curbbun