Patents Assigned to AT & S Austria Technologie & Systemtechnik Aktiengesellschaft
  • Patent number: 11799198
    Abstract: An electronic device includes a first component carrier with a first stack having at least one first electrically conductive layer structure forming an antenna structure and at least one first electrically insulating layer structure; at least one electronic component, and a second component carrier having at least one second electrically conductive layer structure and/or at least one second electrically insulating layer structure. The second component carrier further includes a heat removal structure. The first component carrier and the second component carrier are connected so that the antenna structure is positioned at one side of the electronic device for emitting and/or receiving electromagnetic radiation and the heat removal structure is positioned at an opposing other side of the electronic device.
    Type: Grant
    Filed: November 1, 2021
    Date of Patent: October 24, 2023
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Mario Schober, Johannes Stahr
  • Patent number: 11792932
    Abstract: A method of manufacturing a component carrier includes providing a stack with electrically conductive layer structures and at least one electrically insulating layer structure, embedding a magnetic inlay in the stack, and forming an electrically conductive coil structure at least partially based on the electrically conductive layer structures and surrounding at least part of the magnetic inlay.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: October 17, 2023
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Ivan Salkovic, Gerald Weidinger, Johannes Stahr
  • Patent number: 11784115
    Abstract: A component carrier includes a stack with at least one electrically conductive layer structure and at least one electrically insulating layer structure. At least one electrically insulating layer structure has at least partly tapering through holes filled substantially completely with an electrically conductive filling. The at least one electrically conductive layer structure and the electrically conductive filling are made of the same material. In addition, different ones of the through holes of one electrically insulating layer structure are tapering in opposite directions.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: October 10, 2023
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventor: Roland Wilfing
  • Patent number: 11784132
    Abstract: An interposer-type component carrier includes a stack comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure; a cavity formed in an upper portion of the stack; an active component embedded in the cavity and having at least one terminal facing upwards; and a redistribution structure having only one electrically insulating layer structure above the component. A method of manufacturing an interposer-type component carrier is also disclosed.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: October 10, 2023
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Markus Leitgeb, Gerhard Freydl
  • Patent number: 11778754
    Abstract: A component carrier includes an electrically insulating layer structure with a first main surface and a second main surface, a through hole extends through the electrically insulating layer structure between the first main surface and the second main surface. The through hole has a first tapering portion extending from the first main surface and a second tapering portion extending from the second main surface. The through hole is delimited by a first plating structure on at least part of the sidewalls of the electrically insulating layer structure and a second plating structure formed separately from and arranged on the first plating structure. The second plating structure includes an electrically conductive bridge structure connecting the opposing sidewalls.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: October 3, 2023
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Robin Zhang, Seok Kim Tay
  • Patent number: 11778751
    Abstract: A method of compensating misalignment during manufacturing laminate-type component carriers is disclosed. The method includes detecting an image of a region of interest of a component carrier structure during manufacturing the component carriers based on the component carrier structure, identifying a structural feature in the image of the region of interest showing misalignment with respect to a target design, and at least partially compensating the identified misalignment of the structural feature by modifying the target design of at least one correlated structural feature to be manufactured subsequently, wherein the at least one correlated structural feature is correlated to said structural feature showing misalignment.
    Type: Grant
    Filed: December 1, 2020
    Date of Patent: October 3, 2023
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Abderrazzaq Ifis, Markus Leitgeb
  • Patent number: 11749573
    Abstract: Described are component carriers including a stepped cavity into which a stepped component assembly is embedded. The component carriers have (a) fully cured electrically insulating material originating from at least one electrically insulating layer structure of the component carrier and circumferentially surrounding the stepped component assembly and/or (b) an undercut in a transition region between a narrow recess and a wide recess of the stepped cavity. Further described are methods for manufacturing such component carriers.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: September 5, 2023
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Johannes Stahr, Gerald Weidinger, Gerhard Schmid, Andreas Zluc
  • Patent number: 11749613
    Abstract: A method for manufacturing a component carrier includes forming a stack with at least one electrically insulating layer structure and/or at least one electrically conductive layer structure, providing a component having one or more pads and at least one dielectric layer on at least one main surface of the component such that the dielectric layer at least partially covers one or more pads of the component, placing the component on a temporary carrier, and embedding the component between the temporary carrier and the at least one insulating layer structure by pressing the component into the at least one insulating layer structure.
    Type: Grant
    Filed: October 15, 2021
    Date of Patent: September 5, 2023
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Gerald Weidinger, Andreas Zluc
  • Patent number: 11682600
    Abstract: An arrangement includes a panel configured as a pre-form for manufacturing a plurality of component carriers; a protection layer covering a surface portion of a main surface of the panel, wherein the protection layer is detachable from the surface portion without leaving residues on the panel. A handling tool for handling the panel includes a surface onto which the panel is arrangeable. The panel includes a handling surface, with which the panel is arrangeable onto the handling tool, wherein the handling surface comprises at least part of the surface portion covered by the protection layer.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: June 20, 2023
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Markus Leitgeb, Marco Gavagnin, Heinz Habenbacher
  • Patent number: 11683884
    Abstract: A component carrier having a stack with at least one electrically conductive layer structure and/or at least one electrically insulating layer structure and having a cavity delimited at least partially by a first polymer, and a component embedded in the cavity of the stack and being at least partially covered by a second polymer, wherein an anchoring interface is formed at an interface between the first polymer and the second polymer at which the first polymer and the second polymer are mechanically anchored with each other.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: June 20, 2023
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Imane Souli, Erich Preiner, Martin Schrei, Vanesa López Blanco
  • Patent number: 11682661
    Abstract: A hermetic package includes a base body, wherein dielectric material of a bottom of the base body is made of an organic material, an optical component mounted on the base body, and inorganic material hermetically enclosing the optical component along all surrounding sides.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: June 20, 2023
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Andreas Zluc, Johannes Stahr
  • Publication number: 20230189448
    Abstract: The invention pertains to a method for the bonding of a component embedded into a printed circuit board exhibiting the following steps: Provision of a core exhibiting at least one insulating layer and at least one conductor layer applied to the insulating layer, Embedding of at least one component into a recess of the insulating layer, wherein the contacts of the component are essentially situated in the plane of an outer surface of the core exhibiting the at least one conductor layer, Application of a photoimageable resist onto the one outer surface of the core on which the component is arranged, while filling the spaces between the contacts of the component, Clearing of end faces of the contacts and of the areas of the conductor layer covered by the photoimageable resist by exposing and developing the photoimageable resist, by application of a semi-additive process, deposition of a layer of conductor material onto the cleared end faces of the contacts and the cleared areas of the conductor layer and form
    Type: Application
    Filed: November 15, 2022
    Publication date: June 15, 2023
    Applicant: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Gerald Weidinger, Andreas Zluc, Johannes Stahr
  • Patent number: 11622443
    Abstract: A component carrier includes a stack having a first electrically insulating layer structure and a first electrically conductive layer structure arranged on the first electrically insulating layer structure. The first electrically insulating layer structure has at least one first covered portion, which is covered by the first electrically conductive layer structure, and at least one first non-covered portion, which is not covered by the first electrically conductive layer structure. The first electrically insulating layer structure defines a recess at the at least one first non-covered portion.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: April 4, 2023
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventor: Artan Baftiri
  • Patent number: 11617259
    Abstract: The present invention relates to an embedded printed circuit board including: an insulation substrate including a cavity; a sensor device disposed on the cavity; an insulating layer disposed on the insulation substrate, having an opening part exposing the sensor device; and a pad part disposed on the lower surface of the opening part exposing the sensor device.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: March 28, 2023
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Mikael Tuominen, Seok Kim Tay
  • Patent number: 11570897
    Abstract: A component carrier including a stack with a plurality of electrically insulating layer structures and/or a plurality of electrically conductive layer structures, and a component embedded in the stack, wherein at least a portion of a side wall of the component is exposed.
    Type: Grant
    Filed: August 1, 2018
    Date of Patent: January 31, 2023
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Bettina Schuster, Jonathan Silvano de Sousa, Andreas Zluc, Markus Leitgeb, Hannes Stahr
  • Patent number: 11551989
    Abstract: A component carrier includes a stack having at least one electrically conductive layer structure and at least one electrically insulating layer structure; a barrier structure; and a component. The component has at least one pad embedded in the stack and/or in the barrier structure. At least a portion of one of the electrically conductive layer structure and the at least one pad includes copper in contact with the barrier structure.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: January 10, 2023
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventor: Heinz Moitzi
  • Patent number: 11546990
    Abstract: A component carrier with an electrically insulating layer structure has opposed main surfaces, a through-hole, and an electrically conductive bridge structure connecting opposing sidewalls delimiting the through-hole. The sidewalls have a first tapering portion extending from a first main surface and a second tapering portion extending from a second main surface. A first demarcation surface faces the first main surface and a second demarcation surface faces the second main surface. A central bridge plane extends parallel to the first main surface and the second main surface and is at a vertical center between a lowermost point of the first demarcation surface and an uppermost point of the second demarcation surface. A first intersection point is between the central bridge plane and one of the sidewalls delimiting the through hole. A length of a shortest distance from the first intersection point to the first demarcation surface is at least 8 ?m.
    Type: Grant
    Filed: January 23, 2020
    Date of Patent: January 3, 2023
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventor: Mikael Tuominen
  • Patent number: 11527807
    Abstract: An electronic device and a method for manufacturing such an electronic device are described. The electronic device includes an electronic component, and a component carrier in which the electronic component is embedded. The component carrier includes a first component carrier part having a first cut-out portion and a second component carrier part having a second cut-out portion, the first cut-out portion and the second cut-out portion facing opposite main surfaces of the electronic component. An electrically conductive material is provided on the surface of the first cut-out portion and on the surface of the second cut-out portion. The first cut-out portion and the second cut-out portion respectively form a first cavity and a second cavity on opposite sides of the electronic component.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: December 13, 2022
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Fabrizio Gentili, Sebastian Sattler, Wolfgang Bösch, Erich Schlaffer, Markus Kastelic, Bernhard Reitmaier
  • Patent number: 11523496
    Abstract: A component carrier includes a stack having at least one electrically conductive layer structure and/or at least one electrically insulating layer structure. A component is embedded in the stack. A first thermally conductive block is located above and thermally connected with the component, and a second thermally conductive block is located below and thermally coupled with the component. Heat generated by the component during operation is removed via at least one of the first thermally conductive block and the second thermally conductive block.
    Type: Grant
    Filed: February 19, 2021
    Date of Patent: December 6, 2022
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Rainer Frauwallner, Dietmar Drofenik, Patrick Fleischhacker
  • Patent number: 11523520
    Abstract: The invention pertains to a method for the bonding of a component embedded into a printed circuit board exhibiting the following steps: Provision of a core exhibiting at least one insulating layer and at least one conductor layer applied to the insulating layer, Embedding of at least one component into a recess of the insulating layer, wherein the contacts of the component are essentially situated in the plane of an outer surface of the core exhibiting the at least one conductor layer, Application of a photoimageable resist onto the one outer surface of the core on which the component is arranged, while filling the spaces between the contacts of the component, Clearing of end faces of the contacts and of the areas of the conductor layer covered by the photoimageable resist by exposing and developing the photoimageable resist, by application of a semi-additive process, deposition of a layer of conductor material onto the cleared end faces of the contacts and the cleared areas of the conductor layer and form
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: December 6, 2022
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Gerald Weidinger, Andreas Zluc, Johannes Stahr