Patents Assigned to AT&S Austria Technologie & Systemtechnik
  • Patent number: 10643949
    Abstract: A component carrier including an electrically insulating core, at least one electronic component embedded in the core, and a coupling structure with at least one electrically conductive through-connection extending at least partially therethrough and having a component contacting end and a wiring contacting end. The electronic component directly contacts the component contacting end. The wiring contacting end is directly electrically contacted to the wiring structure. The exterior surface portion of the coupling structure has homogeneous ablation properties and surface recesses filled with an electrically conductive wiring structure.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: May 5, 2020
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventor: Hannes Stahr
  • Patent number: 10617012
    Abstract: A method of manufacturing a flexible electronic device is described. The method comprises arranging an electronic component on a temporary carrier, providing a flexible laminate comprising an adhesive layer, pressing the temporary carrier and the flexible laminate together with the adhesive layer facing the temporary carrier such that the electronic component is pushed into the adhesive layer, and removing the temporary carrier. Further, a corresponding flexible electronic device is described.
    Type: Grant
    Filed: February 8, 2017
    Date of Patent: April 7, 2020
    Assignee: AT & S AUSTRIA TECHNOLOGIE & SYSTEMTECHNIK AKTIENGESELLSCHAFT
    Inventors: Andreas Zluc, Johannes Stahr
  • Patent number: 10568208
    Abstract: There is provided a component carrier comprising: (a) a stack of at least one electrically conductive layer structure and at least one electrically insulating layer structure; and (b) a bypass capacitance structure formed on an/or within the stack. The bypass capacitance structure comprises an electrically conductive film structure having a rough surface, a dielectric film structure formed on the rough surface, and a further electrically conductive film structure formed on the dielectric film structure.
    Type: Grant
    Filed: July 28, 2017
    Date of Patent: February 18, 2020
    Assignee: AT & S AUSTRIA TECHNOLOGIE & SYSTEMTECHNIK AKTIENGESELLSCHAFT
    Inventor: Wilhelm Tamm
  • Patent number: 10568210
    Abstract: An electronic device includes a component carrier with a component carrier body, an electrically conductive layer, and an adhesive structure. The electronic device further includes an electronic component which is arranged within the component carrier body. The adhesive structure is formed between a surface of the electronic component and the electrically conductive layer and covers only a part of the surface of the electronic component. A remaining part of the surface of the electronic component is covered with the component carrier body.
    Type: Grant
    Filed: September 1, 2016
    Date of Patent: February 18, 2020
    Assignee: AT & S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Christian Galler, Gerhard Stubenberger, Markus Leitgeb, Wolfgang Schrittwieser
  • Publication number: 20200053864
    Abstract: A method of manufacturing a printed circuit board or a subassembly thereof comprises the following steps: providing at least two elements (1, 3) of insulating material coupling or connecting the elements (1, 3) of insulating material on at least one adjacent side surface covering the elements (1, 3) of insulating material with a layer (4) of conductive material on at least one surface building up at least one further layer (5, 6, 7, 8) of the printed circuit board (10) at least partly on the elements (1, 3) of insulating material, wherein the elements (1, 3) of insulating material are made of insulating material having different mechanical, chemical or physical properties. Furthermore a printed circuit board (10) or sub-assembly thereof is provided.
    Type: Application
    Filed: October 17, 2019
    Publication date: February 13, 2020
    Applicant: AT & S AUSTRIA TECHNOLOGIE & SYSTEMTECHNIK AKTIENGESELLSCHAFT
    Inventors: Simon Sebanz, Hannes Voraberger
  • Patent number: 10531577
    Abstract: A method of manufacturing a component carrier is provided. The method includes forming a through hole between a first main surface and a second main surface of an electrically insulating layer structure by removing material from at least one of the main surfaces of the electrically insulating layer structure, in particular by irradiating at least one of the main surfaces of the electrically insulating layer structure with at least one laser shot, wherein the at least one main surface from which material is removed, in particular which is to be irradiated, is not covered by an electrically conductive layer structure at least in a surface region in which the through hole is to be formed, and subsequently at least partially filling the through hole and at least partially covering the main surfaces of the electrically insulating layer structure by an electrically conductive filling medium.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: January 7, 2020
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventor: Gernot Grober
  • Patent number: 10490887
    Abstract: A method for producing an intermediate printed circuit board product (80) with an antenna structure (5), including steps of providing a ground layer (10) including optionally a release layer (20) that is removably positioned (22) on an antenna subarea (12) of an exterior side (11) of the ground layer (10); attaching a dielectric insulating layer (30) on the exterior side (11) of the ground layer (10) that is if applicable partly covered by the release layer (20); attaching a conducting layer (40) on an exterior side (31) of the dielectric insulating layer (30); laminating of the layers (10, 20, 30, 40) to receive a first semi-finished product (50); manufacturing of an antenna cavity (60) throughout the conducting layer (40) and the dielectric insulating layer (30) with a ground-plane area (62) that is if applicable made up of the release layer (20); attaching a compound signal layer (70) on the conducting layer (40) covering the antenna cavity (60); and laminating of the layers (50, 70) to receive the interme
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: November 26, 2019
    Assignee: AT&S AUSTRIA TECHNOLOGIE & SYSTEMTECHNIK AKTIENGESELLSCHAFT
    Inventor: Erich Schlaffer
  • Patent number: 10492288
    Abstract: A method of manufacturing a printed circuit board or a sub-assembly thereof comprises the following steps: providing at least two elements (1, 3) of insulating material coupling or connecting the elements (1, 3) of insulating material on at least one adjacent side surface covering the elements (1, 3) of insulating material with a layer (4) of conductive material on at least one surface building up at least one further layer (5, 6, 7, 8) of the printed circuit board (10) at least partly on the elements (1, 3) of insulating material, wherein the elements (1, 3) of insulating material are made of insulating material having different mechanical, chemical or physical properties. Furthermore a printed circuit board (10) or sub-assembly thereof is provided.
    Type: Grant
    Filed: October 16, 2017
    Date of Patent: November 26, 2019
    Assignee: AT & S AUSTRIA TECHNOLOGIE & SYSTEMTECHNIK AKTIENGESELLSCHAFT
    Inventors: Simon Sebanz, Hannes Voraberger
  • Patent number: 10455703
    Abstract: A method for producing a printed circuit board (10) having at least one embedded sensor chip (3), in which at least one sensor face (5) and terminals (4) are arranged on a face of the chip, said method comprising the following steps: a) providing an adhesive film (1), b) printing a conductor structure (2) formed from a conductive paste onto a surface of the adhesive film, c) placing the at least one sensor chip (3) with the face comprising the at least one sensor face (5) and the terminals (4) onto the conductor structure (2) formed from a conductive paste, in an indexed manner, d) curing the conductive paste, e) applying an insulation layer (6) having a conductor layer (7) arranged thereabove to the surface of the structure, created in the previous steps, comprising the chip (3), f) laminating the structure created in the previous steps, g) structuring the conductor layer (7) and forming vias (9) from the conductor layer to conductive tracks (7b, 7c) of the conductor structure on the surface of the adhesi
    Type: Grant
    Filed: February 20, 2015
    Date of Patent: October 22, 2019
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventor: Gerald Weidinger
  • Patent number: 10455704
    Abstract: A method of filling a hole formed in a component carrier with copper is disclosed. The method comprises i) forming a layer of an electrically conductive material covering at least part of a surface of a wall, wherein the wall delimits the hole, and subsequently ii) covering at least partially the layer and filling at least partially an unfilled volume of the hole with copper using a plating process including a bath. Hereby, the bath comprises a concentration of a copper ion, in particular Cu2+, in a range between 50 g/L and 75 g/L, in particular in a range between 60 g/L and 70 g/L.
    Type: Grant
    Filed: July 30, 2018
    Date of Patent: October 22, 2019
    Assignee: AT&S AUSTRIA TECHNOLOGIE & SYSTEMTECHNIK AKTIENGESELLSCHAFT
    Inventors: Ares Wang, Yee-Bing Ling, Annie Tay
  • Patent number: 10440835
    Abstract: A method of manufacturing a component carrier is disclosed. The method includes forming a through hole between a first main surface and a second main surface of an electrically insulating layer structure by removing material from at least one of the main surfaces of the electrically insulating layer structure, in particular by irradiating at least one of the main surfaces of the electrically insulating layer structure with at least one laser shot. The at least one main surface from which material is removed, is not covered by an electrically conductive layer structure at least in a surface region in which the through hole is to be formed. Subsequent to formation of the through hole, at least partially filling the through hole and at least partially covering the main surfaces of the electrically insulating layer structure by an electrically conductive filling medium.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: October 8, 2019
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventor: Gernot Grober
  • Patent number: 10424541
    Abstract: A component carrier including an electrically insulating core, at least one electronic component embedded in the core, and a coupling structure with at least one electrically conductive through-connection extending at least partially therethrough and having a component contacting end and a wiring contacting end. The electronic component directly contacts the component contacting end. The wiring contacting end is directly electrically contacted to the wiring structure. The exterior surface portion of the coupling structure has homogeneous ablation properties and surface recesses filled with an electrically conductive wiring structure.
    Type: Grant
    Filed: December 16, 2015
    Date of Patent: September 24, 2019
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventor: Hannes Stahr
  • Patent number: 10426040
    Abstract: The invention relates to a method for producing a circuit board element having at least one electronic component, which component has a connection side defined by electrical contacts or a conductive layer and is connected to a temporary carrier for positioning and embedded in an insulating material; the component is attached in a specified position directly to a plastic film as a temporary carrier, whereupon a composite layer having at least a carrier and an electrical conductor, preferably also having an insulating material, is attached on the side of the component opposite the plastic film, with the carrier facing away from the component, and thereafter the plastic film is removed; then the component is embedded in insulating material. After the embedding of the component in the insulating material, an additional composite layer is preferably attached to the component and the embedding of the component on the side opposite the first composite layer.
    Type: Grant
    Filed: March 17, 2014
    Date of Patent: September 24, 2019
    Assignee: AT & S AUSTRIA TECHNOLOGIE & SYSTEMTECHNIK AKTIENGESELLSCHAFT
    Inventors: Johannes Stahr, Andreas Zluc
  • Patent number: 10420206
    Abstract: Disclosed is a device for electrically connecting components, which device has at least one electrically insulating layer structure, at least one electrically conducting layer structure, which is stacked and consolidated with the at least one electrically insulating layer structure under formation of a stack of layers, and a warpage stabilization structure for stabilizing the device in a warpage-suppressing manner, which structure at least partially pervades layer structures of the stack of layers.
    Type: Grant
    Filed: March 11, 2016
    Date of Patent: September 17, 2019
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Markus Leitgeb, Urs Hunziker
  • Patent number: 10410963
    Abstract: An electric device includes a first structure, a second structure, and a deformed layer. The deformed layer includes a dielectric matrix and electrically conductive elements formed therein. The deformed layer is arranged to electrically couple the first structure with the second structure.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: September 10, 2019
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Gerald Weis, Hannes Voraberger
  • Patent number: 10390421
    Abstract: A component carrier for carrying and cooling at least one heat generating electronic component is presented. The component carrier comprising includes an outer layer structure, an electrically insulating layer arranged adjacent to the outer layer structure, and a heat conducting structure arranged adjacent to the electrically insulating layer on a side opposite to the outer layer structure. The heat conducting structure is thermally coupled to the at least one heat generating electronic component such that the outer layer structure receives thermal radiation irradiated by the heat conducting structure and transports corresponding heat away from the component carrier via convection by a heat transfer medium surrounding the component carrier.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: August 20, 2019
    Assignee: AT & S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventor: Jonathan Silvano De Sousa
  • Patent number: 10383208
    Abstract: A hybrid component carrier is manufactured by providing a first layer structure having at least one electrically insulating layer and at least one electrically conductive layer; and forming a second layer structure on the first layer structure where the second layer structure includes at least a first layer and a second layer. The first layer structure has a first density of electrically conductive elements. The second layer structure has a second density of electrically conductive elements that is greater than the first density of electrically conductive elements. The forming of the second layer structure on the first layer structure includes forming the first layer of the second layer structure on the first layer structure; and subsequently forming the second layer of the second layer structure on the first layer of the second layer structure.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: August 13, 2019
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Markus Leitgeb, Heinz Moitzi
  • Patent number: 10368448
    Abstract: A method of manufacturing a component carrier, wherein the method comprises mounting a known-good component on or spaced with regard to a first known-good component carrier block, thereafter forming an electrically conductive connection structure on and/or in and/or spaced with regard to the first component carrier block, and embedding the component between the first component carrier block and a second known-good component carrier block.
    Type: Grant
    Filed: November 27, 2017
    Date of Patent: July 30, 2019
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Marco Gavagnin, Gernot Grober, Christian Vockenberger
  • Publication number: 20190221718
    Abstract: An electronic module and method for the production of the electronic module in accordance with some embodiments of the invention are disclosed. The electronic module includes at least one electronic component affixed to a conductive layer by means of sticky electrically insulating layer, where the electronic component is embedded in a transparent foil. The electronic module is produces by providing an electrically conductive layer. At least one electronic component is affixed to the electrically conductive layer by means of a sticky electrically insulating layer and embedded in a transparent foil. The at least one electronic component is electronically contacted with the conductive layer.
    Type: Application
    Filed: March 27, 2019
    Publication date: July 18, 2019
    Applicant: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Gregor Langer, Johannes Stahr
  • Patent number: 10356904
    Abstract: The invention relates to an electronic device having an electrically isolating support structure, an electrically conducting conductor path on a surface of the support structure, and an electrically conducting contact structure which extends from the surface into the support structure and is electrically connected to the conductor path at a connection point, thereby forming a common conductor track. The conductor path and the contact structure transition into each other in an enlargement-free manner at the connection point.
    Type: Grant
    Filed: May 13, 2015
    Date of Patent: July 16, 2019
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellshaft
    Inventors: Johannes Stahr, Wolfgang Schrittwieser, Mike Morianz, Christian Vockenberger, Markus Leitgeb