Patents Assigned to AT&S Austria Technologie & Systemtechnik
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Patent number: 9929101Abstract: An electronic assembly includes (a) a base carrier structure having a cavity formed therein, (b) a cover carrier structure, and (c) an electronic component disposed within the cavity and connected electrically and/or thermally both with the cover carrier structure and with the base carrier structure. The base carrier structure is made at least partially from a printed circuit board. Preferably, also the cover carrier structure is made at least partially from a further printed circuit board. A method for manufacturing such an electronic assembly is also described.Type: GrantFiled: April 28, 2015Date of Patent: March 27, 2018Assignee: AT & S Austria Technologie & Systemtechnik AktiengesellschaftInventor: Nick Renaud-Bezot
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Patent number: 9903539Abstract: The invention relates to a circuit board element (1) comprising a substrate (2), on which at least one dielectric layer (7) is arranged, and at least one LED (light-emitting diode) (10), wherein at least one channel-shaped waveguide cavity (11) leading away from the LED (10) is provided in the dielectric layer (7), which waveguide cavity leads to at least one integrated light-sensitive component (12), preferably a photo-diode or photocell, arranged for examining the light emission, wherein the LED (10) is preferably also arranged in a cavity (9) that is connected to the waveguide cavity (11). The invention further relates to a method for producing such a circuit board element (1).Type: GrantFiled: March 20, 2012Date of Patent: February 27, 2018Assignee: AT & S AUSTRIA TECHNOLOGIE & SYSTEMTECHNIK AKTIENGESELLSCHAFTInventors: Alexander Kasper, Gregor Langer
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Patent number: 9820381Abstract: In a semi-finished product for the production of a printed circuit board with at least one recessed electronic component having at least one conductive layer structured to provide a connector pad for an electronic component, fan-out lines connected to the connector pad and further to provide at least one laser-stop device encompassing the connector pad, wherein the laser-stop device has at least one passage for passing-through the fan-out lines, the semi-finished product further comprises at least one cap layer applied to the conductive layer, the at least one cap layer having an opening in registration with each passage.Type: GrantFiled: December 20, 2013Date of Patent: November 14, 2017Assignee: AT&S Austria Technologie Systemtechnik AktiengesellschaftInventors: Vic Wang, Ethan Zhou, Laura Bai, Mikael Tuominen, Al Chen
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Patent number: 9801270Abstract: A printed circuit board that includes conductive layers separated by insulation layers of dielectric material, at least one conductive layer being patterned and having at least one signal line embedded in an insulation material, whereby a conductive ground plan layer, separated by the insulation material and lying in a predetermined distance (d) from the at least one signal line includes a ground plane area associated to and extending along the at least one signal line, the conductive layer associated to and extending along the at least one signal line is provided with openings therein. Preferably the openings are spaces between conducting stripes, extending, seen from above, across the at least one signal line, the conducting stripes being integrally connected with the conductive remainder of the conductive layer.Type: GrantFiled: December 9, 2013Date of Patent: October 24, 2017Assignee: AT&S Austria Technologie & Systemtechnik AktiengesellschaftInventors: Mikael Tuominen, Martin Fischeneder
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Patent number: 9795025Abstract: A method of manufacturing a printed circuit board or a sub-assembly thereof by coupling at least two elements of insulating materials with different properties on adjacent side surfaces and covering the elements with a layer of conductive material and building up at least one further layer at least partly overlapping the at least two elements.Type: GrantFiled: July 12, 2012Date of Patent: October 17, 2017Assignee: AT&S AUSTRIA TECHNOLOGIE & SYSTEMTECHNIK AKTIENGESELLSCHAFTInventors: Simon Sebanz, Hannes Voraberger
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Patent number: 9781845Abstract: In a semi-finished product for the production of a printed circuit board, the semi-finished product comprising a plurality of having multiple insulating layers of a prepreg material and conductive layers (2, 2?) of a conductive material and further comprising having at least one electronic component embedded in at least one insulating layer the at least one electronic component is attached to a corresponding conductive layer by the aid of an Anisotropic Conductive Film and the Anisotropic Conductive Film as well as the prepreg material are in an unprocessed state.Type: GrantFiled: February 27, 2014Date of Patent: October 3, 2017Assignee: AT&S Austria Technologie & Systemtechnik AktiengesellschaftInventors: Johannes Stahr, Mikael Tuominen
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Patent number: 9763337Abstract: A semi-finished product for the production of a printed circuit board having a plurality of alternately arranged insulating layers and conductive layers and at least one hard gold-plated edge connector is characterized by the hard gold-plated edge connector being arranged on an inner conductive layer of the semi-finished product and being fully covered by at least one group of an insulating layer and a conductive layer.Type: GrantFiled: December 20, 2013Date of Patent: September 12, 2017Assignee: AT&S Austria Technologie & Systemtechnik AktiengesellschaftInventors: Stefan Jäger, Markus Leitgeb, Thomas Judge
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Patent number: 9750134Abstract: A method for producing a printed circuit board (13, 15, 16) with multilayer subareas in sections, characterized by the following steps: a) providing at least one conducting foil (1, 1?) and application of a dielectric insulating foil (3, 3?) to at least one subarea of the conducting foil; b) applying a structure of conducting paths (4, 4?) to the insulating layer (3, 3?); c) providing one further printed circuit board structure; d) joining of the further printed circuit board structure with the conducting foil (1, 1?) plus insulating layer (3, 3?) and conducting paths (4, 4?) by interposing a prepreg layer (5, 85; 18, 18?), and e) laminating the parts joined in step d) under pressing pressure and heat; and a printed circuit board produced according to this method.Type: GrantFiled: March 5, 2014Date of Patent: August 29, 2017Assignee: AT&S Austria Technologie & Systemtechnik AktiengesellschaftInventors: Alexander Kasper, Dietmar Drofenik, Ravi Hanyal Shivarudrappa, Michael Gössler
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Patent number: 9713248Abstract: Method for the manufacture of a printed circuit board with at least one cavity for the accommodation of an electronic component, wherein the cavity walls exhibit a reflective, in particular mirrored reflector layer characterized by the following steps: Provision of a printed circuit board, Application of a temporary protective layer onto at least a section of the surface of the circuit board, Creation of the cavity by way of penetration of the protective layer in the region of the cavity, Application of the reflector layer, Removal of the temporary protective layer.Type: GrantFiled: January 21, 2015Date of Patent: July 18, 2017Assignee: AT&S Austria Technologie & Systemtechnik AktiengesellschaftInventors: Gregor Langer, Mario Damej, Ferdinand Lutschounig
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Patent number: 9698130Abstract: In a connection system for electronic components (1) comprising a plurality of insulating layers (2) and conductive layers (3) and further comprising at least one embedded electronic component (4) embedded within at least one of the plurality of insulating layers (2) and conductive layers (3) the at least one embedded electronic component (4) is at least one first transistor having a bulk terminal thereof in thermal contact with a thermal duct (6) comprised of a plurality of vias (7) reaching through at least one of an insulating layer (2) and a conductive layer (3) of the connection system for electronic components (1) and emerging on a first outer surface (8) of the connection system for electronic components (1) under a first surface-mounted component (10).Type: GrantFiled: September 22, 2016Date of Patent: July 4, 2017Assignee: AT&S AUSTRIA TECHNOLOGIE & SYSTEMTECHNIK AKTIENGESELLSCHAFTInventors: Gerald Weis, Christian Vockenberger, Roland Sekavcnik
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Publication number: 20170164481Abstract: A printed circuit board structure that includes at least one insulation layer, at least one conductor layer, and at least one embedded component having a contact pad that has an outer barrier layer, in which structure at least two conductor paths/conductor layers are connected to at least two connections using vias, and each via runs from a conductor path/conductor layer directly to the barrier contact layer of the corresponding connection of the component.Type: ApplicationFiled: October 9, 2014Publication date: June 8, 2017Applicant: AT&S Austria Technologie & Systemtechnik AktiengesellschaftInventors: Johannes Stahr, Mike Morianz
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Patent number: 9674960Abstract: A printed circuit board having two completed printed circuit board elements which consists of a plurality of interconnected plies or layers, wherein at least one printed circuit board element has a cutout or depression containing the component to be integrated on one of the printed circuit board elements or in the cutout of the at least one printed circuit board element, and the printed circuit board elements are connected with the component being accommodated in the cutout, as a result of which it is possible to obtain secure and reliable accommodation of the component in the printed circuit board. Furthermore, a printed circuit board of this type also contains an electronic component integrated therein.Type: GrantFiled: April 30, 2015Date of Patent: June 6, 2017Assignee: AT & S AUSTRIA TECHNOLOGIE & SYSTEMTECHNIK AKTIENGESELLSCHAFTInventors: Johannes Stahr, Markus Leitgeb
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Publication number: 20170142830Abstract: Electronic device comprising an at least partially electrically insulating carrier structure, which comprises a resin matrix and reinforcement structures in the resin matrix, wherein the reinforcement structures are provided at least partially with a thermal conductivity increasing coating, and an electrically conducting structure at and/or in the carrier structure, wherein at least in an interconnecting section between the carrier structure and the electrically conducting structure, the carrier structure is free from reinforcement structures provided with the coating, such that the electrically conducting structure and the coating are arranged non-contactingly relative to each other.Type: ApplicationFiled: March 20, 2015Publication date: May 18, 2017Applicant: AT & S Austria Technologie & Systemtechnik AktiengesellschaftInventors: Elisabeth Kreutzwiesner, Gernot Schulz
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Patent number: 9648758Abstract: A method for producing a circuit board comprising the following steps:—providing at least one first element of the circuit board to be produced, more particularly a multilayer core element;—applying an adhesion-preventing material to a region of the first element to be subsequently exposed;—applying at least one additional layer to the first element;—connecting the first element and the at least one additional layer; and—removing a portion of the additional layer to expose the region of the first element, wherein in the additional layer corresponding to the portion to be subsequently removed, the material of the additional layer is cut through on at least one edge of the portion to be subsequently removed.Type: GrantFiled: February 19, 2013Date of Patent: May 9, 2017Assignee: AT&S Austria Technologie & Systemtechnik AktiengesellschaftInventors: Siegfried Götzinger, ShuYing Yao, Mikael Tuominen, Beck Han
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Publication number: 20170079130Abstract: Connection system for electronic components, the connection system comprising at least one electrically insulating layer and at least one electrically conductive layer, wherein the connection system further comprises a heat distributing layer arranged within the at least one electrically insulating layer wherein the at least one heat distributing layer is made of thermally conductive, and electrically insulating, matrix-free material.Type: ApplicationFiled: March 2, 2015Publication date: March 16, 2017Applicant: AT & S Austria Technologie & Systemtechnik AktiengesellschaftInventors: Gernot Schulz, Elisabeth Kreutzwiesner
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Publication number: 20170042028Abstract: In a method for producing a printed circuit board consisting of at least two printed circuit regions, wherein the printed circuit board regions each compromise at least one conductive layer and/or at least one device or once conductive component, wherein printed circuit board regions to be connected to another one, in the region of in each case at least one lateral surface directly adjoining one another, are connected to one another by a coupling or connection, and wherein, after a coupling or connection of printed circuit board regions, at least one additional layer or ply of the printed circuit board is applied over the printed circuit board regions, the additional layer is embodied as a conductive layer, which is contact-connected via plated-through holes to conductive layers or devices or components integrated in the printed circuit board regions.Type: ApplicationFiled: October 24, 2016Publication date: February 9, 2017Applicant: AT & S Austria Technologie & Systemtechnik AktiengesellschaftInventors: Rainer PLUDRA, Dietmar DROFENIK, Johannes STAHR, Siegfried GÖTZINGER, Ljubomir MARELJIC
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Patent number: 9521743Abstract: A printed circuit board comprising conductive layers separated by insulation layers of dielectric material, at least one conductive layer being patterned and having at least one signal line embedded in insulation material. The at least one signal line is covered by a dielectric film, followed by a thin conductive layer, whereby the dielectric film covers at least one surface and both sides of the at least one signal line and the thin conductive layer extends, separated by the dielectric film, over the at least one surface of the signal line and at least partially over the height of both sides of the signal line.Type: GrantFiled: December 12, 2013Date of Patent: December 13, 2016Assignee: AT&S Austria Technologie & Systemtechnik AktiengesellschaftInventors: Martin Fischeneder, Mikael Tuominen
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Publication number: 20160353566Abstract: Method for the manufacture of a printed circuit board with at least one cavity for the accommodation of an electronic component, wherein the cavity walls exhibit a reflective, in particular mirrored reflector layer characterized by the following steps: Provision of a printed circuit board, Application of a temporary protective layer onto at least a section of the surface of the circuit board, Creation of the cavity by way of penetration of the protective layer in the region of the cavity, Application of the reflector layer, Removal of the temporary protective layer.Type: ApplicationFiled: January 21, 2015Publication date: December 1, 2016Applicant: AT&S Austria Technologie & Systemtechnik AktiengesellschaftInventors: Gregor LANGER, Mario DAMEJ, Ferdinand LUTSCHOUNIG
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Publication number: 20160329469Abstract: An electronic module and method for the production of the electronic module in accordance with some embodiments of the invention are disclosed. The electronic module includes at least one electronic component affixed to a conductive layer by means of sticky electrically insulating layer, where the electronic component is embedded in a transparent foil. The electronic module is produces by providing an electrically conductive layer. At least one electronic component is affixed to the electrically conductive layer by means of a sticky electrically insulating layer and embedded in a transparent foil. The at least one electronic component is electronically contacted with the conductive layer.Type: ApplicationFiled: May 5, 2016Publication date: November 10, 2016Applicant: AT & S Austria Technologie & Systemtechnik AktiengesellschaftInventors: Gregor Langer, Johannes Stahr
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Publication number: 20160330840Abstract: In a connection system for electronic components comprising a plurality of insulating layers and conductive layers, and having at least one cavity, the at least one cavity is covered on both sides thereof at least by an electrode-group of an insulating layer followed by a conductive layer, the electrode-groups forming electrodes of a capacitor. A method for detecting failure of a connection system for electronic components comprises the steps of continuously measuring the capacitance of the at least one capacitor formed by the electrode groups and generating a failure message when detecting a discontinuity in the progression of capacitance of the at least one capacitor.Type: ApplicationFiled: May 5, 2016Publication date: November 10, 2016Applicant: AT&S Austria Technologie & Systemtechnik AktiengesellschaftInventors: Markus Leitgeb, Johannes Stahr