Patents Assigned to ATI Technologies ULC
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Publication number: 20240179333Abstract: A system and method for texture decompression is described. The method comprises receiving a compressed texture block including two or more disjoint subsets of data and decompressing the compressed texture block. The decompressing includes decompressing each of the two or more disjoint subsets in the compressed texture block to form texels. The two or more disjoint subsets include a first disjoint subset having a first set of color endpoints and a first index value for a first texel, and a second disjoint subset having a second set of color endpoints.Type: ApplicationFiled: February 9, 2024Publication date: May 30, 2024Applicant: ATI Technologies ULCInventors: Konstantine Iourcha, Andrew S.C. Pomianowski
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Patent number: 11994996Abstract: Apparatuses, systems and methods for routing requests and responses targeting a shared resource. A queue in a communication fabric is located in a path between the requesters and a shared resource. In some embodiments, the shared resource is a shared address translation cache stored in an endpoint. The physical channel between the queue and the shared resource supports multiple virtual channels. The queue assigns at least one entry to each virtual channel of a group of virtual channels where the group includes a virtual channel for each address translation request type from a single requester of the multiple requesters. When the at least one entry for a given requester is de-allocated, the queue allocates this entry only with requests from the assigned virtual channel even if the empty entry is the only available entry of the queue.Type: GrantFiled: June 13, 2023Date of Patent: May 28, 2024Assignee: ATI Technologies ULCInventor: Kostantinos Danny Christidis
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Patent number: 11994939Abstract: The disclosed computer-implemented method for generating remedy recommendations for power and performance issues within semiconductor software and hardware. For example, the disclosed systems and methods can apply a rule-based model to telemetry data to generate rule-based root-cause outputs as well as telemetry-based unknown outputs. The disclosed systems and methods can further apply a root-cause machine learning model to the telemetry-based unknown outputs to analyze deep and complex failure patterns with the telemetry-based unknown outputs to ultimately generate one or more root-cause remedy recommendations that are specific to the identified failure and the client computing device that is experiencing that failure.Type: GrantFiled: September 30, 2022Date of Patent: May 28, 2024Assignees: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Mohammad Hamed Mousazadeh, Arpit Patel, Gabor Sines, Omer Irshad, Philippe John Louis Yu, Zongjie Yan, Ian Charles Colbert
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Patent number: 11989918Abstract: Systems, apparatuses, and methods for converting pixel data to a custom swizzle mode are disclosed. A graphics engine receives data in a pre-defined swizzle mode. The graphics engine determines a custom swizzle mode for the data that has directionality aligned to the data itself to further optimize deltas that are used for compressing the data. The graphics engine groups incoming data into group of two neighboring pixels in both the horizontal and vertical directions. The graphics engine scores horizontal and vertical groupings against each other to make a first swizzle mode bit selection. Then the graphics engine increases the grouping of pixels to include additional pixels and scores the increased groupings against each other to make subsequent swizzle mode bit selections. The data is reswizzled into the custom swizzle mode and provided to a compressor to be compressed.Type: GrantFiled: December 23, 2020Date of Patent: May 21, 2024Assignees: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Nooruddin Ahmed, Anthony Chan, Christopher J. Brennan
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Patent number: 11985341Abstract: A technique for encoding video is provided. The technique includes for a first portion of a first frame that is encoded by a first encoder in parallel with a second portion of the first frame that is encoded by a second encoder, determining a historical complexity distribution; determining a first bit budget for the first portion of the first frame based on the historical complexity distribution; and encoding the first portion of the first frame by the first encoder, based on the first bit budget.Type: GrantFiled: June 22, 2022Date of Patent: May 14, 2024Assignee: ATI Technologies ULCInventors: Wei Gao, Gabor Sines, Ihab M. A. Amer, Crystal Yeong-Pian Sau, Feng Pan, Dong Liu
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Publication number: 20240155806Abstract: The disclosed computer-implemented method for configuring fan speeds can include (i) measuring an air temperature at the air intake of a fan that cools a hardware processing unit of a computing device, (ii) adjusting a rotational speed for the fan based on the air temperature at the air intake of the fan and at least one additional parameter measured around the time of measuring the temperature of the air, and (iii) sending, to the fan, an instruction to rotate at the rotational speed. Various other methods, systems, and computer-readable media are also disclosed.Type: ApplicationFiled: November 3, 2022Publication date: May 9, 2024Applicant: ATI Technologies ULCInventors: Jabir H. Yusufali, Ali Ebrahimi Khabbazi, Cristian Andrei Saceleanu, Jushwin Singh Mahal
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Publication number: 20240143295Abstract: A compilation technique is provided. The technique includes including a first instruction into a first executable for a first auxiliary processor, wherein the first instruction specifies execution by the first auxiliary processor; and including a second instruction into the first executable, wherein the second instruction targets resources that have affinity with the first auxiliary processor.Type: ApplicationFiled: November 1, 2022Publication date: May 2, 2024Applicants: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Norman Vernon Douglas Stewart, Mihir Shaileshbhai Doctor, Mingliang Lin
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Patent number: 11971803Abstract: Systems, apparatuses, and methods for implementing a safety monitor framework for a safety-critical computer vision (CV) application are disclosed. A system includes a safety-critical CV application, a safety monitor, and a CV accelerator engine. The safety monitor receives an input image, test data, and a CV graph from the safety-critical CV application. The safety monitor generates a modified image by adding additional objects outside of the input image. The safety monitor provides the modified image and CV graph to the CV accelerator which processes the modified image and provides outputs to the safety monitor. The safety monitor determines the likelihood of erroneous processing of the original input image by comparing the outputs for the additional objects with a known good result. The safety monitor complements the overall fault coverage of the CV accelerator engine and covers faults only observable at the level of the CV graph.Type: GrantFiled: December 10, 2021Date of Patent: April 30, 2024Assignee: ATI Technologies ULCInventors: Tung Chuen Kwong, Benjamin Koon Pan Chan, Clarence Ip, Meghana Manjunatha
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Publication number: 20240135626Abstract: A method, computer system, and a non-transitory computer-readable storage medium for performing primitive batch binning are disclosed. The method, computer system, and non-transitory computer-readable storage medium include techniques for generating a primitive batch from a plurality of primitives, computing respective bin intercepts for each of the plurality of primitives in the primitive batch, and shading the primitive batch by iteratively processing each of the respective bin intercepts computed until all of the respective bin intercepts are processed.Type: ApplicationFiled: January 2, 2024Publication date: April 25, 2024Applicants: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Michael Mantor, Laurent Lefebvre, Mark Fowler, Timothy Kelley, Mikko Alho, Mika Tuomi, Kiia Kallio, Patrick Klas Rudolf Buss, Jari Antero Komppa, Kaj Tuomi
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Patent number: 11966748Abstract: Techniques described herein provide users with the ability to persistently adjust settings for boot-time features (BTF) of a computing device. A user requests a particular BTF configuration adjustment for a device via a device driver. The driver instructs trusted firmware of the device to store a boot override record in persistent storage accessible by a bootloader for the device. Upon implementation of the boot sequence for the device, the bootloader applies the changes reflected in the record to BTF configuration data. The boot override information is persistently available to the bootloader, which ensures that the configuration changes that the boot override record(s) represent are applied to the BTFs of the device until the boot override record(s) are cleared or invalidated. Further, to ensure the security of boot override record(s), the trusted firmware generates, for each record, an HMAC tag using an HMAC key derived from a Chip Endorsement Fused Secret from the hardware.Type: GrantFiled: September 30, 2021Date of Patent: April 23, 2024Assignee: ATI Technologies ULCInventors: Kamraan Nasim, Erez Koelewyn, Shadi Dashmiz
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Patent number: 11960410Abstract: Systems, apparatuses, and methods for implementing a unified kernel virtual address space for heterogeneous computing are disclosed. A system includes at least a first subsystem running a first kernel, an input/output memory management unit (IOMMU), and a second subsystem running a second kernel. In order to share a memory buffer between the two subsystems, the first subsystem allocates a block of memory in part of the system memory controlled by the first subsystem. A first mapping is created from a first logical address of the kernel address space of the first subsystem to the block of memory. Then, the IOMMU creates a second mapping to map the physical address of that block of memory from a second logical address of the kernel address space of the second subsystem. These mappings allow the first and second subsystems to share buffer pointers which reference the block of memory.Type: GrantFiled: November 25, 2020Date of Patent: April 16, 2024Assignee: ATI Technologies ULCInventors: Tung Chuen Kwong, Benjamin Koon Pan Chan, William Lloyd Atkinson
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Patent number: 11960813Abstract: A system and method for automatically generating placement of vias within redistribution layers of a semiconductor package are described. In various implementations, a user defines attributes to use for automatic via generation in redistribution layers of a semiconductor package. The circuitry of a processor of a computing device used by the user executes instructions of an automatic redistribution layer (RDL) via generator. The automatic via generator uses the attributes, data indicative of the RDL netlist of signal routes within the RDL, and RDL mask layout data representing the signal masks of the metal layers within the RDL. The processor generates placement of vias for in the RDL based on the attributes and an identification of overlapping regions between metal layers.Type: GrantFiled: December 27, 2021Date of Patent: April 16, 2024Assignees: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Rajagopalan Venkatramani, Renato Dimatula Gaddi, Liane Martinez, Warren Alexander Santos, Dennis Glenn Lozanta Surell
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Patent number: 11962313Abstract: An oscillator circuit is provided that adapts to voltage supply variations. The circuit first and second delays lines connected inputs of an edge detector, one delay line supplied by a reference voltage and the other with a drooping supply voltage. The edge detector generates an output clock based on a relationship between the inputs. The output clock applied to the signal inputs of the first and second delay lines. The output clock has a voltage dependent frequency performance curve with a slope dependent at least on the second delay line delay and a delay of the edge detector. At least one of the first delay line, the second delay line, and the edge detector delay are adjusted to change the slope of the performance curve.Type: GrantFiled: March 29, 2019Date of Patent: April 16, 2024Assignees: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Stephen Victor Kosonocky, Mikhail Rodionov, Joyce Cheuk Wai Wong
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Publication number: 20240121192Abstract: The disclosed device for packet coalescing includes detecting a trigger condition for initiating packet coalescing of packet traffic and sending, to an endpoint device, a notification to start packet coalescing. The device can observe a status in response to starting the packet coalescing and report a performance of the packet coalescing. A system can include a controller that detects a trigger condition for packet coalescing and notifies an endpoint device via a notification register. The controller can read a status register to report, based on the read status, a packet coalescing performance. Various other methods, systems, and computer-readable media are also disclosed.Type: ApplicationFiled: March 31, 2023Publication date: April 11, 2024Applicants: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Ashwini Chandrashekhara Holla, Indrani Paul, Alexander J. Branover, Carlos Javier Moreira
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Patent number: 11953965Abstract: Techniques are described for adaptive device power management. The device interface application of a hardware computing unit detects a launch of an application by the operating system (OS) to be executed on the hardware computing unit, in an implementation. The device interface application identifies the launched application and determines whether a hardware profile exists that is associated with the application. The hardware profile includes one or more hardware parameters that yield the optimal performance for power consumption by the hardware computing unit when executing the launched application. Based on determining that the hardware profile exists, the power policy of the OS is updated for the launched application, and thereby, the driver updates the power state(s) of the hardware computing unit based on the new power policy.Type: GrantFiled: December 21, 2021Date of Patent: April 9, 2024Assignee: ATI Technologies ULCInventors: Mohammad Hamed Mousazadeh, Joohyun Lee, Omer Irshad, Xuetao Yan, Alexander Sabino Duenas, Muhammad Saad Musani
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Patent number: 11954792Abstract: Systems, apparatuses, and methods for performing real-time video rendering with performance guaranteed power management are disclosed. A system includes at least a software driver, a power management unit, and a plurality of processing elements for performing rendering tasks. The system receives inputs which correspond to rendering tasks which need to be performed. The software driver monitors the inputs that are received and the number of rendering tasks to which they correspond. The software driver also monitors the amount of time remaining until the next video synchronization signal. The software driver determines which performance setting will minimize power consumption while still allowing enough time to finish the rendering tasks for the current frame before the next video synchronization signal. Then, the software driver causes the power management unit to provide this performance setting to the plurality of processing elements as they perform the rendering tasks for the current frame.Type: GrantFiled: August 20, 2021Date of Patent: April 9, 2024Assignee: ATI Technologies ULCInventors: Benjamin Koon Pan Chan, William Lloyd Atkinson, Clarence Ip, Tung Chuen Kwong
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Patent number: 11954782Abstract: A method, system, and non-transitory computer readable storage medium for rasterizing primitives are disclosed. The method, system, and non-transitory computer readable storage medium includes: generating a primitive batch from a sequence of one or more primitives, wherein the primitive batch includes primitives sorted into one or more row groups based on which row of a plurality of rows each primitive intersects; and processing each row group, the processing for each row group including: identifying one or more primitive column intercepts for each of the one or more primitives in the row group, wherein each combination of primitive column intercept and row identifies a bin; and rasterizing the one or more primitives that intersect the bin.Type: GrantFiled: March 22, 2021Date of Patent: April 9, 2024Assignees: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Michael Mantor, Laurent Lefebvre, Mikko Alho, Mika Tuomi, Kiia Kallio
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Patent number: 11955982Abstract: An apparatus and method for efficiently generating clock signals. An integrated circuit includes multiple clock dividers both at its I/O boundaries and across its semiconductor die. A clock divider receives an input clock signal, and an indication of a reduction factor that is a positive, non-zero and a non-integer value less than one. The clock divider generates an output clock signal based on the input clock signal and the reduction factor. The reduction factor can be an M-bit pattern where M is a positive, non-zero integer greater than one. Therefore, the clock divider generates the output clock signal with a reduced clock rate that has a smallest configurable granularity that is 1/M of the input clock frequency. An asserted bit in the M-bit pattern indicates that the output clock signal should have an asserted value during a corresponding clock cycle of the input clock signal.Type: GrantFiled: June 29, 2022Date of Patent: April 9, 2024Assignee: ATI Technologies ULCInventor: Erwin Chi Wang Pang
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Patent number: 11956441Abstract: Methods and devices are provided for encoding a video stream which comprise encoding a plurality of frames of video acquired from different points of view, generating statistical values for the frames of video determined from values of pixels of the frames, generating, for each of the plurality of frames, a perceptual hash value based on statistical values of the frame and encoding a current frame comprising video acquired from a corresponding one of the different points of view using a previously encoded reference frame based on a similarity of perceptual hashes of the current frame and the previously encoded reference frame.Type: GrantFiled: December 23, 2021Date of Patent: April 9, 2024Assignee: ATI Technologies ULCInventors: Sunil Gopal Koteyar, Sonu Thomas, Ihab M. A. Amer, Haibo Liu
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Publication number: 20240111688Abstract: A technique for servicing a memory request is disclosed. The technique includes obtaining permissions associated with a source and a destination specified by the memory request, obtaining a first set of address translations for the memory request, and executing operations for a first request, using the first set of address translations.Type: ApplicationFiled: September 30, 2022Publication date: April 4, 2024Applicants: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Omar Fakhri Ahmed, Norman Vernon Douglas Stewart, Mihir Shaileshbhai Doctor, Jason Todd Arbaugh, Milind Baburao Kamble, Philip Ng, Xiaojian Liu