Abstract: A liquid crystal display includes a pixel array, a gate driver, a data driver, a common voltage source, and a current duplication module. The gate driver is used to turn on a plurality of rows of pixels in the pixel array in sequence. The data driver is used to provide a plurality of data voltages to the turned-on pixels in the pixel array. The common voltage source is used to provide a common voltage. The current duplication module is coupled to a first side and a second side of the pixel array and is used to input two substantially equal currents to the first side and the second side of the pixel array respectively to provide the common voltage to the first side and the second side of the pixel array.

Abstract: A liquid crystal display panel includes first substrate, active switching device, patterned insulating layer, pixel electrode, auxiliary electrode, second substrate, common electrode and liquid crystal molecules. The patterned insulating layer is disposed on the first substrate and includes a plurality of inner insulating branches and slits, and each slit is located between two adjacent inner insulating branches. The pixel electrode is disposed on the patterned insulating layer and electrically connected to the active switching device. The periphery of the pixel electrode overlaps the inner insulating branches. The auxiliary electrode is disposed on the first substrate and at least partially surrounding the pixel electrode. The auxiliary electrode and the pixel electrode are not electrically connected, and the inner insulating branches partially overlap the auxiliary electrode in a vertical projection direction. The common electrode is disposed on the second substrate.

Abstract: A liquid crystal display panel includes a first substrate, a second substrate, a liquid crystal layer, a plurality of first regions and a plurality of second regions. The first regions and the second regions are formed on the first substrate and the second substrate. In a narrow viewing mode, the luminous flux of the first regions along a first viewing direction is different from that of the first regions along a second viewing direction opposite to the first viewing direction, and the luminous flux of the second regions along the first viewing direction is substantially different from that of the first regions along the first viewing direction.

Abstract: A pixel circuit includes a first capacitor, an input unit, a driving unit, a first compensation unit, an organic light-emitting diode, a switch unit, a second compensation unit and a reset unit. The input unit is electrically connected to the first capacitor and the second compensation unit. The second compensation unit is electrically connected to the organic light-emitting diode. The first compensation unit is electrically connected to the first capacitor, the driving unit, the switch unit and the reset unit. The driving unit is electrically connected to the switch unit and the reset unit. The switch unit is electrically connected to the organic light-emitting diode. The pixel circuit is configured to generate a corresponding driving current according to a turn-on voltage of the organic light-emitting diode. A driving method of a pixel circuit is also provided.

Abstract: An embedded sensor of a touch panel includes at least a readout unit and a reset unit. The total readout length or the total reset length during each sensing period may be larger than the pixel refresh period by introducing other readout units, introducing other reset units, or increasing the enabling period of the gate driving signals, thereby enhancing the sensibility of the touch panel.

Abstract: A bright dot detection method adapted to be used in a display panel including a plurality of gate lines, a plurality of source lines and a bright dot detection module. The plurality of gate lines and the plurality of sources line are interlaced thereby forming a plurality of pixels. The bright dot detection method includes: driving the plurality of pixels through enabling the plurality of gate lines simultaneously, thereby forming a first bright line in a first direction; and driving the plurality of pixels through enabling the plurality of gate lines sequentially and providing a control signal to the bright dot detection module, thereby forming a second bright line in a second direction, wherein a bright dot is positioned where the first and second bright lines meet with each other. A display panel is also disclosed.

Abstract: A pixel structure of display panel includes a first substrate, a second substrate, a liquid crystal layer, a first pixel electrode, a patterned insulation layer, a second pixel electrode and a common electrode. The first substrate has a plurality of alignment regions. The second substrate and the first substrate are disposed opposite to each other. The first pixel electrode is a full-surfaced electrode, which includes a plurality of branch electrodes disposed in the alignment regions. The patterned insulation layer is disposed between the first pixel electrode and the liquid crystal layer. The second pixel electrode is disposed in at least one boundary of each of the alignment regions. The common electrode is disposed on the second substrate.

Abstract: An optical sensing device includes a thin film transistor disposed on a substrate, an optical sensor, a planar layer, and an organic light emitting diode. The optical sensor includes a metal electrode disposed on a gate dielectric layer of the thin film transistor and connecting to a drain electrode of the thin film transistor, an optical sensing layer disposed on the metal electrode, and a first transparent electrode disposed on the optical sensing layer. The planar layer covers at least a part of the thin film transistor and the optical sensor. The organic light emitting diode is disposed on the planar layer. The anode electrode and the cathode electrode of the organic light emitting diode are electrically coupled to a gate line and a data line respectively.

Abstract: A pixel circuit includes a first capacitor whose two terminals are coupled to a first node and a ground end respectively, a first switch whose two terminals are coupled to a second node and a fourth node respectively, a liquid crystal, a second switch, a pull-up circuit, a pull-down circuit, a second capacitor and a third switch. The first switch is coupled to the first node and a first data input end. The liquid crystal is coupled to the second and a third node. The second switch is coupled to the second node and a second data input end. The pull-up circuit is coupled to the first node and the second node and a node of a high voltage. The pull-down circuit is coupled to the second node, the fourth node and the ground end. The third switch is coupled to the fourth node and the ground end.

Abstract: A display substrate structure includes a substrate, at least one chip, and a plurality of conductive lines. A display region and a periphery region are defined on the substrate. The periphery region is disposed around the display region, and the chip is disposed in the periphery region. The conductive lines are disposed in the periphery region and at least between the chip and the display region. Each conductive line has a fan-out portion and at least one adjustment portion. Each adjustment portion is electrically connected to the fan-out portion of the same conductive line. The adjustment portion of each conductive line has a winding wire, and at least one of the adjustment portions of the conductive lines has a straight wire, which is electrically connected to and at least partially overlaps the winding wire of the same conductive line.

Abstract: A display device includes a data driver, a gate driver, a plurality of first pixel unit and a first low-pass filter. Each first pixel unit includes a first transistor, a first storage capacitor and a first liquid crystal capacitor. The first transistor is electrically coupled to the data driver and the gate driver and from which to receive the first display data and the gate control signal, respectively. The first transistor is configured to output the first display data according to the gate control signal. The first low-pass filter is configured to have its input electrode terminal electrically coupled to the second electrode terminal of one of the plurality of first transistor and its output electrode terminal electrically coupled to the second electrode terminal of the first liquid crystal capacitor of each of the first pixel units. An operation method for the display device is also provided.

Abstract: A liquid crystal display device includes a display panel, a multiplexer, an alignment circuit and a short bar circuit. The multiplexer is configured to provide a plurality of output data signals according to a plurality of switch control signals and an input data signal. During the alignment period, the alignment circuit is configured to provide a curing voltage to the display panel, and the short bar circuit is configured to couple the multiplexer to a predetermined voltage.

Abstract: A liquid crystal display and a test circuit thereof are provided. The test circuit has a plurality of signal pads, a first data distributor, a plurality of logic circuit units and N switches. N is a positive integer. The signal pads are configured to receive a test data signal, a voltage signal, an enable signal and a plurality of first switch control signals. The first data distributor distributes the test data signal to N output terminals of the first data distributor. Each of the logic circuit units generates a second switch control signal according to the voltage signal, the enable signal and a corresponding one of the first switch control signals. Each of the switches controls the electrical connection between an output terminal of the first data distributor coupled thereto and at least a data line coupled thereto.

Abstract: A cushion package structure includes at least a plate and two or more blocks. The plate is disposed within a storage box and the blocks are the same and pivotable with one another. As a number of blocks are connected with one another serially with various including angle between each adjacent two, one or multiple block sets may be formed thereby. Positioning holes on the plate having substantially same contour as corresponding positioning sections on the blocks are further prepared to engage with the positioning sections as the block sets are put to be disposed on the plate, thereby forming a storage space with a specific shape within the storage box. The blocks may be removed from the plate, rearranged, and redisposed on another plate, so that a storage space with a different shape may be defined.

Abstract: A liquid crystal display having adaptive pulse shaping control mechanism includes a first gate driver for providing a first gate signal based on a first modulation voltage, a second gate driver for providing a second gate signal based on a second modulation voltage, a first pixel array unit for illustrating image according to the first gate signal, a second pixel array unit for illustrating image according to the second gate signal, a timing controller for performing a pulse compare operation over the first and second gate signals so as to generate a first shaping control signal and a second shaping control signal, a first gate pulse modulation unit for providing the first modulation voltage according to the first shaping control signal, and a second gate pulse modulation unit for providing the second modulation voltage according to the second shaping control signal.

Abstract: A light guide plate includes a light guide layer and a metal reflective layer. The light guide layer has a light emitting surface, a bottom surface and a light incident surface. The light incident surface is located between the light emitting surface and the bottom surface. The metal reflective layer is coated on the bottom surface of the light guide layer. Additionally, an average reflectance of the metal reflective layer for light in a wavelength range of 400 to 550 nanometers is greater than an average reflectance of the metal reflective layer for light in a wavelength range of 550 to 700 nanometers.

Abstract: A thin-film transistor comprises a substrate, a first electrode on the top surface of the substrate, an insulation layer on the top surface of the substrate and covering the first electrode, a semiconductor oxide layer on the top surface of the insulation layer, a protection layer on the top surface of the semiconductor oxide layer, an organic dielectric layer on the top surface of the semiconductor oxide layer and covering the protection layer, a source electrode and a drain electrode both penetrating the organic dielectric layer from the top surface thereof. A channel thickness of the semiconductor oxide layer is not thicker than 20 nanometers. The source electrode contacts the semiconductor oxide layer at the first side of the protection layer and the drain electrode contacts the semiconductor oxide layer at the second side, opposite to the first side, of the protection layer.

Abstract: A source driving device includes a locking module, a controlling module and a decoding module. The locking module executes a locking process selectively in a first band or a second band according to a band setting signal in order to lock a first clock signal synchronized with a first display signal. The controlling module is coupled to the locking module for comparing a control voltage with a reference voltage in the locking process and generates the band setting signal accordingly. The decoding module is coupled to the locking module for generating a decoded signal according to the first display signal and the first clock signal.

Abstract: A display panel includes a display area first and second gate line driving circuits. The display area includes a plurality of pixels is configured to determine how to process a data transmitted on a data line according to first and second control signals transmitted on first and second gate lines respectively and a second control signal transmitted on a second gate line and determine when to emit light according to a light emitting control signal transmitted on a light emitting control line. The first gate line driving circuit is coupled to the first gate line and for providing the first control signal thereto. The second gate line driving circuit is coupled to the second gate line and the light emitting control line and configured to provide the second control signal and the light emitting control signal thereto, respectively.

Abstract: An integrated circuit includes a sensing output terminal, a driver, a first sensing input terminal, a second sensing input terminal and a sensor. The driver is used to transmit a sensing test signal through the sensing output terminal. The first sensing input terminal is coupled to the sensing output terminal through a first external circuit for receiving the sensing test signal. The second sensing input terminal is coupled to the sensing output terminal through a second external circuit for receiving the sensing test signal. The sensor is used to compare the sensing test signals received by the first sensing input terminal and the second sensing input terminal with a clock signal respectively to generate a first comparison result and a second comparison result.